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R E C OM
HC5
Data Sheet
Balanced PBX / Key System SLIC,
Subscriber Line Interface Circuit
HC5503T
June 2004
Features
• Monolithic Integrated Device
The Intersil HC5503T is a low cost Subscriber Line Interface
Circuit (SLIC) that replaces the components of a discrete
Transformer Analog circuit design. The monolithic integrated
design provides improved performance and system
reliability.
• Controlled Supply of Battery Feed Current for Short Loops
(30mA)
• Single +5V Supply
• Allows Interfacing With All Ringing Systems
The HC5503T provides: Current limited DC feed to the
subscriber loop, maintains a flat frequency response over
the voice band and beyond, has self resetting thermal
protection that allows conversation to continue while the fault
is present, provides a TTL subscriber off hook indication
even in the presence of longitudinal currents, and limits
system power consumption on short loops.
• Switch Hook Detection
• Compatible With Worldwide PBX Performance
Requirements
• Low Power Consumption During Standby
• Pb-free Available
Applications
The HC5503T provides balanced 2-wire transmission and
has excellent longitudinal balance, while providing on hook
transmission and longitudinal current rejection in both the
on-hook or off-hook conditions.
• PBX Switches (Analog, Digital or ISDN)
• Key Telephone Systems (KTS)
• ISDN PC Plug in Modems
The SLIC needs only one +5V supply in addition to the main
battery supply for loop current and operates over a range of
battery voltages (-24V to -58V).
• ISDN Small Office/Home Office (SOHO) Terminal
Adapters (TA)
• CTI (Computer Telephony Integration) Products
Available in 24SO packaging. The HC5503T is ideally suited
as a replacement for discrete line circuits in low cost analog
PABXs, small Office/Home Office products or Small Key
Systems.
Ordering Information
PART NUMBER
Block Diagram
BGND
TIP
RING
C1
TX
TF
RF
SPEECH CIRCUIT
LOOP FEED
FN4506.2
RX
VBAT
TEMP.
RANGE (°C)
PACKAGE
PKG.
DWG. #
HC5503TCB
0 to 75
24 Ld SOIC
M24.3
HC5503TCBZ (Note)
0 to 75
24 Ld SOIC (Pb-free) M24.3
HC5503TCBZ96
(Note)
0 to 75
24 Ld SOIC 
M24.3
Tape & Reel (Pb-free)
NOTE: Intersil Pb-free products employ special Pb-free material
sets; molding compounds/die attach materials and 100% matte tin
plate termination finish, which is compatible with both SnPb and
Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed
the Pb-free requirements of IPC/JEDEC J Std-020B.
LOOP DETECTOR
SHD
BIAS
RS
VCC
1
AGND
DGND
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Harris Corporation 1996, Copyright Intersil Americas Inc. 2003, 2004. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
HC5503T
Absolute Maximum Ratings (Note 1)
Thermal Information
Maximum Continuous Supply Voltages
(VBAT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -60 to 0.5V
(VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 to 7V
(VCC - VBAT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .75V
Relay Drive Voltage (VRD) . . . . . . . . . . . . . . . . . . . . . . . . -0.5 to 15V
Thermal Resistance (Typical, Note 2)
JA (°C/W)
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . .
75
Maximum Junction Temperature (Plastic Package). . . . . . . . . 150°C
Maximum Storage Temperature Range . . . . . . . . . . . -65°C to 150°C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300°C
(SOIC - Lead Tips Only)
Operating Conditions
Die Characteristics
Temperature Range
HC-5503T-5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 75°C
Positive Supply Voltage (VCC) . . . . . . . . . . . . . . . . . . 4.75V to 5.25V
Negative Supply Voltage (VBAT) . . . . . . . . . . . . . . . . . . -24V to -58V
High Level Logic Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . 2.4V
Low Level Logic Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . 0.6V
Transistor Count . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 185
Diode Count. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Die Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137 x 102
Substrate Potential . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Connected
Process . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Bipolar-DI
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. Absolute maximum ratings are limiting values, applied individually, beyond which the serviceability of the circuit may be impaired. Functional
operability under any of these conditions is not necessarily implied.
2. JA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
Unless Otherwise Specified, VBAT = -48V, VCC = 5V, AG = BG = DG = 0V, Typical Parameters 
TA = 25°C. Min-Max Parameters are Over Operating Temperature Range
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Off Hook IB+
RL = 600TA = 25°C
-
-
5.3
mA
Off Hook IB-
RL = 600
-
-
39
mA
Off Hook Loop Current
RL = 1200
-
21
-
mA
Off Hook Loop Current
RL = 1200, VBAT = -42V, TA = 25°C
17.5
-
-
mA
Off Hook Loop Current
RL = 200
25.5
30
34.5
mA
Switch Hook Detection Threshold
SHD = VOL
10
-
-
mA
SHD = VOH
-
-
5
mA
0
-
5
s
-
65
-
dB
2-Wire On Hook
-
63
-
dB
Tip and Ring to TX, Off Hook
-
58
-
dB
-
0.05
0.2
dB
-
0.02
0.05
dB
-
1
5
dBrnC
-
-89
-85
dBm0p
-
40
-
dB
2.5
-
-
VPEAK
Dial Pulse Distortion
Longitudinal Balance
1VRMS 200Hz - 3400Hz, (Note 3) IEEE Method
0°C  TA  75°C
2-Wire Off Hook
Insertion Loss
At 1kHz, 0dBm Input Level, Referenced 600
2-Wire to TX, RX to 2-Wire
Frequency Response
200 - 3400Hz Referenced to Absolute Loss at 1kHz and
0dBm Signal Level (Note 3)
Idle Channel Noise
(Note 3)
2-Wire to TX, RX to 2-Wire
Trans Hybrid Loss,
RX to TX
Balance Network Set Up for 600 Termination at 1kHz
Overload Level, 2-Wire to TX, RX to 2-Wire
VCC = +5V, (Note 3)
2
HC5503T
Electrical Specifications
Unless Otherwise Specified, VBAT = -48V, VCC = 5V, AG = BG = DG = 0V, Typical Parameters 
TA = 25°C. Min-Max Parameters are Over Operating Temperature Range (Continued)
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
+3 to -40dBm
-
-
0.05
dB
-40 to -50dBm
-
-
0.1
dB
-50 to -55dBm
-
-
0.3
dB
-
40
-
dB
VCC to Transmit
-
40
-
dB
VBAT to 2-Wire
-
40
-
dB
VBAT to Transmit
-
40
-
dB
-
-
100
A
Logic ‘0’ VIL
-
-
0.8
V
Logic ‘1’ VIH
2.0
-
5.5
V
Level Linearity
2-Wire to TX, RX to 2-Wire
At 1kHz, (Note 3) Referenced to 0dBm Level
Power Supply Rejection Ratio
(Note 3)
VCC to 2-Wire
200 - 3400kHz, RL = 600
0V  VIN  5V
Logic Input Current (RS, RC)
Logic Inputs (RS, RC)
Logic Output (SHD)
Logic ‘0’ VOL
ILOAD 800A, VCC = 5V
-
0.1
0.5
V
Logic ‘1’ VOH
ILOAD 40A, VCC = 5V
2.7
-
5.0
V
NOTE:
3. These parameters are controlled by design or process parameters and are not directly tested. These parameters are characterized upon initial
design release, upon design changes which would affect these characteristics, and at intervals to assure product quality and specification
compliance.
Pinout
HC5503T
(SOIC)
TOP VIEW
3
TIP
1
24 TX
RING
2
23 AGND
VCC
3
22 N/C
N/C
4
21 RX
C1
5
20 T3
DGND
6
19 T2
RS
7
18 T1
N/C
8
17 N/C
TF
9
16 N/C
RF 10
15 N/C
VBAT 11
14 N/C
BGND 12
13 SHD
HC5503T
Pin Descriptions
24 PIN
SOIC
SYMBOL
DESCRIPTION
1
TIP
An analog input connected to the TIP (more positive) side of the subscriber loop through a 150 feed resistor. Functions
with the Ring terminal to receive voice signals from the telephone and for loop
monitoring purposes.
2
RING
An analog input connected to the RING (more negative) side of the subscriber loop through a 150 feed resistor.
Functions with the Tip terminal to receive voice signals from the telephone and for loop monitoring purposes.
3
VCC
Positive Voltage Source - Most positive supply. VCC is typically 5V.
4
N/C
No Connect. For proper operation this pin should be left floating.
5
C1
Capacitor - An external capacitor to be connected between this terminal and analog ground. Required for proper
operation of the voice band hybrid. Typical value is 0.3F, 30V.
6
DGND
7
RS
This pin should be tied to 5V.
8
N/C
No Connect. For proper operation this pin should be left floating.
9
TF
Tip Feed - A low impedance analog output connected to the TIP terminal through a 150 feed resistor. Provides voice
signals to the telephone set and sink longitudinal current.
10
RF
Ring Feed - A low impedance analog output connected to the RING terminal through a 150 feed resistor. Functions
with the TF terminal to provide loop current, feed voice signals to the telephone set, and sink longitudinal current.
11
VBAT
Negative Voltage Source - Most negative supply. VBAT has an operational range of -24V to -58V.
Frequently referred to as “battery”.
12
BGND
Battery Ground - To be connected to zero potential. All loop current and some quiescent current flows into this ground
terminal.
13
SHD
Switch Hook Detection - A low active LS TTL - compatible logic output. This output is enabled for loop currents exceeding
10mA and disabled for loop currents less than 5mA.
14
N/C
No Connect. For proper operation this pin should be left floating.
15
N/C
No Connect. For proper operation this pin should be left floating.
16
N/C
No Connect. For proper operation this pin should be left floating.
17
N/C
No Connect. For proper operation this pin should be left floating.
18
T1
Used during production testing. For proper operation this pin should be connected to pin T2.
19
T2
Used during production testing. For proper operation this pin should be connected to pin T1.
20
T3
Used during production testing. For proper operation this pin should be connected to Analog Ground pin AGND.
21
RX
Receive Input - A high impedance analog input which is internally biased. Capacitive coupling to this input is required.
AC signals appearing at this input differentially drive the Tip feed and Ring feed terminals, which in turn drive tip and ring
through 300 of feed resistance on each side of the line.
22
N/C
No Connect. For proper operation this pin should be left floating.
23
AGND
Analog Ground - To be connected to zero potential and serves as a reference for the transmit output (TX) and receive
input (RX) terminals.
24
TX
Transmit Output - A low impedance analog output which represents the differential voltage across Tip and Ring. This
output is unbalanced and referenced to analog ground. Since the DC level of this output varies with loop current,
capacitive coupling to the next stage is essential.
Digital Ground - To be connected to zero potential and serves as a reference for all digital inputs and outputs on the SLIC
microcircuit.
NOTE: All grounds (AGND, BGND, and DGND) must be applied before VCC or VBAT. Failure to do so may result in premature failure of the part. If
a user wishes to run separate grounds off a line card, the AG must be applied first.
4
HC5503T
Applications Diagram
SYSTEM CONTROLLER
13
5V
7
SHD
RS
TX
TIP
K1A
RB1
1
RB2
9
(NOTE 4)
TIP
RX
TIP FEED
SLIC
HC5503T
VBAT
10
RB4
2
K1A
RB3
RING
18
T1
RING
VBAT
11
BGND DGND AGND
C2
12
6
23
C1
VCC
C3
C4
21
19
T2
RING FEED
C5
20
T3
PRIMARY
SUBSCRIBER PROTECTION
LOOP
24
5
3
C1
PTC
VCC
-48V
PIN NUMBERS GIVEN FOR SOIC PACKAGE.
Z1
RING GENERATOR
-48V
FIGURE 1. TYPICAL LINE CIRCUIT APPLICATION WITH THE MONOLITHIC SLIC
Typical Component Values
C1 = 0.3F, 30V, 20%.
C4 = 0.5F, 20V, 20%.
C2 = 0.01F, 100V,20%.
C5 = 0.5F, 30V, 20%.
C3 = 0.01F, 20V, 20%.
RB1 = RB2 = RB3 = RB4 = 150
PTC used as ring generator ballast.
NOTES:
4. Secondary protection diode bridge recommended is a 2A, 200V type.
5. All grounds (AG, BG, and DG) must be applied before VCC or VBAT. Failure to do so may result in premature failure of the part. If a user wishes
to run separate grounds off a line card, the AG must be applied first.
6. Application shows Ring Injected Ringing.
5
HC5503T
Small Outline Plastic Packages (SOIC)
M24.3 (JEDEC MS-013-AD ISSUE C)
N
24 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE
INDEX
AREA
0.25(0.010) M
H
B M
INCHES
E
-B-
1
2
3
L
SEATING PLANE
-A-
h x 45o
A
D
-C-
e
A1
B
C
0.10(0.004)
0.25(0.010) M
C A M
SYMBOL
MIN
MAX
MIN
MAX
NOTES
A
0.0926
0.1043
2.35
2.65
-
A1
0.0040
0.0118
0.10
0.30
-
B
0.013
0.020
0.33
0.51
9
C
0.0091
0.0125
0.23
0.32
-
D
0.5985
0.6141
15.20
15.60
3
E
0.2914
0.2992
7.40
7.60
4
e
µ
B S
0.05 BSC
1.27 BSC
-
H
0.394
0.419
10.00
10.65
-
h
0.010
0.029
0.25
0.75
5
L
0.016
0.050
0.40
1.27
6
N

NOTES:
MILLIMETERS
24
0o
24
8o
0o
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
7
8o
Rev. 0 12/93
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm
(0.006 inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per
side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater
above the seating plane, shall not exceed a maximum value of
0.61mm (0.024 inch)
10. Controlling dimension: MILLIMETER. Converted inch dimensions
are not necessarily exact.
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9001 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
6
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