DATASHEET

ICL3207E, ICL3217E
Data Sheet
August 21, 2015
+/- 15kV ESD Protected, +3V to +5.5V, Low
Power, 250kbps, RS-232
Transmitters/Receivers
The Intersil ICL32X7E devices are 3V to 5.5V powered
RS-232 transmitters (five)/receivers (three) which meet
ElA/TIA-232 and V.28/V.24 specifications, even at
VCC = 3.0V. Additionally, they provide 15kV ESD protection
(IEC61000-4-2 Air Gap) and 15kV Human Body Model
protection on transmitter outputs and receiver inputs
(RS-232 pins). Targeted applications are ISDN Terminal
Adaptors, PDAs, Palmtops, peripherals, and notebook and
laptop computers where the low operational, and even lower
standby, power consumption is critical. The ICL3217E’s
efficient on-chip charge pumps, coupled with an automatic
powerdown function, reduces the standby supply current to
a 1A trickle. Small footprint packaging, and the use of
small, low value capacitors ensure board space savings as
well. Data rates greater than 250kbps are guaranteed at
worst case load conditions. This family is fully compatible
with 3.3V-only systems, mixed 3.3V and 5V systems, and
5V-only systems, and is a lower power, pin-for-pin
replacement for ‘207E and ‘237E type devices.
The ICL3217E features an automatic powerdown function
which powers down the on-chip power-supply and driver
circuits. This occurs when an attached peripheral device is
shut off or the RS-232 cable is removed, conserving system
power automatically, without changes to the hardware or
operating system. The ICL3217E powers up again when a
valid RS-232 voltage is applied to any receiver input.
FN4914.6
Features
• Pb-Free Available as an Option (see Ordering Info)
• ESD Protection for RS-232 I/O Pins to 15kV (IEC61000)
• 5V Lower Power Replacement for MAX207E, HIN207E,
HIN237E
• Meets EIA/TIA-232 and V.28/V.24 Specifications at 3V
• Latch-Up Free
• On-Chip Voltage Converters Require Only Four External
0.1F Capacitors
• RS-232 Compatible with VCC = 2.7V
• Automatic Powerdown (ICC = 1A, ICL3217E Only)
• Receiver Hysteresis For Improved Noise Immunity
• Guaranteed Minimum Data Rate . . . . . . . . . . . . . 250kbps
• Guaranteed Minimum Slew Rate . . . . . . . . . . . . . . . 6V/s
• Wide Power Supply Range . . . . . . . Single +3V to +5.5V
Applications
•
•
•
•
•
Battery Powered, Hand-Held, and Portable Equipment
Laptop Computers, Notebooks, Palmtops
Modems, Printers and other Peripherals
ISDN Terminal Adaptors and Set Top Boxes
Related Literature
- Technical Brief TB363, Guidelines for Handling and
Processing Moisture Sensitive Surface Mount
Devices (SMDs)
Pinout
ICL3207E, ICL3217E (SOIC, SSOP)
TOP VIEW
Table 1 summarizes the features of the devices represented
by this data sheet, while application Note AN9863
summarizes the features of each device comprising the
ICL32XXE 3V family.
T3OUT 1
24 T4OUT
T1OUT 2
23 R2IN
T2OUT 3
22 R2OUT
R1IN
4
R1OUT 5
21 T5IN
20 T5OUT
T2IN
6
19 T4IN
T1IN
7
18 T3IN
GND
8
17 R3OUT
VCC
9
16 R3IN
C1+ 10
15 V-
V+ 11
14 C2-
C1- 12
13 C2+
TABLE 1. SUMMARY OF FEATURES
NO. OF MONITOR
RX (ROUTB)
DATA RATE
(kbps)
AUTOMATIC
POWERDOWN
RX ENABLE
MANUAL
FUNCTION? POWER- DOWN? FUNCTION?
NO. OF
TX
NO. OF
RX
ICL3207E
5
3
0
250
NO
NO
NO
ICL3217E (No longer
available or supported)
5
3
0
250
NO
NO
YES
PART NUMBER
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas LLC 2000, 2001, 2004, 2015. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
ICL3207E, ICL3217E
Pin Descriptions
PIN
VCC
FUNCTION
System power supply input (3.0V to 5.5V).
V+
Internally generated positive transmitter supply (+5.5V).
V-
Internally generated negative transmitter supply (-5.5V).
GND
Ground connection.
C1+
External capacitor (voltage doubler) is connected to this lead.
C1-
External capacitor (voltage doubler) is connected to this lead.
C2+
External capacitor (voltage inverter) is connected to this lead.
C2-
External capacitor (voltage inverter) is connected to this lead.
TIN
TTL/CMOS compatible transmitter inputs.
TOUT
RIN
ROUT
15kV ESD Protected, RS-232 level (nominally 5.5V) transmitter outputs.
15kV ESD Protected, RS-232 compatible receiver inputs.
TTL/CMOS level receiver outputs.
Ordering Information
PART NUMBER
(Notes 1, 2)
TEMP. RANGE (°C)
PACKAGE
(RoHS Compliant)
PKG.
DWG. #
ICL3207ECAZ
0 to 70
24 Ld SSOP
M24.209
ICL3207ECBZ
0 to 70
24 Ld SOIC
M24.3
ICL3217ECAZ (No longer available, recommended
replacement: ICL3238ECAZ)
0 to 70
24 Ld SSOP
M24.209
ICL3217ECBZ (No longer available, recommended
replacement: ICL3238ECAZ)
0 to 70
24 Ld SOIC
M24.3
ICL3217EIAZ (No longer available, recommended
replacement: ICL3238ECAZ)
-40 to 85
24 Ld SSOP
M24.209
ICL3217EIBZ (No longer available, recommended
replacement: ICL3238ECAZ)
-40 to 85
24 Ld SOIC
M24.3
NOTES:
1. Most surface mount devices are available on tape and reel; add “-T” to suffix.
2. Intersil Pb-free products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination
finish, which is compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow
temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J Std-020B.
2
ICL3207E, ICL3217E
Typical Operating Circuit
ICL32X7E
C3 (OPTIONAL CONNECTION)
+
9
0.1F
C1 †
C2 †
T1IN
T2IN
T3IN
T4IN
TTL/CMOS
LOGIC LEVELS
T5IN
R1OUT
R2OUT
R3OUT
† - FOR VCC = 3.3V, C1 - C4 = 0.1F or 0.22F
FOR VCC = 5V, C1 - C4 = 0.1F OR 1F
3
+
VCC †
+
+
10
12
13
14
7
C1+
VCC
V+
11
C2+
V-
C2-
15
+
T1
2
T2
3
18
T3
1
19
T4
24
21
T5
20
6
+
C1-
4
5
R1
5k
R2
5k
R3
5k
22
23
17
16
GND
8
C3 †
C4 †
T1OUT
T2OUT
T3OUT
RS-232
LEVELS
T4OUT
T5OUT
R1IN
R2IN
R3IN
RS-232
LEVELS
ICL3207E, ICL3217E
Absolute Maximum Ratings
Thermal Information
VCC to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6V
V+ to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 7V
V- to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3V to -7V
V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14V
Input Voltages
TIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6V
RIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25V
Output Voltages
TOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13.2V
ROUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to VCC + 0.3V
Short Circuit Duration
TOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous
ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . See Specification Table
Thermal Resistance (Typical, Note 3)
JA (‘/W)
24 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . .
75
24 Ld SSOP Package . . . . . . . . . . . . . . . . . . . . . . .
100
Maximum Junction Temperature (Plastic Package) . . . . . . . 150°C
Maximum Storage Temperature Range . . . . . . . . . . . -65°C to 150°C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300°C
(Lead Tips Only)
Operating Conditions
Temperature Range
ICL32X7ECX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
ICL32X7EIX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to 85°C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
3. JA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Electrical Specifications
Test Conditions: VCC = 3V to 5.5V, C1 - C4 = 0.1F; Unless Otherwise Specified.
Typicals are at TA = 25°C
PARAMETER
TEST CONDITIONS
TEMP
(°C)
MIN
TYP
MAX
UNITS
DC CHARACTERISTICS
Supply Current, Automatic
Powerdown
All RIN Open (ICL3217E Only)
25
-
1.0
10
A
Supply Current,
Automatic Powerdown Disabled
All Outputs Unloaded
25
-
0.3
1.0
mA
Full
-
-
0.8
V
Full
2.0
-
-
V
TRANSMITTER INPUTS AND RECEIVER OUTPUTS
Input Logic Threshold Low
TIN
Input Logic Threshold High
TIN
Input Leakage Current
TIN
VCC = 3.3V
VCC = 5.0V
Output Leakage Current
(ICL3217E Only)
Full
2.4
-
-
V
Full
-
0.01
1.0
A
Full
-
0.05
10
A
-
-
0.4
V
-
V
Output Voltage Low
IOUT = 1.6mA
Full
Output Voltage High
IOUT = -1.0mA
Full
VCC-0.6 VCC-0.1
AUTOMATIC POWERDOWN (ICL3217E Only)
Receiver Input Thresholds to
Enable Transmitters
ICL3217E Powers Up (Figure 4)
Full
-2.7
-
2.7
V
Receiver Input Thresholds to
Disable Transmitters
ICL3217E Powers Down (Figure 4)
Full
-0.3
-
0.3
V
Receiver Threshold to
Transmitters Enabled Delay (tWU)
25
-
100
-
s
Receiver Positive or Negative
Threshold to Transmitters
Disabled Delay
25
-
30
-
s
Full
-25
-
25
V
VCC = 3.3V
25
0.6
1.2
-
V
VCC = 5.0V
25
0.8
1.5
-
V
VCC = 3.3V
25
-
1.5
2.4
V
VCC = 5.0V
25
-
1.8
2.4
V
RECEIVER INPUTS
Input Voltage Range
Input Threshold Low
Input Threshold High
4
ICL3207E, ICL3217E
Electrical Specifications
Test Conditions: VCC = 3V to 5.5V, C1 - C4 = 0.1F; Unless Otherwise Specified.
Typicals are at TA = 25°C (Continued)
TEMP
(°C)
MIN
TYP
MAX
UNITS
Input Hysteresis
25
-
0.3
-
V
Input Resistance
25
3
5
7
k
-
V
PARAMETER
TEST CONDITIONS
TRANSMITTER OUTPUTS
Output Voltage Swing
All Transmitter Outputs Loaded with 3k to Ground
Full
5.0
5.4
Output Resistance
VCC = V+ = V- = 0V, Transmitter Output = 2V
Full
300
10M
-

Full
-
35
60
mA
VOUT =12V, VCC = 0V or 3V to 5.5V
In Automatic Powerdown
Full
-
-
25
A
VCC = 3.15V, C1 - C4 = 0.1F, RL = 3kCL = 1000pF
Full
250
500
-
kbps
Output Short-Circuit Current
Output Leakage Current
(ICL3217E Only)
TIMING CHARACTERISTICS
Maximum Data Rate
(One Transmitter Switching)
VCC = 3.0V, C1 - C4 = 0.22F, RL = 3kCL = 1000pF
Full
250
286
-
kbps
VCC  4.5V, C1 - C4 = 0.1F, RL = 3kCL = 1000pF
Full
250
310
-
kbps
Receiver Propagation Delay
Receiver Input to Receiver
Output, CL = 150pF
25
-
0.3
-
s
25
-
0.3
-
s
Transmitter Skew
tPHL - tPLH
Full
-
200
1000
ns
Receiver Skew
tPHL - tPLH
Full
-
100
500
ns
Transition Region Slew Rate
CL = 200pF to 2500pF
VCC = 3.3V, RL = 3kto 7k
Measured From +3V to -3V or -3V
CL = 200pF to 1000pF
to +3V
25
4
15
30
V/s
25
6
15
30
V/s
IEC61000-4-2, Air-Gap Discharge Method
25
-
15
-
kV
IEC61000-4-2, Contact Discharge Method
25
-
8
-
kV
Human Body Model
25
-
15
-
kV
Human Body Model
25
-
2
-
kV
tPHL
tPLH
ESD PERFORMANCE
RS-232 Pins (TOUT, RIN)
All Other Pins
Detailed Description
Transmitters
The ICL32X7E interface ICs operate from a single +3V to
+5.5V power supply, guarantee a 250kbps minimum data
rate, require only four small external 0.1F capacitors,
feature low power consumption, and meet all ElA RS-232C
and V.28 specifications. The circuit is divided into three
sections: charge pump, transmitters and receivers.
The transmitters are proprietary, low dropout, inverting
drivers that translate TTL/CMOS inputs to EIA/TIA-232
output levels. Coupled with the on-chip 5.5V supplies,
these transmitters deliver true RS-232 levels over a wide
range of single supply system voltages.
Charge-Pump
Intersil’s new ICL32XXE family utilizes regulated on-chip
dual charge pumps as voltage doublers, and voltage
inverters to generate 5.5V transmitter supplies from a VCC
supply as low as 3V. This allows these devices to maintain
RS-232 compliant output levels over the 10% tolerance
range of 3.3V powered systems. The efficient on-chip power
supplies require only four small, external 0.1F capacitors
for the voltage doubler and inverter functions at VCC = 3.3V.
See the Capacitor Selection section, and Table 3 for
capacitor recommendations for other operating conditions.
The charge pumps operate discontinuously (i.e., they turn off
as soon as the V+ and V- supplies are pumped up to the
nominal values), resulting in significant power savings.
5
ICL3217E transmitter outputs disable and assume a high
impedance state when the device enters the automatic
powerdown mode. These outputs may be driven to 12V
when disabled.
Both devices guarantee a 250kbps data rate for full load
conditions (3k and 1000pF), VCC  3.0V, with one
transmitter operating at full speed. Under more typical
conditions of VCC  3.3V, RL = 3k, and CL = 250pF, one
transmitter easily operates at 800kbps.
Transmitter inputs float if left unconnected, and may cause
ICC increases. Connect unused inputs to GND for the best
performance.
ICL3207E, ICL3217E
Receivers
VCC
The ICL32X7E each contain inverting receivers that convert
RS-232 signals to CMOS output levels and accept inputs up
to 25V while presenting the required 3k to 7k input
impedance (see Figure 1) even if the power is off
(VCC = 0V). The receivers’ Schmitt trigger input stage uses
hysteresis to increase noise immunity and decrease errors
due to slow input signal transitions.
Receivers on the ICL3207E are always active. The
ICL3217E receivers disable when in the automatic
powerdown state, thereby eliminating the possible current
path through a shutdown peripheral’s input protection diode
(see Figures 2 and 3).
TRANSITION
DETECTOR
TO
WAKE-UP
LOGIC
V-
VCC
RX
POWERED
DOWN
UART
* IN AUTOMATIC
POWERDOWN
These 3V devices require a nominal supply current of
0.3mA, even at VCC = 5.5V, during normal operation (not in
powerdown mode). This is considerably less than the 11mA
current required by comparable 5V RS-232 devices, allowing
users to reduce system power simply by replacing the old
style device with the ICL3207E.
Low Power, Pin Compatible Replacement
Pin compatibility with existing 5V products (e.g., MAX207E),
coupled with the wide operating supply range, make the
ICL32X7E potential lower power, higher performance drop-in
replacements for existing ‘2X7E 5V applications. As long as
the 5V RS-232 output swings are acceptable, the
ICL32X7E devices should work in most 5V applications.
VCC
RXIN
RXOUT
5k
GND  VROUT  VCC
GND
FIGURE 1. INVERTING RECEIVER CONNECTIONS
VCC
VCC
CURRENT
FLOW
VCC
VOUT = VCC
FIGURE 3. DISABLED RECEIVERS PREVENT POWER DRAIN
When replacing a ‘207E or ‘237E device in an existing 5V
application, it is acceptable to terminate C3 to VCC as shown
on the Typical Operating Circuit. Nevertheless, terminate C3
to GND if possible, as slightly better performance results
from this configuration.
Automatic Powerdown (ICL3217E Only)
Even greater power savings is available by using the
ICL3217E which features an automatic powerdown function.
When no valid RS-232 voltages (see Figure 4) are sensed
on any receiver input for 30s, the ICL3217E automatically
enters its powerdown state (see Figure 5). In powerdown,
supply current drops to 1A, because the on-chip charge
pump turns off (V+ collapses to VCC, V- collapses to GND),
and the receiver and transmitter outputs three-state (see
Table 2). This micro-power mode makes the ICL3217E ideal
for battery powered and portable applications. Invalid
receiver levels occur whenever the driving peripheral’s
outputs are shut off (powered down) or when the RS-232
interface cable is disconnected. The ICL3217E powers back
up whenever it detects a valid RS-232 voltage level on any
receiver input (such as when the RS-232 cable is
reconnected). The time to recover from automatic
powerdown mode is typically 100s.
TABLE 2. ICL3217E AUTOMATIC POWERDOWN OPERATION
Rx
RS-232 SIGNAL
PRESENT AT
RECEIVER
INPUT?
POWERED
DOWN
UART
Tx
GND
SHDN = GND
OLD
RS-232 CHIP
FIGURE 2. POWER DRAIN THROUGH POWERED DOWN
PERIPHERAL
6
VOUT = HI-Z*
TX
Low Power Operation
-25V  VRIN  +25V
ICL3217E
MODE
OF
TRANSMITTER RECEIVER
OUTPUTS
OUTPUTS OPERATION
YES
Active
Active
Normal
Operation
NO
High-Z
High-Z
Powerdown
Due to Auto
Powerdown
Logic
ICL3207E, ICL3217E
2.7V
reduces ripple on the transmitter outputs and slightly
reduces power consumption. C2, C3, and C4 can be
increased without increasing C1’s value, however, do not
increase C1 without also increasing C2, C3, and C4 to
maintain the proper ratios (C1 to the other capacitors).
VALID RS-232 LEVEL - ICL3217E IS ACTIVE
INDETERMINATE - POWERDOWN MAY OR
MAY NOT OCCUR
0.3V
INVALID LEVEL - POWERDOWN OCCURS AFTER 30s
-0.3V
INDETERMINATE - POWERDOWN MAY OR
MAY NOT OCCUR
-2.7V
VALID RS-232 LEVEL - ICL3217E IS ACTIVE
When using minimum required capacitor values, make sure
that capacitor values do not degrade excessively with
temperature. If in doubt, use capacitors with a larger nominal
value. The capacitor’s equivalent series resistance (ESR)
usually rises at low temperatures and it influences the
amount of ripple on V+ and V-.
TABLE 3. REQUIRED CAPACITOR VALUES
FIGURE 4. DEFINITION OF VALID RS-232 RECEIVER
LEVELS
VCC (V)
C1 (F)
C2, C3, C4 (F)
3.15 to 3.6
0.1
0.1
3.0 to 3.6
0.22
4.5 to 5.5
0.1 to 1.0
3.0 to 5.5
0.22
INVALID
} REGION
RECEIVER
INPUTS
TRANSMITTER
OUTPUTS
PWR UP (tWU)
AUTOPWDN
V+
0.22
0.1 to 1.0
0.22
Power Supply Decoupling
In most circumstances a 0.1F bypass capacitor is
adequate. In applications that are particularly sensitive to
power supply noise, decouple VCC to ground with a
capacitor of the same value as the charge-pump capacitor C1.
Connect the bypass capacitor as close as possible to the IC.
VCC
0
V-
FIGURE 5. AUTOMATIC POWERDOWN TIMING DIAGRAM
This automatic powerdown feature provides additional
system power savings without changes to the existing
operating system or hardware.
Utilizing power management circuitry, to power down the
rest of the communication circuitry (e.g., the UART) when
the ICL3217E powers down, produces even greater power
savings. Connecting a transition detector to the V- pin (see
Figure 3) is an easy way for the power management logic to
determine when the ICL3217E enters and exits powerdown.
Transmitter Outputs when Exiting
Powerdown
Figure 6 shows the response of two ICL3217E transmitter
outputs when exiting powerdown mode. As they activate, the
two transmitter outputs properly go to opposite RS-232
levels, with no glitching, ringing, nor undesirable transients.
Each transmitter is loaded with 3kin parallel with 2500pF.
Note that the transmitters enable only when the magnitude
of the supplies exceed approximately 3V.
.
5V/DIV
Capacitor Selection
The charge pumps require 0.1F, or greater, capacitors for
3.3V operation. With 0.1F capacitors, five percent tolerance
supplies (e.g., 3.14V minimum) deliver greater than 5V
transmitter swings at full data rate, while ten percent
tolerance supplies (e.g., 2.97V minimum) deliver 4.95V
transmitter swings. If greater than 5V transmitter swings
are required with a 10% tolerance 3.3V supply, 0.22F
capacitors are recommended (see Table 3). Existing 5V
applications typically utilize either 0.1F or 1F capacitors,
and the ICL32X7E works well with either value. New 5V
designs should use 0.22F capacitors for the best results.
For other supply voltages refer to Table 3 for capacitor
values. Do not use values smaller than those listed in
Table 3. Increasing the capacitor values (by a factor of two)
7
RXIN
T1
2V/DIV
T2
VCC = +3.3V
C1 - C4 = 0.1F
TIME (20s/DIV.)
FIGURE 6. TRANSMITTER OUTPUTS WHEN EXITING
POWERDOWN (ICL3217E ONLY)
ICL3207E, ICL3217E
Operation down to 2.7V
ICL32X7E transmitter outputs meet RS-562 levels (3.7V)
with VCC as low as 2.7V. RS-562 levels typically ensure inter
operability with RS-232 devices.
5V/DIV.
T1IN
High Data Rates
The ICL32XX maintain the RS-232 5V minimum transmitter
output voltages even at high data rates. Figure 7 details a
transmitter loopback test circuit, and Figure 8 illustrates the
loopback test result at 120kbps. For this test, all transmitters
were simultaneously driving RS-232 loads in parallel with
1000pF, at 120kbps. Figure 9 shows the loopback results for
a single transmitter driving 1000pF and an RS-232 load at
250kbps. The static transmitters were also loaded with an
RS-232 receiver.
VCC
+
C1
C1+
VCC
V+
C1+
C2
R1OUT
VCC = +3.3V
C1 - C4 = 0.1mF
2s/DIV.
FIGURE 9. LOOPBACK TEST AT 250kbps
Interconnection with 3V and 5V Logic
+
0.1F
T1OUT
ICL32X7E
V-
C2+
C2TIN
+
C3
C4
+
TABLE 4. LOGIC FAMILY COMPATIBILITY WITH VARIOUS
SUPPLY VOLTAGES
TOUT
RIN
ROUT
1000pF
5k
FIGURE 7. TRANSMITTER LOOPBACK TEST CIRCUIT
5V/DIV.
The ICL32X7E directly interface with 5V CMOS and TTL
logic families. Nevertheless, with the ICL32X7E at 3.3V, and
the logic supply at 5V, AC, HC, and CD4000 outputs can
drive ICL32X7E inputs, but ICL32X7E outputs do not reach
the minimum VIH for these logic families. See Table 4 for
more information.
VCC
SYSTEM
POWER-SUPPLY SUPPLY
VOLTAGE
VOLTAGE
(V)
(V)
3.3
3.3
5
5
5
3.3
COMPATIBILITY
Compatible with all CMOS
families.
Compatible with all TTL and
CMOS logic families.
Compatible with ACT and HCT
CMOS, and with TTL. ICL32X7E
outputs are incompatible with AC,
HC, and CD4000 CMOS inputs.
15kV ESD Protection
T1IN
T1OUT
R1OUT
VCC = +3.3V
C1 - C4 = 0.1F
5s/DIV.
FIGURE 8. LOOPBACK TEST AT 120kbps
8
All pins on ICL32XX devices include ESD protection
structures, but the ICL32X7E incorporate advanced
structures which allow the RS-232 pins (transmitter outputs
and receiver inputs) to survive ESD events up to 15kV. The
RS-232 pins are particularly vulnerable to ESD damage
because they typically connect to an exposed port on the
exterior of the finished product. Simply touching the port
pins, or connecting a cable, can cause an ESD event that
might destroy unprotected ICs. These new ESD structures
protect the device whether or not it is powered up, protect
without allowing any latchup mechanism to activate, and
don’t interfere with RS-232 signals as large as 25V.
ICL3207E, ICL3217E
Human Body Model (HBM) Testing
As the name implies, this test method emulates the ESD
event delivered to an IC during human handling. The tester
delivers the charge through a 1.5k current limiting resistor,
making the test less severe than the IEC61000 test which
utilizes a 330 limiting resistor. The HBM method
determines an ICs ability to withstand the ESD transients
typically present during handling and manufacturing. Due to
the random nature of these events, each pin is tested with
respect to all other pins. The RS-232 pins on “E” family
devices can withstand HBM ESD events to 15kV.
IEC61000-4-2 Testing
The IEC61000 test method applies to finished equipment,
rather than to an individual IC. Therefore, the pins most likely
to suffer an ESD event are those that are exposed to the
outside world (the RS-232 pins in this case), and the IC is
tested in its typical application configuration (power applied)
rather than testing each pin-to-pin combination. The lower
current limiting resistor coupled with the larger charge
storage capacitor yields a test that is much more severe than
Typical Performance Curves
the HBM test. The extra ESD protection built into this
device’s RS-232 pins allows the design of equipment
meeting level 4 criteria without the need for additional board
level protection on the RS-232 port.
AIR-GAP DISCHARGE TEST METHOD
For this test method, a charged probe tip moves toward the
IC pin until the voltage arcs to it. The current waveform
delivered to the IC pin depends on approach speed,
humidity, temperature, etc., so it is difficult to obtain
repeatable results. The “E” device RS-232 pins withstand
15kV air-gap discharges.
CONTACT DISCHARGE TEST METHOD
During the contact discharge test, the probe contacts the
tested pin before the probe tip is energized, thereby
eliminating the variables associated with the air-gap
discharge. The result is a more repeatable and predictable
test, but equipment limits prevent testing devices at voltages
higher than 8kV. All “E” family devices survive 8kV contact
discharges on the RS-232 pins.
VCC = 3.3V, TA = 25°C
25
VOUT+
4.0
20
2.0
SLEW RATE (V/s)
TRANSMITTER OUTPUT VOLTAGE (V)
6.0
1 TRANSMITTER AT 250kbps
OTHER TRANSMITTERS AT 30kbps
0
-2.0
15
+SLEW
10
VOUT -
-4.0
-SLEW
-SLEW
-6.0
0
1000
2000
3000
4000
5000
LOAD CAPACITANCE (pF)
FIGURE 10. TRANSMITTER OUTPUT VOLTAGE vs LOAD
CAPACITANCE
9
5
0
1000
2000
3000
4000
LOAD CAPACITANCE (pF)
FIGURE 11. SLEW RATE vs LOAD CAPACITANCE
5000
ICL3207E, ICL3217E
Typical Performance Curves
VCC = 3.3V, TA = 25°C (Continued)
55
3.5
NO LOAD
ALL OUTPUTS STATIC
1 TRANSMITTER SWITCHING
3.0
45
SUPPLY CURRENT (mA)
SUPPLY CURRENT (mA)
50
250kbps
40
35
120kbps
30
25
20kbps
20
2.5
2.0
1.5
1.0
0.5
15
0
1000
2000
3000
4000
5000
LOAD CAPACITANCE (pF)
FIGURE 12. SUPPLY CURRENT vs LOAD CAPACITANCE
WHEN TRANSMITTING DATA
Die Characteristics
SUBSTRATE POTENTIAL (POWERED UP):
GND
TRANSISTOR COUNT:
ICL3207E: 469
ICL3217E: 488
PROCESS:
Si Gate CMOS
10
0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
SUPPLY VOLTAGE (V)
FIGURE 13. SUPPLY CURRENT vs SUPPLY VOLTAGE
6.0
ICL3207E, ICL3217E
Revision History
The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to the web to make sure that
you have the latest revision.
DATE
REVISION
CHANGE
August 21, 2015
FN4914.6
Updated Ordering Information table on page 2.
Added Revision History and About Intersil sections.
Updated Package Outline Drawing M24.3 to the latest revision updates are as follows:
-Revision 0 to Revision 1, Removed µ symbol which is overlapping the alpha symbol in the diagram.
-Revision 1 to Revision 2, Updated to new POD standard by removing table listing dimensions and putting
dimensions on drawing. Added Land Pattern.
About Intersil
Intersil Corporation is a leading provider of innovative power management and precision analog solutions. The company's products
address some of the largest markets within the industrial and infrastructure, mobile computing and high-end consumer markets.
For the most updated datasheet, application notes, related documentation and related parts, please see the respective product
information page found at www.intersil.com.
You may report errors or suggestions for improving this datasheet by visiting www.intersil.com/ask.
Reliability reports are also available from our website at www.intersil.com/support
All Intersil semiconductor products are manufactured, assembled and tested under ISO9001 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from
its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site www.intersil.com
11
ICL3207E, ICL3217E
Shrink Small Outline Plastic Packages (SSOP)
M24.209 (JEDEC MO-150-AG ISSUE B)
N
INDEX
AREA
24 LEAD SHRINK SMALL OUTLINE PLASTIC PACKAGE
H
0.25(0.010) M
2
GAUGE
PLANE
3
0.25
0.010
SEATING PLANE
-A-
INCHES
E
-B-
1
B M
A
D
-C-
µ
e
A1
B
0.25(0.010) M
L
C
0.10(0.004)
C A M
SYMBOL
MIN
MAX
MIN
MAX
NOTES
A
-
0.078
-
2.00
-
0.05
-
-
0.072
1.65
1.85
-
A1
0.002
A2
0.065
B S
B
0.009
0.014
0.22
0.38
9
0.004
0.009
0.09
0.25
-
D
0.312
0.334
7.90
8.50
3
E
0.197
0.220
5.00
5.60
4
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.20mm
(0.0078 inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.20mm (0.0078 inch) per
side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Dimension “B” does not include dambar protrusion. Allowable dambar
protrusion shall be 0.13mm (0.005 inch) total in excess of “B” dimension at maximum material condition.
10. Controlling dimension: MILLIMETER. Converted inch dimensions
are not necessarily exact.
12
0.026 BSC
H
0.292
L
0.022
N

NOTES:
-
C
e
A2
MILLIMETERS
0.65 BSC
0.322
7.40
0.037
0.55
24
0o
-
8.20
-
0.95
6
24
8o
0o
7
8o
Rev. 1
3/95
ICL3207E, ICL3217E
Package Outline Drawing
M24.3
24 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE (SOIC)
Rev 2, 3/11
24
INDEX
AREA
7.60 (0.299)
7.40 (0.291) 10.65 (0.419)
10.00 (0.394)
DETAIL "A"
1
2
3
TOP VIEW
1.27 (0.050)
0.40 (0.016)
SEATING PLANE
2.65 (0.104)
2.35 (0.093)
15.60 (0.614)
15.20 (0.598)
0.75 (0.029)
x 45°
0.25 (0.010)
0.30 (0.012)
0.10 (0.004)
1.27 (0.050)
0.51 (0.020)
0.33 (0.013)
8°
0°
0.32 (0.012)
0.23 (0.009)
SIDE VIEW “B”
SIDE VIEW “A”
1.981 (0.078)
9.373 (0.369)
1.27 (0.050)
0.533 (0.021)
TYPICAL RECOMMENDED LAND PATTERN
13
NOTES:
1. Dimensioning and tolerancing per ANSI Y14.5M-1982.
2. Package length does not include mold flash, protrusions or gate
burrs. Mold flash, protrusion and gate burrs shall not exceed
0.15mm (0.006 inch) per side.
3. Package width does not include interlead flash or protrusions.
Interlead flash and protrusions shall not exceed 0.25mm
(0.010 inch) per side.
4. The chamfer on the body is optional. If it is not present, a visual
index feature must be located within the crosshatched area.
5. Terminal numbers are shown for reference only.
6. The lead width as measured 0.36mm (0.014 inch) or greater above
the seating plane, shall not exceed a maximum value of 0.61mm
(0.024 inch).
7. Controlling dimension: MILLIMETER. Converted inch dimensions in
( ) are not necessarily exact.
8. This outline conforms to JEDEC publication MS-013-AD ISSUE C.
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