DATASHEET

ICL3238E
®
Data Sheet
July 2004
±15kV ESD Protected, +3V to +5.5V, 10nA,
250kbps, RS-232 Transceiver with
Enhanced Automatic Powerdown
The Intersil ICL3238E contains 3.0V to 5.5V powered
RS-232 transmitters/receivers which meet ElA/TIA-232 and
V.28/V.24 specifications, even at VCC = 3.0V. Additionally, it
provides ±15kV ESD protection (IEC61000-4-2 Air Gap and
Human Body Model) on transmitter outputs and receiver
inputs (RS-232 pins). Targeted applications are cell phones,
Palmtops, and data cables where the low operational, and
even lower standby, power consumption is critical. Efficient
on-chip charge pumps, coupled with manual and enhanced
automatic powerdown functions, reduce the standby supply
current to a 10nA trickle. Small footprint packaging, and the
use of small, low value capacitors ensure board space
savings as well. Data rates greater than 250kbps are
guaranteed at worst case load conditions providing
compatibility with popular PC communication software.
The ICL3238E is a 5 driver, 3 receiver device optimized for
DCE applications with full hardware handshaking. It also
includes a noninverting always-active receiver for RING
INDICATOR monitoring.
This device, features an enhanced automatic powerdown
function which powers down the on-chip power-supply and
driver circuits. This occurs when all receiver and transmitter
inputs detect no signal transitions for a period of 30s. The
ICL3238E powers back up, automatically, whenever it
senses a transition on any transmitter or receiver input.
The transmitter and logic inputs include active feedback
resistors that retain the input state once driven to a valid
logic level.
FN6012.3
Features
• Pb-Free Available as an Option (see Ordering Info)
• ESD Protection for RS-232 I/O Pins to ±15kV (IEC61000)
• Active Feedback Resistors on TX and Logic Inputs.
• Manual and Enhanced Automatic Powerdown Features
• Pin Compatible Replacement for MAX3238E, MAX3238,
SP3238E
• Meets EIA/TIA-232 and V.28/V.24 Specifications at 3V
• RS-232 Compatible Outputs at 2.7V Supply
• Flow Through Pinout
• Latch-Up Free
• On-Chip Voltage Converters Require Only Four External
Capacitors
• Receiver and Transmitter Hysteresis For Improved Noise
Immunity
• Guaranteed Minimum Data Rate . . . . . . . . . . . . . 250kbps
• Guaranteed Minimum Slew Rate . . . . . . . . . . . . . . . 6V/µs
• Wide Power Supply Range . . . . . . . Single +3V to +5.5V
• Low Supply Current in Powerdown State. . . . . . . . . 10nA
Applications
• Any System Requiring RS-232 Communication Ports
- Battery Powered, Hand-Held, and Portable Equipment
- Data Cradles
- Modems, Printers and other Peripherals
- Cellular/Mobile Phones, Data Cables
Table 1 summarizes the features of the ICL3238E, while
Application Note AN9863 summarizes the features of each
device comprising the ICL32XXE 3V family.
TABLE 1. SUMMARY OF FEATURES
PART
NUMBER
ICL3238E
NO. OF NO. OF
Tx.
Rx.
5
3
1
NO. OF
MONITOR Rx.
(ROUTB)
DATA
RATE
(kbps)
Rx. ENABLE
FUNCTION?
1
250
No
READY
OUTPUT?
MANUAL
POWERDOWN?
ENHANCED
AUTOMATIC
POWERDOWN
FUNCTION?
No
Yes
Yes
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2003, 2004. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
ICL3238E
Pinout
Ordering Information
ICL3238E (SSOP, TSSOP)
TOP VIEW
PART NO.
TEMP.
RANGE (oC)
PACKAGE
PKG.
DWG. #
C2+
1
28 C1+
ICL3238ECA
0 to 70
28 Ld SSOP
M28.209
GND
2
27 V+
ICL3238ECA-T
0 to 70
M28.209
C2-
3
26 VCC
28 Ld SSOP
Tape and Reel
V-
4
25 C1-
0 to 70
28 Ld SSOP (Pb-Free)
M28.209
T1OUT
5
24 T1IN
ICL3238ECAZ
(Note)
T2OUT
6
23 T2IN
0 to 70
28 Ld SSOP
M28.209
Tape and Reel (Pb-Free)
T3OUT
7
22 T3IN
ICL3238ECAZ-T
(Note)
R1IN
8
21 R1OUT
R2IN
9
20 R2OUT
19 T4IN
T4OUT 10
18 R3OUT
R3IN 11
17 T5IN
T5OUT 12
ICL3238EIA
-40 to 85
28 Ld SSOP
M28.209
ICL3238EIA-T
-40 to 85
28 Ld SSOP
Tape and Reel
M28.209
ICL3238EIAZ
(Note)
-40 to 85
28 Ld SSOP
(Pb-Free)
M28.209
16 R1OUTB
ICL3238EIAZ-T
(Note)
-40 to 85
FORCEON 13
28 Ld SSOP
M28.209
Tape and Reel (Pb-Free)
FORCEOFF 14
15 INVALID
ICL3238EIV-T
-40 to 85
28 Ld TSSOP
Tape and Reel
ICL3238EIVZ-T
(Note)
-40 to 85
28 Ld TSSOP
M28.173
Tape and Reel (Pb-Free)
M28.173
NOTE: Intersil Pb-free products employ special Pb-free material sets;
molding compounds/die attach materials and 100% matte tin plate
termination finish, which is compatible with both SnPb and Pb-free
soldering operations. Intersil Pb-free products are MSL classified at
Pb-free peak reflow temperatures that meet or exceed the Pb-free
requirements of IPC/JEDEC J Std-020B.
Pin Descriptions
PIN
VCC
FUNCTION
System Power Supply Input (3.0V to 5.5V).
V+
Internally Generated Positive Transmitter Supply (+5.5V).
V-
Internally Generated Negative Transmitter Supply (-5.5V).
GND
Ground Connection.
C1+
External Capacitor (Voltage Doubler) is connected to this lead.
C1-
External Capacitor (Voltage Doubler) is connected to this lead.
C2+
External Capacitor (Voltage Inverter) is connected to this lead.
C2-
External Capacitor (Voltage Inverter) is connected to this lead.
TIN
TTL/CMOS Compatible Transmitter Inputs (Note 1).
TOUT
RIN
ROUT
ROUTB
INVALID
±15kV ESD Protected, RS-232 Level (Nominally ±5.5V) Transmitter Outputs.
±15kV ESD Protected, RS-232 Compatible Receiver Inputs.
TTL/CMOS Level Receiver Outputs.
TTL/CMOS Level, Noninverting, Always Enabled Receiver Outputs.
Active Low Output that indicates if no valid RS-232 levels are present on any receiver input.
FORCEOFF Active Low to Shut Down Transmitters and On-Chip Power Supply. This overrides any automatic circuitry and FORCEON (see Table 2,
Note 1).
FORCEON Active High Input to override automatic powerdown circuitry thereby keeping transmitters active. (FORCEOFF must be high, Note 1).
NOTE:
1. These input pins incorporate positive feedback resistors. Once the input is driven to a valid logic level, the feedback resistor maintains that logic
level until VCC is removed. Unused transmitter inputs may be left unconnected by the user.
2
ICL3238E
Typical Operating Circuit
ICL3238E
C3 (OPTIONAL CONNECTION, NOTE 2)
+
0.1µF
NOTE 3
28
C1
0.1µF
+
C2
0.1µF
+
25
1
3
26
C1+
+
+3.3V
27
VCC
C1C2+
V-
C2-
24
T1
23
T2
+
V+
4
5
T1IN
NOTE 3
C4
0.1µF
+
T1OUT
6
T2IN
T2OUT
T3
22
7
T3IN
T3OUT
T4
19
RS-232
LEVELS
10
T4IN
T4OUT
T5
17
12
T5IN
TTL/CMOS
LOGIC LEVELS
C3
0.1µF
T5OUT
16
R1OUTB
21
8
R1OUT
R1IN
R1
5kΩ
20
9
R2OUT
R2IN
R2
5kΩ
18
RS-232
LEVELS
11
R3OUT
R3IN
R3
5kΩ
13
FORCEON
VCC
TO POWER
CONTROL LOGIC
14
FORCEOFF
15
INVALID
GND
2
NOTES:
2. The negative terminal of C3 can be connected to either VCC or GND.
3. For VCC = 3.15V (3.3V -5%), use C1 - C4 = 0.1µF or greater. For VCC = 3.0V (3.3V -10%), use C1 - C4 = 0.22µF.
3
ICL3238E
Absolute Maximum Ratings
Thermal Information
VCC to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6V
V+ to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 7V
V- to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3V to -7V
V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14V
Input Voltages
TIN, FORCEOFF, FORCEON . . . . . . . . . . . . . . . . . . -0.3V to 6V
RIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25V
Output Voltages
TOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±13.2V
ROUT, INVALID . . . . . . . . . . . . . . . . . . . . . . . -0.3V to VCC +0.3V
Short Circuit Duration
TOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous
ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . See Specification Table
Thermal Resistance (Typical, Note 4)
θJA (oC/W)
28 Ld TSSOP Package . . . . . . . . . . . . . . . . . . . . . .
100
28 Ld SSOP Package . . . . . . . . . . . . . . . . . . . . . . .
110
Maximum Junction Temperature (Plastic Package) . . . . . . . 150oC
Maximum Storage Temperature Range . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC
(Lead Tips Only)
Operating Conditions
Temperature Range
ICL3238ECX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to 70oC
ICL3238EIX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
4. θJA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Electrical Specifications
Test Conditions: VCC = 3.15V to 5.5V, C1 - C4 = 0.1µF; VCC = 3V, C1 - C4 = 0.22µF; Unless Otherwise
Specified. Typicals are at TA = 25oC
PARAMETER
TEST CONDITIONS
TEMP
(oC)
MIN
TYP
MAX
UNITS
DC CHARACTERISTICS
Supply Current, Automatic
Powerdown
All RIN Open, FORCEON = GND, FORCEOFF = VCC
25
-
10
300
nA
Supply Current, Powerdown
FORCEOFF = GND
25
-
10
300
nA
Supply Current,
Automatic Powerdown Disabled
All Outputs Unloaded, FORCEON = FORCEOFF = VCC
25
-
0.3
1.0
mA
LOGIC AND TRANSMITTER INPUTS AND RECEIVER OUTPUTS
TIN Active
Input Logic Threshold Low
Input Logic Threshold High
Full
-
-
0.8
V
TIN, FORCEON, FORCEOFF
Wake up Threshold
VCC = 3.3V
Full
-
-
0.8
V
VCC = 5.0V
Full
-
-
0.8
V
TIN Active
VCC = 3.6V
Full
2.0
-
-
V
TIN, FORCEON, FORCEOFF
Wake up Threshold
VCC = 3.3V
Full
2.0
-
-
V
VCC = 5.0V
Full
2.4
-
-
V
Input Leakage Current
TIN, FORCEON, FORCEOFF, VIN = 0V or VCC (Note 5)
Full
-
±0.01
±1.0
µA
Output Leakage Current
FORCEOFF = GND
Full
-
±0.05
±10
µA
Output Voltage Low
IOUT = 1.0mA
Full
-
-
0.4
V
Output Voltage High
IOUT = -1.0mA
Full
-
V
VCC -0.6 VCC -0.1
RECEIVER INPUTS
Input Voltage Range
Input Threshold Low
Input Threshold High
Full
-25
-
25
V
VCC = 3.3V
Full
0.6
1.2
-
V
VCC = 5.0V
Full
0.8
1.5
-
V
VCC = 3.3V
Full
-
1.5
2.4
V
VCC = 5.0V
Full
-
1.8
2.4
V
Input Hysteresis
25
-
0.6
-
V
Input Resistance
25
3
5
7
kΩ
4
ICL3238E
Electrical Specifications
Test Conditions: VCC = 3.15V to 5.5V, C1 - C4 = 0.1µF; VCC = 3V, C1 - C4 = 0.22µF; Unless Otherwise
Specified. Typicals are at TA = 25oC (Continued)
PARAMETER
TEST CONDITIONS
TEMP
(oC)
MIN
TYP
MAX
UNITS
ENHANCED AUTOMATIC POWERDOWN (FORCEON = GND, FORCEOFF = VCC)
Receiver Input Thresholds to
INVALID High
(Figure 6)
Full
-2.7
-
2.7
V
Receiver Input Thresholds to
INVALID Low
(Figure 6)
Full
-0.3
-
0.3
V
INVALID Output Voltage Low
IOUT = 1.0mA
Full
-
-
0.4
V
INVALID Output Voltage High
IOUT = -1.0mA
Full
VCC-0.6
-
-
V
Receiver Positive or Negative
Threshold to INVALID High Delay
(tINVH)
25
-
0.3
-
µs
Receiver Positive or Negative
Threshold to INVALID Low Delay
(tINVL)
25
-
60
-
µs
Receiver or Transmitter Edge to
Transmitters Enabled Delay (tWU)
(Note 6)
25
-
25
-
µs
Receiver or Transmitter Edge to
Transmitters Disabled Delay
(tAUTOPWDN)
(Note 6)
Full
15
30
60
s
Output Voltage Swing
All Transmitter Outputs Loaded with 3kΩ to Ground
Full
±5.0
±5.4
-
V
Output Resistance
VCC = V+ = V- = 0V, Transmitter Output = ±2V
Full
300
10M
-
Ω
Full
-
±35
±60
mA
VOUT = ±12V, VCC = 0V or 3V to 5.5V,
Automatic Powerdown or FORCEOFF = GND
Full
-
-
±25
µA
Maximum Data Rate
RL = 3kΩ, CL = 1000pF, One Transmitter Switching
Full
250
500
-
kbps
Receiver Propagation Delay
Receiver Input to Receiver
Output, CL = 150pF
tPHL
25
-
0.15
-
µs
tPLH
25
-
0.15
-
µs
TRANSMITTER OUTPUTS
Output Short-Circuit Current
Output Leakage Current
TIMING CHARACTERISTICS
Receiver Output Enable Time
Normal Operation
25
-
150
-
ns
Receiver Output Disable Time
Normal Operation
25
-
300
-
ns
Transmitter Skew
tPHL - tPLH
25
-
50
-
ns
Receiver Skew
tPHL - tPLH
Transition Region Slew Rate
VCC = 3.3V,
RL = 3kΩ to 7kΩ,
Measured From 3V to -3V or -3V
to 3V
25
-
50
-
ns
CL = 150pF to 1000pF
25
6
15
30
V/µs
CL = 150pF to 2500pF
25
4
12
30
V/µs
IEC61000-4-2 Air Gap Discharge
25
-
±15
-
kV
IEC61000-4-2 Contact Discharge
25
-
±8
-
kV
Human Body Model
25
-
±15
-
kV
Human Body Model
25
-
±2.5
-
kV
ESD PERFORMANCE
RS-232 Pins (TOUT, RIN)
All Other Pins
NOTES:
5. These inputs utilize a positive feedback resistor. The input current is negligible when the input is at either supply rail.
6. An “edge” is defined as a transition through the transmitter or receiver input thresholds.
5
ICL3238E
Detailed Description
ICL3238E operates from a single +3V to +5.5V supply,
guarantees a 250kbps minimum data rate, requires only four
small external 0.1µF (0.22µF for VCC = 3.0V) capacitors,
features low power consumption, and meets all EIA/TIA-232
and V.28 specifications. The circuit is divided into three
sections: The charge pump, the transmitters, and the
receivers.
Charge-Pump
Intersil’s new ICL32XXE family utilizes regulated on-chip
dual charge pumps as voltage doublers, and voltage
inverters to generate ±5.5V transmitter supplies from a VCC
supply as low as 3.0V. This allows these devices to maintain
RS-232 compliant output levels over the ±10% tolerance
range of 3.3V powered systems. The efficient on-chip power
supplies require only four small, external 0.1µF capacitors
for the voltage doubler and inverter functions at VCC = 3.3V.
See the “Capacitor Selection” section, and Table 3 for
capacitor recommendations for other operating conditions.
The charge pumps operate discontinuously (i.e., they turn off
as soon as the V+ and V- supplies are pumped up to the
nominal values), resulting in significant power savings.
Transmitters
The transmitters are proprietary, low dropout, inverting
drivers that translate TTL/CMOS inputs to EIA/TIA-232
output levels. Coupled with the on-chip ±5.5V supplies,
these transmitters deliver true RS-232 levels over a wide
range of single supply system voltages.
Transmitter outputs disable and assume a high impedance
state when the device enters the powerdown mode (see
Table 2). These outputs may be driven to ±12V when
disabled.
All devices guarantee a 250kbps data rate for full load
conditions (3kΩ and 1000pF), VCC ≥ 3.0V, with one
transmitter operating at full speed. Under more typical
conditions of VCC ≥ 3.3V, RL = 3kΩ, and CL = 250pF, one
transmitter easily operates at 1Mbps.
Transmitter inputs incorporate an active positive feedback
resistor that maintains the last driven input state in the
absence of a forcing signal. Unused transmitter inputs may
be left unconnected.
Receivers
The ICL3238E contains both standard inverting, three-state
receivers, and a single noninverting (monitor) receiver
(denoted by the ROUTB label) that is always active,
regardless of the state of any control lines. Both receiver
types convert RS-232 signals to CMOS output levels and
accept inputs up to ±25V while presenting the required 3kΩ
to 7kΩ input impedance (see Figure 1) even if the power is
off (VCC = 0V). The receivers’ Schmitt trigger input stage
uses hysteresis to increase noise immunity and decrease
errors due to slow input signal transitions.
The inverting receivers disable during forced (manual)
powerdown, but not during automatic powerdown (see
Table 2). Conversely, the monitor receiver remains active
TABLE 2. POWERDOWN LOGIC TRUTH TABLE
RCVR OR
XMTR
EDGE
WITHIN 30
SEC?
FORCEOFF FORCEON TRANSMITTER RECEIVER
INPUT
INPUT
OUTPUTS
OUTPUTS
ROUTB
OUTPUT
RS-232
LEVEL
PRESENT
AT
RECEIVER
INPUT?
INVALID
OUTPUT
No
H
H
Active
Active
Active
No
L
No
H
H
Active
Active
Active
Yes
H
Yes
H
L
Active
Active
Active
No
L
Yes
H
L
Active
Active
Active
Yes
H
No
H
L
High-Z
Active
Active
No
L
No
H
L
High-Z
Active
Active
Yes
H
X
L
X
High-Z
High-Z
Active
No
L
X
L
X
High-Z
High-Z
Active
Yes
H
MODE OF OPERATION
Normal Operation (Enhanced
Auto Powerdown Disabled)
Normal Operation (Enhanced
Auto Powerdown Enabled)
Powerdown Due to Enhanced
Auto Powerdown Logic
Manual Powerdown
INVALID DRIVING FORCEON AND FORCEOFF (EMULATES AUTOMATIC POWERDOWN)
X
Note 7
Note 7
Active
Active
Active
Yes
H
Normal Operation
X
Note 7
Note 7
High-Z
High-Z
Active
No
L
Forced Auto Powerdown
NOTE:
7. Input is connected to INVALID Output.
6
ICL3238E
even during manual powerdown making it extremely useful
for RING INDICATOR monitoring. Standard receivers driving
powered down peripherals must be disabled to prevent
current flow through the peripheral’s protection diodes (see
Figures 2 and 3). This renders them useless for wake up
functions, but the corresponding monitor receiver can be
dedicated to this task as shown in Figure 3.
VCC
Software Controlled (Manual) Powerdown
RXOUT
RXIN
-25V ≤ VRIN ≤ +25V
GND ≤ VROUT ≤ VCC
5kΩ
GND
FIGURE 1. INVERTING RECEIVER CONNECTIONS
VCC
VCC
CURRENT
FLOW
VCC
VOUT = VCC
Rx
POWERED
DOWN
UART
SHDN = GND
The ICL3238E allows the user to force the IC into the low
power, standby state, and utilizes a two pin approach where
the FORCEON and FORCEOFF inputs determine the IC’s
mode. For always enabled operation, FORCEON and
FORCEOFF are both strapped high. To switch between
active and powerdown modes, under logic or software
control, only the FORCEOFF input need be driven. The
FORCEON state isn’t critical, as FORCEOFF dominates
over FORCEON. Nevertheless, if strictly manual control over
powerdown is desired, the user must strap FORCEON high
to disable the enhanced automatic powerdown circuitry.
ICL3238E inverting (standard) receiver outputs also disable
when the device is in manual powerdown, thereby
eliminating the possible current path through a shutdown
peripheral’s input protection diode (see Figures 2 and 3).
Connecting FORCEOFF and FORCEON together disables
the enhanced automatic powerdown feature, enabling them
to function as a manual SHUTDOWN input (see Figure 4).
Tx
GND
current required by 5V RS-232 devices. The already low
current requirement drops significantly when the device
enters powerdown mode. In powerdown, supply current
drops to 10nA, because the on-chip charge pump turns off
(V+ collapses to VCC, V- collapses to GND), and the
transmitter outputs three-state. This micro-power mode
makes this device ideal for battery powered and portable
applications.
OLD
RS-232 CHIP
FORCEOFF
FIGURE 2. POWER DRAIN THROUGH POWERED DOWN
PERIPHERAL
PWR
MGT
LOGIC
FORCEON
INVALID
VCC
ICL3238E
TRANSITION
DETECTOR
TO
WAKE-UP
LOGIC
ICL3238E
I/O
UART
CPU
VCC
R1OUTB
RX
POWERED
DOWN
UART
VOUT = HI-Z
R1OUT
TX
R1IN
T1IN
T1OUT
FORCEOFF = GND
FIGURE 3. DISABLED RECEIVERS PREVENT POWER DRAIN
Powerdown Functionality
This 3V RS-232 interface device requires a nominal supply
current of 0.3mA during normal operation (not in powerdown
mode). This is considerably less than the 5mA to 11mA
7
FIGURE 4. CONNECTIONS FOR MANUAL POWERDOWN
WHEN NO VALID RECEIVER SIGNALS ARE
PRESENT
With any of the above control schemes, the time required to
exit powerdown, and resume transmission is only 25µs.
When using both manual and enhanced automatic
powerdown (FORCEON = 0), the ICL3238E won’t power up
from manual powerdown until both FORCEOFF and
FORCEON are driven high, or until a transition occurs on a
receiver or transmitter input. Figure 5 illustrates a circuit for
ensuring that the ICL3238E powers up as soon as
ICL3238E
FORCEOFF switches high. The rising edge of the Master
Powerdown signal forces the device to power up, and the
ICL3238E returns to enhanced automatic powerdown mode
an RC time constant after this rising edge. The time constant
isn’t critical, because the ICL3238E remains powered up for
30 seconds after the FORCEON falling edge, even if there
are no signal transitions. This gives slow-to-wake systems
(e.g., a mouse) plenty of time to start transmitting, and as
long as it starts transmitting within 30 seconds both systems
remain enabled.
POWER
MANAGEMENT
UNIT
MASTER POWERDOWN LINE
0.1µF
FORCEOFF
1MΩ
FORCEON
ICL3238E
FIGURE 5. CIRCUIT TO ENSURE IMMEDIATE POWER UP
WHEN EXITING FORCED POWERDOWN
RING INDICATOR signal, as long as the other receiver
inputs are floating, or driven to GND (as in the case of a
powered down driver).
Enhanced Automatic Powerdown
Even greater power savings is available by using this device
which features an enhanced automatic powerdown function.
When the enhanced powerdown logic determines that no
transitions have occurred on any of the transmitter nor
receiver inputs for 30 seconds, the charge pump and
transmitters powerdown, thereby reducing supply current to
10nA. The ICL3238E automatically powers back up
whenever it detects a transition on one of these inputs. This
automatic powerdown feature provides additional system
power savings without changes to the existing operating
system.
Enhanced automatic powerdown operates when the
FORCEON input is low, and the FORCEOFF input is high.
Tying FORCEON high disables automatic powerdown, but
manual powerdown is always available via the overriding
FORCEOFF input. Table 2 summarizes the enhanced
automatic powerdown functionality.
INVALID Output
FORCEOFF
The INVALID output always indicates (see Table 2) whether
or not 30µs have elapsed with invalid RS-232 signals (see
Figures 6 and 8) persisting on all of the receiver inputs,
T_IN
EDGE
DETECT
S
30s
TIMER
AUTOSHDN
VALID RS-232 LEVEL - INVALID = 1
2.7V
R_IN
R
EDGE
DETECT
INDETERMINATE
0.3V
INVALID LEVEL - INVALID = 0
-0.3V
FORCEON
FIGURE 7. ENHANCED AUTOMATIC POWERDOWN LOGIC
INDETERMINATE
-2.7V
VALID RS-232 LEVEL - INVALID = 1
FIGURE 6. DEFINITION OF VALID RS-232 RECEIVER LEVELS
giving the user an easy way to determine when the interface
block should power down. Invalid receiver levels occur
whenever the driving peripheral’s outputs are shut off
(powered down) or when the RS-232 interface cable is
disconnected. In the case of a disconnected interface cable
where all the receiver inputs are floating (but pulled to GND
by the internal receiver pull down resistors), the INVALID
logic detects the invalid levels and drives the output low. The
power management logic then uses this indicator to power
down the interface block. Reconnecting the cable restores
valid levels at the receiver inputs, INVALID switches high,
and the power management logic wakes up the interface
block. INVALID can also be used to indicate the DTR or
8
Figure 7 illustrates the enhanced powerdown control logic.
Note that once the ICL3238E enters powerdown (manually
or automatically), the 30 second timer remains timed out
(set), keeping the ICL3238E powered down until FORCEON
transitions high, or until a transition occurs on a receiver or
transmitter input.
The INVALID output signal switches low to indicate that
invalid levels have persisted on all of the receiver inputs for
more than 60µs (see Figure 8), but this has no direct effect
on the state of the ICL3238E (see the next sections for
methods of utilizing INVALID to power down the device).
INVALID switches high 1µs after detecting a valid RS-232
level on a receiver input. INVALID operates in all modes
(forced or automatic powerdown, or forced on), so it is also
useful for systems employing manual powerdown circuitry.
The time to recover from automatic powerdown mode is
typically 25µs.
ICL3238E
RECEIVER
INPUTS
} INVALID
REGION
TRANSMITTER
INPUTS
TRANSMITTER
OUTPUTS
tINVH
INVALID
OUTPUT
tINVL
tAUTOPWDN
tAUTOPWDN
tWU
tWU
V+
VCC
0
V-
FIGURE 8. ENHANCED AUTOMATIC POWERDOWN, AND INVALID TIMING DIAGRAMS
FORCEOFF
For devices which communicate only through a detachable
cable, connecting INVALID to FORCEOFF (with FORCEON
= 0) may be a desirable configuration. While the cable is
attached INVALID and FORCEOFF remain high, so the
enhanced automatic powerdown logic powers down the RS232 device whenever there is 30 seconds of inactivity on the
receiver and transmitter inputs. Detaching the cable allows
the receiver inputs to drop to an invalid level (GND), so
INVALID switches low and forces the RS-232 device to
power down. The ICL3238E remains powered down until the
cable is reconnected (INVALID = FORCEOFF = 1) and a
transition occurs on a receiver or transmitter input (see
Figure 7). For immediate power up when the cable is
reattached, connect FORCEON to FORCEOFF through a
network similar to that shown in Figure 5.
FORCEON
Hybrid Automatic Powerdown Options
If enhanced automatic powerdown isn’t desired, the user can
implement the standard automatic powerdown feature
(mimics the function on the ICL3221, ICL3223, ICL3243E)
by connecting the INVALID output to the FORCEON and
FORCEOFF inputs, as shown in Figure 9. After 60µs of
invalid receiver levels, INVALID switches low and drives the
ICL3238E into a forced powerdown condition. INVALID
switches high as soon as a receiver input senses a valid RS232 level, forcing the ICL3238E to power on. See the
“INVALID DRIVING FORCEON AND FORCEOFF” section
of Table 2 for an operational summary. This operational
mode is perfect for handheld devices that communicate with
another computer via a detachable cable. Detaching the
cable allows the internal receiver pull-down resistors to pull
the inputs to GND (an invalid RS-232 level), causing the
60µs timer to time-out and drive the IC into powerdown.
Reconnecting the cable restores valid levels, causing the IC
to power back up.
INVALID
Emulating Standard Automatic Powerdown
ICL3238E
I/O
UART
Capacitor Selection
The charge pumps require 0.1µF, or greater, capacitors for
3.3V (5% tolerance) operation. For other supply voltages
refer to Table 3 for capacitor values. Do not use values
smaller than those listed in Table 3. Increasing the capacitor
values (by a factor of 2) reduces ripple on the transmitter
outputs and slightly reduces power consumption. C2, C3,
and C4 can be increased without increasing C1’s value,
however, do not increase C1 without also increasing C2, C3,
and C4 to maintain the proper ratios (C1 to the other
capacitors).
TABLE 3. REQUIRED CAPACITOR VALUES
CPU
FIGURE 9. CONNECTIONS FOR AUTOMATIC POWERDOWN
WHEN NO VALID RECEIVER SIGNALS ARE
PRESENT
9
VCC (V)
C1 (µF)
C2, C3, C4 (µF)
3.0 to 3.6 (3.3V ±10%)
0.22
0.22
3.15 to 3.6 (3.3V ±5%)
0.1
0.1
4.5 to 5.5
0.047
0.33
3.0 to 5.5
0.22
1
ICL3238E
When using minimum required capacitor values, make sure
that capacitor values do not degrade excessively with
temperature. If in doubt, use capacitors with a larger nominal
value. The capacitor’s equivalent series resistance (ESR)
usually rises at low temperatures and it influences the
amount of ripple on V+ and V-.
an RS-232 load at 250kbps. The static transmitters were
also loaded with an RS-232 receiver.
VCC
+
Power Supply Decoupling
+
0.1µF
VCC
C1+
V+
C1
In most circumstances a 0.1µF bypass capacitor is
adequate. In applications that are particularly sensitive to
power supply noise, decouple VCC to ground with a
capacitor of the same value as the charge-pump capacitor C1.
Connect the bypass capacitor as close as possible to the IC.
C1ICL3238E
+
V-
C2+
C2
TIN
TOUT
RIN
ROUT
ICL3238E transmitter outputs meet RS-562 levels (±3.7V), at
full data rate, with VCC as low as 2.7V. RS-562 levels
typically ensure inter operability with RS-232 devices.
FORCEON
VCC
5k
FORCEOFF
5V/DIV.
T1IN
T1OUT
FORCEOFF
T1
R1OUT
VCC = +3.3V
C1 - C4 = 0.1µF
5µs/DIV.
2V/DIV
FIGURE 12. LOOPBACK TEST AT 120kbps
T2
VCC = +3.3V
C1 - C4 = 0.1µF
5V/DIV.
T1IN
TIME (20µs/DIV.)
FIGURE 10. TRANSMITTER OUTPUTS WHEN EXITING
POWERDOWN
T1OUT
High Data Rates
The ICL3238E maintains the RS-232 ±5V minimum
transmitter output voltages even at high data rates. Figure
11 details a transmitter loopback test circuit, and Figure 12
illustrates the loopback test result at 120kbps. For this test,
all transmitters were simultaneously driving RS-232 loads in
parallel with 1000pF, at 120kbps. Figure 13 shows the
loopback results for a single transmitter driving 1000pF and
10
1000pF
FIGURE 11. TRANSMITTER LOOPBACK TEST CIRCUIT
Figure 10 shows the response of two transmitter outputs
when exiting powerdown mode. As they activate, the two
transmitter outputs properly go to opposite RS-232 levels,
with no glitching, ringing, nor undesirable transients. Each
transmitter is loaded with 3kΩ in parallel with 2500pF. Note
that the transmitters enable only when the magnitude of the
supplies exceed approximately 3V.
5V/DIV
C4
+
C2-
Operation Down to 2.7V
Transmitter Outputs when Exiting
Powerdown
+
C3
R1OUT
VCC = +3.3V
C1 - C4 = 0.1µF
2µs/DIV.
FIGURE 13. LOOPBACK TEST AT 250kbps
ICL3238E
Interconnection with 3V and 5V Logic
Human Body Model (HBM) Testing
The ICL3238E directly interfaces with 5V CMOS and TTL
logic families. Nevertheless, with the ICL32XX at 3.3V, and
the logic supply at 5V, AC, HC, and CD4000 outputs can
drive ICL32XX inputs, but ICL32XX outputs do not reach the
minimum VIH for these logic families. See Table 4 for more
information.
As the name implies, this test method emulates the ESD
event delivered to an IC during human handling. The tester
delivers the charge through a 1.5kΩ current limiting resistor,
making the test less severe than the IEC61000 test which
utilizes a 330Ω limiting resistor. The HBM method
determines an ICs ability to withstand the ESD transients
typically present during handling and manufacturing. Due to
the random nature of these events, each pin is tested with
respect to all other pins. The RS-232 pins on “E” family
devices can withstand HBM ESD events to ±15kV.
TABLE 4. LOGIC FAMILY COMPATIBILITY WITH VARIOUS
SUPPLY VOLTAGES
VCC
SYSTEM
POWER-SUPPLY SUPPLY
VOLTAGE
VOLTAGE
(V)
(V)
3.3
3.3
5
5
5
3.3
IEC61000-4-2 Testing
COMPATIBILITY
Compatible with all CMOS
families.
Compatible with all TTL and
CMOS logic families.
Compatible with ACT and HCT
CMOS, and with TTL. ICL32XX
outputs are incompatible with AC,
HC, and CD4000 CMOS inputs.
±15kV ESD Protection
All pins on ICL32XX devices include ESD protection
structures, but the ICL32XXE family incorporates advanced
structures which allow the RS-232 pins (transmitter outputs
and receiver inputs) to survive ESD events up to ±15kV. The
RS-232 pins are particularly vulnerable to ESD damage
because they typically connect to an exposed port on the
exterior of the finished product. Simply touching the port
pins, or connecting a cable, can cause an ESD event that
might destroy unprotected ICs. These new ESD structures
protect the device whether or not it is powered up, protect
without allowing any latchup mechanism to activate, and
don’t interfere with RS-232 signals as large as ±25V.
11
The IEC61000 test method applies to finished equipment,
rather than to an individual IC. Therefore, the pins most likely
to suffer an ESD event are those that are exposed to the
outside world (the RS-232 pins in this case), and the IC is
tested in its typical application configuration (power applied)
rather than testing each pin-to-pin combination. The lower
current limiting resistor coupled with the larger charge
storage capacitor yields a test that is much more severe than
the HBM test. The extra ESD protection built into this
device’s RS-232 pins allows the design of equipment
meeting level 4 criteria without the need for additional board
level protection on the RS-232 port.
AIR-GAP DISCHARGE TEST METHOD
For this test method, a charged probe tip moves toward the
IC pin until the voltage arcs to it. The current waveform
delivered to the IC pin depends on approach speed,
humidity, temperature, etc., so it is difficult to obtain
repeatable results. The “E” device RS-232 pins withstand
±15kV air-gap discharges.
CONTACT DISCHARGE TEST METHOD
During the contact discharge test, the probe contacts the
tested pin before the probe tip is energized, thereby
eliminating the variables associated with the air-gap
discharge. The result is a more repeatable and predictable
test, but equipment limits prevent testing devices at voltages
higher than ±8kV. All “E” family devices survive ±8kV contact
discharges on the RS-232 pins.
ICL3238E
Typical Performance Curves
VCC = 3.3V, TA = 25oC
25
VOUT+
4
-SLEW
20
SLEW RATE (V/µs)
TRANSMITTER OUTPUT VOLTAGE (V)
6
2
1 TRANSMITTER AT 250kbps
OTHER TRANSMITTERS AT 30kbps
0
-2
15
+SLEW
10
VOUT -
-4
-SLEW
-6
5
0
1000
2000
3000
4000
5000
0
1000
3.5
50
3.0
SUPPLY CURRENT (mA)
SUPPLY CURRENT (mA)
55
250kbps
40
120kbps
30
25
20kbps
2000
1000
3000
4000
5000
LOAD CAPACITANCE (pF)
FIGURE 16. SUPPLY CURRENT vs LOAD CAPACITANCE
WHEN TRANSMITTING DATA
Die Characteristics
SUBSTRATE POTENTIAL (POWERED UP):
GND
TRANSISTOR COUNT:
1235
PROCESS:
Si Gate CMOS
12
5000
NO LOAD
ALL OUTPUTS STATIC
2.5
2.0
1.5
1.0
0.5
20
0
4000
FIGURE 15. SLEW RATE vs LOAD CAPACITANCE
FIGURE 14. TRANSMITTER OUTPUT VOLTAGE vs LOAD
CAPACITANCE
35
3000
LOAD CAPACITANCE (pF)
LOAD CAPACITANCE (pF)
45
2000
0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
SUPPLY VOLTAGE (V)
FIGURE 17. SUPPLY CURRENT vs SUPPLY VOLTAGE
6.0
ICL3238E
Shrink Small Outline Plastic Packages (SSOP)
N
M28.209 (JEDEC MO-150-AH ISSUE B)
INDEX
AREA
0.25(0.010) M
H
B M
28 LEAD SHRINK SMALL OUTLINE PLASTIC PACKAGE
E
1
2
INCHES
GAUGE
PLANE
-B-
SYMBOL
3
L
0.25
0.010
SEATING PLANE
-A-
A
D
-C-
µα
e
B
0.25(0.010) M
A2
A1
C
0.10(0.004)
C A M
B S
MAX
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2
of Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate
burrs. Mold flash, protrusion and gate burrs shall not exceed
0.20mm (0.0078 inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.20mm (0.0078 inch)
per side.
5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Dimension “B” does not include dambar protrusion. Allowable dambar protrusion shall be 0.13mm (0.005 inch) total in excess of “B”
dimension at maximum material condition.
10. Controlling dimension: MILLIMETER. Converted inch dimensions
are not necessarily exact.
13
MIN
MAX
NOTES
A
-
0.078
-
2.00
-
A1
0.002
-
0.05
-
-
A2
0.065
0.072
1.65
1.85
-
B
0.009
0.014
0.22
0.38
9
C
0.004
0.009
0.09
0.25
-
D
0.390
0.413
9.90
10.50
3
E
0.197
0.220
5.00
5.60
4
e
0.026 BSC
0.65 BSC
-
H
0.292
0.322
7.40
8.20
-
L
0.022
0.037
0.55
0.95
6
8o
0o
N
NOTES:
MILLIMETERS
MIN
α
28
0o
28
7
8o
Rev. 1 3/95
ICL3238E
Thin Shrink Small Outline Plastic Packages (TSSOP)
N
M28.173
INDEX
AREA
E
0.25(0.010) M
2
28 LEAD THIN SHRINK SMALL OUTLINE PLASTIC
PACKAGE
E1
GAUGE
PLANE
-B1
B M
INCHES
3
L
0.05(0.002)
-A-
0.25
0.010
SEATING PLANE
A
D
-C-
α
e
A2
A1
b
c
0.10(0.004)
0.10(0.004) M
C A M
B S
NOTES:
SYMBOL
MIN
MAX
MIN
MAX
NOTES
A
-
0.047
-
1.20
-
A1
0.002
0.006
0.05
0.15
-
A2
0.031
0.051
0.80
1.05
-
b
0.0075
0.0118
0.19
0.30
9
c
0.0035
0.0079
0.09
0.20
-
D
0.378
0.386
9.60
9.80
3
E1
0.169
0.177
4.30
4.50
4
e
0.026 BSC
E
0.246
L
0.0177
N
1. These package dimensions are within allowable dimensions of
JEDEC MO-153-AE, Issue E.
MILLIMETERS
α
0.65 BSC
0.256
6.25
0.0295
0.45
28
0o
-
0.75
6
28
8o
0o
-
6.50
7
8o
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
Rev. 0 6/98
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm
(0.006 inch) per side.
4. Dimension “E1” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.15mm (0.006 inch) per
side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Dimension “b” does not include dambar protrusion. Allowable dambar
protrusion shall be 0.08mm (0.003 inch) total in excess of “b” dimension at maximum material condition. Minimum space between protrusion and adjacent lead is 0.07mm (0.0027 inch).
10. Controlling dimension: MILLIMETER. Converted inch dimensions
are not necessarily exact. (Angles in degrees)
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
14
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