DATASHEET

ISL4270E
®
Data Sheet
June 16, 2010
QFN Packaged, ±15kV ESD Protected, +3V
to +5.5V, 300nA, 250kbps, RS-232
Transceivers with Enhanced Automatic
Powerdown and a Separate Logic Supply
The Intersil ISL4270E is a 3.0V to 5.5V powered RS-232
transceiver which meets ElA/TIA-232 and V.28/V.24
specifications, even at VCC = 3.0V. Additionally, it provides
±15kV ESD protection (IEC61000-4-2 Air Gap and Human
Body Model) on transmitter outputs and receiver inputs
(RS-232 pins). Targeted applications are PDAs, Palmtops,
and notebook and laptop computers where the low
operational, and even lower standby power consumption is
critical. Efficient on-chip charge pumps, coupled with manual
and enhanced automatic powerdown functions, reduce the
standby supply current to a 300nA trickle. Tiny 5mmx5mm
Quad Flat No-Lead (QFN) packaging, and the use of small,
low value capacitors ensure board space savings as well.
Data rates greater than 250kbps are guaranteed at worst
case load conditions.
The ISL4270E features a VL pin that adjusts the logic pin
output levels and input thresholds to values compatible with
the VCC powering the external logic (e.g., a UART).
This device includes an enhanced automatic powerdown
function which powers down the on-chip power-supply and
driver circuits. This occurs when all receiver and transmitter
inputs detect no signal transitions for a period of 30 seconds.
It power back up, automatically, whenever it senses a
transition on any transmitter or receiver input.
Table 1 summarizes the features of the ISL4270E, while
Application Note AN9863 summarizes the features of each
device comprising the 3V RS-232 family.
FN6041.2
Features
• Available in Near Chip Scale QFN (5mmx5mm) Package
• VL Supply Pin for Compatibility with Mixed Voltage
Systems
• ESD Protection for RS-232 I/O Pins to ±15kV (IEC61000)
• Manual and Enhanced Automatic Powerdown Features
• Meets EIA/TIA-232 and V.28/V.24 Specifications at 3V
• On-Chip Charge Pumps Require Only Four External
0.1μF Capacitors
• Receivers Stay Active in Powerdown
• Very Low Supply Current . . . . . . . . . . . . . . . . . . . . 300μA
• Guaranteed Minimum Data Rate . . . . . . . . . . . . . 250kbps
• Wide Power Supply Range . . . . . . . Single +3V to +5.5V
• Low Supply Current in Powerdown State. . . . . . . . 300nA
• Pb-Free (RoHS Compliant)
Applications
• Any System Requiring RS-232 Communication Ports
- Battery Powered, Hand-Held, and Portable Equipment
- Laptop Computers, Notebooks, Palmtops
- Digital Cameras
- PDA’s and PDA Cradles
- Cellular/Mobile Phones
Ordering Information
PART NUMBER
(Note)
ISL4270EIRZ*
PART
MARKING
ISL4270 EIRZ
TEMP.
RANGE
PKG.
(°C)
PACKAGE DWG. #
-40 to +85 32 Ld QFN L32.5x5B
(Pb-free)
*Add “-T” suffix for tape and reel. Please refer to TB347 for details on
reel specifications.
NOTE: These Intersil Pb-free plastic packaged products employ
special Pb-free material sets, molding compounds/die attach
materials, and 100% matte tin plate plus anneal (e3 termination
finish, which is RoHS compliant and compatible with both SnPb and
Pb-free soldering operations). Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed
the Pb-free requirements of IPC/JEDEC J STD-020.
TABLE 1. SUMMARY OF FEATURES
PART NUMBER
ISL4270E
NO. OF NO. OF DATA RATE Rx. ENABLE
Tx.
Rx.
(kbps)
FUNCTION?
3
3
250
1
NO
VL LOGIC
SUPPLY PIN?
YES
MANUAL
ENHANCED AUTOMATIC
POWER- DOWN? POWERDOWN FUNCTION?
YES
YES
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2004, 2010. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
ISL4270E
Pinout
28
NC
29
GND
30
VCC
V+
31
FORCEOFF
C1-
32
C1+
NC
ISL4270E (QFN)
TOP VIEW
27
26
25
NC
1
24
NC
C2+
2
23
T1OUT
C2-
3
22
T2OUT
V-
4
21
T3OUT
20
R1IN
PD
7
18
R3IN
NC
8
17
NC
10
11
FORCEON
9
12
13
14
15
16
NC
INVALID
VL
R2IN
R1OUT
19
R2OUT
6
R3OUT
T2IN
NC
5
T3IN
T1IN
Pin Descriptions
PIN
VCC
FUNCTION
System power supply input (3.0V to 5.5V).
V+
Internally generated positive transmitter supply (+5.5V).
V-
Internally generated negative transmitter supply (-5.5V).
GND
Ground connection. This is also the potential of the thermal pad (PD).
C1+
External capacitor (voltage doubler) is connected to this lead.
C1-
External capacitor (voltage doubler) is connected to this lead.
C2+
External capacitor (voltage inverter) is connected to this lead.
C2-
External capacitor (voltage inverter) is connected to this lead.
TIN
TTL/CMOS compatible transmitter Inputs. The switching point is a function of the VL voltage.
TOUT
RIN
ROUT
VL
INVALID
±15kV ESD Protected, RS-232 level (nominally ±5.5V) transmitter outputs.
±15kV ESD Protected, RS-232 compatible receiver inputs.
TTL/CMOS level receiver outputs. Swings between GND and VL.
Logic-Level Supply. All TTL/CMOS inputs and outputs are powered by this supply.
Active low output that indicates if no valid RS-232 levels are present on any receiver input. Swings between GND and VL.
FORCEOFF Active low to shut down transmitters and on-chip power supply. This overrides any automatic circuitry and FORCEON (see Table 2).
The switching point is a function of the VL voltage.
FORCEON
PD
Active high input to override automatic powerdown circuitry thereby keeping transmitters active (FORCEOFF must be high). The
switching point is a function of the VL voltage.
Exposed Thermal Pad. Connect to GND.
2
FN6041.2
June 16, 2010
ISL4270E
Typical Operating Circuit
+3.3V
+
C1
0.1μF
C2
0.1μF
T1IN
T2IN
T3IN
TTL/CMOS
LOGIC LEVELS
0.1μF
29
+
27
C1+
VCC
31
C12
C2+
+
3
C2-
V+
V-
5
T1
6
T2
10
T3
4
23
22
21
R1
14
30
20
R1OUT
+
C3
0.1μF
C4
0.1μF
+
T1OUT
T2OUT
RS-232
LEVELS
T3OUT
R1IN
5kΩ
R2OUT
R2
13
19
R2IN
5kΩ
R3
12
18
R3OUT
RS-232
LEVELS
R3IN
5kΩ
LOGIC VCC
0.1μF
15
+
VCC
TO POWER
CONTROL LOGIC
11
28
7
VL
FORCEON
FORCEOFF
INVALID
GND
26
3
FN6041.2
June 16, 2010
ISL4270E
Absolute Maximum Ratings
Thermal Information
VCC to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6V
VL to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 7V
V+ to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 7V
V- to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3V to -7V
V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14V
Input Voltages
TIN, FORCEON, FORCEOFF . . . . . . . . . . . . . . . . . . -0.3V to 6V
RIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25V
Output Voltages
TOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±13.2V
ROUT, INVALID. . . . . . . . . . . . . . . . . . . . . . . . -0.3V to (VL +0.3V)
Short Circuit Duration
TOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous
ESD Rating . . . . . . . . . . . . See “ESD PERFORMANCE” on page 5
Thermal Resistance (Typical, Notes 1, 2) θJA (°C/W) θJC (°C/W)
32 Ld QFN Package. . . . . . . . . . . . . . .
30
2.2
Moisture Sensitivity (see Technical Brief TB363)
QFN Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Level 1
Maximum Junction Temperature (Plastic Package) . . . . . . . 150oC
Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC
Pb-Free Reflow Profile. . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTES:
1. θJA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See
Tech Brief TB379, and Tech Brief TB389.
2. For θJC, the “case temp” location is the center of the exposed metal pad on the package underside.
Electrical Specifications
Test Conditions: VCC = 3V to 5.5V, C1 - C4 = 0.1µF, VL = VCC; Unless Otherwise Specified.
Typicals are at TA = 25oC, VCC = VL = 3.3V
PARAMETER
TEST CONDITIONS
TEMP
(oC)
MIN
(Note 4)
TYP
MAX
(Note 4) UNITS
DC CHARACTERISTICS
μA
Supply Current, Automatic
Powerdown
All RIN Open, FORCEON = GND, FORCEOFF = VCC
25
-
0.3
5
Supply Current, Powerdown
FORCEOFF = GND
25
-
0.3
5
μA
Supply Current,
Automatic Powerdown Disabled
All Outputs Unloaded, FORCEON = FORCEOFF = VCC,
VCC = 3.15V
25
-
0.3
1
mA
-
-
0.8
V
LOGIC AND TRANSMITTER INPUTS
Input Logic Threshold Low
TIN, FORCEON, FORCEOFF
VL = 3.3V or 5V
Full
VL = 2.5V
Full
-
-
0.6
V
Input Logic Threshold High
TIN, FORCEON, FORCEOFF
VL = 5V
Full
2.4
-
-
V
VL = 3.3V
Full
2.0
-
-
V
VL = 2.5V
Full
1.4
-
-
V
VL = 1.8V
25
-
0.9
-
V
25
-
0.5
-
V
Full
-
±0.01
±1.0
μA
Transmitter Input Hysteresis
Input Leakage Current
TIN, FORCEON, FORCEOFF
RECEIVER OUTPUTS
Output Voltage Low
IOUT = 1.6mA
Full
-
-
0.4
V
Output Voltage High
IOUT = -1.0mA
Full
VL - 0.6
VL - 0.1
-
V
Full
-25
-
25
V
1.5
-
V
RECEIVER INPUTS
Input Voltage Range
Input Threshold Low
VCC = VL = 5.0V
25
0.8
VCC = VL = 3.3V
25
0.6
1.2
-
V
Input Threshold High
VCC = VL = 5.0V
25
-
1.8
2.4
V
VCC = VL = 3.3V
25
-
1.5
2.4
V
Input Hysteresis
25
-
0.5
-
V
Input Resistance
25
3
5
7
kΩ
4
FN6041.2
June 16, 2010
ISL4270E
Electrical Specifications
Test Conditions: VCC = 3V to 5.5V, C1 - C4 = 0.1µF, VL = VCC; Unless Otherwise Specified.
Typicals are at TA = 25oC, VCC = VL = 3.3V (Continued)
PARAMETER
TEST CONDITIONS
TEMP
(oC)
MIN
(Note 4)
TYP
MAX
(Note 4) UNITS
TRANSMITTER OUTPUTS
Output Voltage Swing
All Transmitter Outputs Loaded with 3kΩ to Ground
Full
±5.0
±5.4
-
V
Output Resistance
VCC = V+ = V- = 0V, Transmitter Output = ±2V
Full
300
10M
-
Ω
Output Short-Circuit Current
VOUT = 0V
Full
-
±35
±60
mA
Output Leakage Current
VOUT = ±12V, VCC = 0V or 3V to 5.5V
Automatic Powerdown or FORCEOFF = GND
Full
-
-
±25
μA
ENHANCED AUTOMATIC POWERDOWN (FORCEON = GND, FORCEOFF = VCC)
Receiver Input Thresholds to
INVALID High
See Figure 4
Full
-2.7
-
2.7
V
Receiver Input Thresholds to
INVALID Low
See Figure 4
Full
-0.3
-
0.3
V
INVALID Output Voltage Low
IOUT = 1.6mA
Full
-
-
0.4
V
INVALID Output Voltage High
IOUT = -1.0mA
Full
VL - 0.6
-
-
V
Receiver Positive or Negative
Threshold to INVALID High Delay
(tINVH)
See Figure 7
25
-
1
-
μs
Receiver Positive or Negative
Threshold to INVALID Low Delay
(tINVL)
See Figure 7
25
-
30
-
μs
Receiver or Transmitter Edge to
Note 3, See Figure 7
Transmitters Enabled Delay (tWU)
25
-
100
-
μs
Note 3, See Figure 7
Full
15
30
60
sec
Maximum Data Rate
RL = 3kΩ, CL = 1000pF, One Transmitter Switching
Full
250
500
-
kbps
Receiver Propagation Delay
Receiver Input to Receiver
Output, CL = 150pF
25
-
0.15
-
μs
25
-
0.15
-
μs
Time to Exit Powerdown
TX | VOUT | ≥ 3.7V
25
-
100
-
μs
Transmitter Skew
tPHL - tPLH
25
-
100
-
ns
Receiver Skew
tPHL - tPLH
Transition Region Slew Rate
VCC = 3.3V,
RL = 3kΩ to 7kΩ,
Measured From 3V to -3V or -3V
to 3V
Receiver or Transmitter Edge to
Transmitters Disabled Delay
(tAUTOPWDN)
TIMING CHARACTERISTICS
tPHL
tPLH
25
-
50
-
ns
CL = 150pF to 1000pF
25
6
18
30
V/μs
CL = 150pF to 2500pF
25
4
13
30
V/μs
25
-
±15
-
kV
ESD PERFORMANCE
RS-232 Pins (TOUT, RIN)
Human Body Model
IEC61000-4-2 Air Gap Discharge
25
-
±15
-
kV
IEC61000-4-2 Contact Discharge
25
-
±8
-
kV
NOTES:
3. An “edge” is defined as a transition through the transmitter or receiver input thresholds.
4. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested.
5
FN6041.2
June 16, 2010
ISL4270E
Detailed Description
The ISL4270E operates from a single +3V to +5.5V supply,
guarantees a 250kbps minimum data rate, requires only four
small external 0.1μF capacitors, features low power
consumption, and meets all ElA RS-232C and V.28
specifications. The circuit is divided into three sections: The
charge pump, the transmitters, and the receivers.
Charge-Pump
Intersil’s new ISL4270E utilizes regulated on-chip dual
charge pumps as voltage doublers, and voltage inverters to
generate ±5.5V transmitter supplies from a VCC supply as
low as 3.0V. This allows these devices to maintain RS-232
compliant output levels over the ±10% tolerance range of
3.3V powered systems. The efficient on-chip power supplies
require only four small, external 0.1μF capacitors for the
voltage doubler and inverter functions over the full VCC
range; other capacitor combinations can be used as shown
in Table 3. The charge pumps operate discontinuously (i.e.,
they turn off as soon as the V+ and V- supplies are pumped
up to the nominal values), resulting in significant power
savings.
Transmitters
The transmitters are proprietary, low dropout, inverting
drivers that translate TTL/CMOS inputs to EIA/TIA-232
output levels. Coupled with the on-chip ±5.5V supplies,
these transmitters deliver true RS-232 levels over a wide
range of single supply system voltages.
All transmitter outputs disable and assume a high
impedance state when the device enters the powerdown
mode (see Table 2). These outputs may be driven to ±12V
when disabled.
All devices guarantee a 250kbps data rate for full load
conditions (3kΩ and 1000pF), VCC ≥ 3.0V, with one
transmitter operating at full speed. Under more typical
conditions of VCC ≥ 3.3V, RL = 3kΩ, and CL = 250pF, one
transmitter easily operates at 1.25Mbps.
The transmitter input threshold is set by the voltage applied
to the VL supply pin. Transmitter inputs float if left
unconnected (there are no pull-up resistors), and may cause
ICC increases. Connect unused inputs to GND for the best
performance.
Receivers
The ISL4270E contains standard inverting receivers that
convert RS-232 signals to CMOS output levels and accept
inputs up to ±25V while presenting the required 3kΩ to 7kΩ
input impedance (see Figure 1) even if the power is off
(VCC = 0V). The receivers’ Schmitt trigger input stage uses
hysteresis to increase noise immunity and decrease errors
due to slow input signal transitions. Receiver outputs swing
from GND to VL, and do not tristate in powerdown (see
Table 2).
6
VL
RXOUT
RXIN
-25V ≤ VRIN ≤ +25V
5kΩ
GND ≤ VROUT ≤ VL
GND
FIGURE 1. RECEIVER CONNECTIONS
Low Power Operation
This 3V device requires a nominal supply current of 0.3mA,
even at VCC = 5.5V, during normal operation (not in
powerdown mode). This is considerably less than the 11mA
current required by comparable 5V RS-232 devices, allowing
users to reduce system power simply by replacing the old
style device with the ISL4270E in new designs.
Powerdown Functionality
The already low current requirement drops significantly
when the device enters powerdown mode. In powerdown,
supply current drops to 1μA, because the on-chip charge
pump turns off (V+ collapses to VCC, V- collapses to GND),
and the transmitter outputs tristate. This micro-power mode
makes these devices ideal for battery powered and portable
applications.
Software Controlled (Manual) Powerdown
This device allows the user to force the IC into the low
power, standby state, and utilizes a two pin approach where
the FORCEON and FORCEOFF inputs determine the IC’s
mode. For always enabled operation, FORCEON and
FORCEOFF are both strapped high. To switch between
active and powerdown modes, under logic or software
control, only the FORCEOFF input need be driven. The
FORCEON state isn’t critical, as FORCEOFF dominates
over FORCEON. Nevertheless, if strictly manual control over
powerdown is desired, the user must strap FORCEON high
to disable the enhanced automatic powerdown circuitry.
Connecting FORCEOFF and FORCEON together disables
the enhanced automatic powerdown feature, enabling them
to function as a manual SHUTDOWN input (see Figure 2).
With any of the above control schemes, the time required to
exit powerdown, and resume transmission is only 100μs.
When using both manual and enhanced automatic
powerdown (FORCEON = 0), the ISL4270E won’t power up
from manual powerdown until both FORCEOFF and
FORCEON are driven high, or until a transition occurs on a
receiver or transmitter input. Figure 3 illustrates a circuit for
ensuring that the ISL4270E powers up as soon as
FORCEOFF switches high. The rising edge of the Master
Powerdown signal forces the device to power up, and the
ISL4270E returns to enhanced automatic powerdown
FN6041.2
June 16, 2010
ISL4270E
TABLE 2. POWERDOWN LOGIC TRUTH TABLE
RCVR OR XMTR
EDGE WITHIN 30
SEC?
NO
RS-232 LEVEL
PRESENT AT
INVALID
FORCEOFF FORCEON TRANSMITTER RECEIVER
INPUT
INPUT
OUTPUTS
OUTPUTS RECEIVER INPUT? OUTPUT
H
H
Active
Active
NO
L
NO
H
H
Active
Active
YES
H
YES
H
L
Active
Active
NO
L
YES
H
L
Active
Active
YES
H
NO
H
L
High-Z
Active
NO
L
NO
H
L
High-Z
Active
YES
H
X
L
X
High-Z
Active
NO
L
X
L
X
High-Z
Active
YES
H
MODE OF OPERATION
Normal Operation (Enhanced
Auto Powerdown Disabled)
Normal Operation (Enhanced
Auto Powerdown Enabled)
Powerdown Due to Enhanced
Auto Powerdown Logic
Manual Powerdown
INVALID DRIVING FORCEON AND FORCEOFF (EMULATES AUTOMATIC POWERDOWN)
X
NOTE 5
NOTE 5
Active
Active
YES
H
Normal Operation
X
NOTE 5
NOTE 5
High-Z
Active
NO
L
Forced Auto Powerdown
NOTES:
5. Input is connected to INVALID Output.
FORCEOFF, FORCEON
PWR
MGT
LOGIC
INVALID
POWER
MANAGEMENT
UNIT
MASTER POWERDOWN LINE
0.1μF
1MΩ
I/O CHIP
POWER SUPPLY
VL
FORCEOFF
FORCEON
ISL4270E
ISL4270E
VCC
FIGURE 3. CIRCUIT TO ENSURE IMMEDIATE POWER UP
WHEN EXITING FORCED POWERDOWN
CPU
VL Logic Supply Input
I/O
UART
FIGURE 2. CONNECTIONS FOR MANUAL POWERDOWN
mode an RC time constant after this rising edge. The time
constant isn’t critical, because the ISL4270E remains
powered up for 30 seconds after the FORCEON falling edge,
even if there are no signal transitions. This gives slow-towake systems (e.g., a mouse) plenty of time to start
transmitting, and as long as it starts transmitting within 30
seconds both systems remain enabled.
7
Unlike other RS-232 interface devices where the CMOS
outputs swing between 0 and VCC, the ISL4270E features a
separate logic supply input (VL; 1.8V to 5V, regardless of
VCC) that sets VOH for the receiver and INVALID outputs.
Connecting VL to a host logic supply lower than VCC,
prevents the ISL4270E outputs from forward biasing the
input diodes of a logic device powered by that lower supply.
Connecting VL to a logic supply greater than VCC ensures
that the receiver and INVALID output levels are compatible
even with the CMOS input VIH of AC, HC, and CD4000
devices. Note that the VL supply current increases to 100μA
with VL = 5V and VCC = 3.3V (see Figure 16). VL also
powers the transmitter and logic inputs, thereby setting their
switching thresholds to levels compatible with the logic
supply. This separate logic supply pin allows a great deal of
flexibility in interfacing to systems with different logic
supplies. If logic translation isn’t required, connect VL to the
ISL4270E VCC.
FN6041.2
June 16, 2010
ISL4270E
2.7V
VALID RS-232 LEVEL - INVALID = 1
INDETERMINATE
The time to recover from automatic powerdown mode is
typically 100μs.
FORCEOFF
T_IN
EDGE
DETECT
S
30s
TIMER
R_IN
AUTOPWDN
R
EDGE
DETECT
FORCEON
FIGURE 5. ENHANCED AUTOMATIC POWERDOWN LOGIC
Emulating Standard Automatic Powerdown
0.3V
INVALID LEVEL - INVALID = 0
-0.3V
FORCEOFF
INVALID switches high 1μs after detecting a valid RS-232
level on a receiver input. INVALID operates in all modes
(forced or automatic powerdown, or forced on), so it is also
useful for systems employing manual powerdown circuitry.
As stated previously, the INVALID output switches low
whenever invalid levels have persisted on all of the receiver
inputs for more than 30μs (see Figure 7), but this has no
direct effect on the state of the ISL4270E (see the next
sections for methods of utilizing INVALID to power down the
device).
FORCEON
The INVALID output always indicates (see Table 2) whether
or not 30μs have elapsed with invalid RS-232 signals (see
Figures 4 and 7) persisting on all of the receiver inputs,
giving the user an easy way to determine when the interface
block should power down. Invalid receiver levels occur
whenever the driving peripheral’s outputs are shut off
(powered down) or when the RS-232 interface cable is
disconnected. In the case of a disconnected interface cable
where all the receiver inputs are floating (but pulled to GND
by the internal receiver pull down resistors), the INVALID
logic detects the invalid levels and drives the output low. The
power management logic then uses this indicator to power
down the interface block. Reconnecting the cable restores
valid levels at the receiver inputs, INVALID switches high,
and the power management logic wakes up the interface
block. INVALID can also be used to indicate the DTR or
RING INDICATOR signal, as long as the other receiver
inputs are floating, or driven to GND (as in the case of a
powered down driver).
Figure 5 illustrates the enhanced powerdown control logic.
Note that once the ISL4270E enters powerdown (manually
or automatically), the 30 second timer remains timed out
(set), keeping the ISL4270E powered down until FORCEON
transitions high, or until a transition occurs on a receiver or
transmitter input.
INVALID
INVALID Output
ISL4270E
INDETERMINATE
-2.7V
VALID RS-232 LEVEL - INVALID = 1
FIGURE 4. DEFINITION OF VALID RS-232 RECEIVER LEVELS
Enhanced Automatic Powerdown
Even greater power savings is available by using the
enhanced automatic powerdown function. When the
enhanced powerdown logic determines that no transitions
have occurred on any of the transmitter nor receiver inputs
for 30 seconds, the charge pump and transmitters
powerdown, thereby reducing supply current to 1μA. The
ISL4270E automatically powers back up whenever it detects
a transition on one of these inputs. This automatic
powerdown feature provides additional system power
savings without changes to the existing operating system.
Enhanced automatic powerdown operates when the
FORCEON input is low, and the FORCEOFF input is high.
Tying FORCEON high disables automatic powerdown, but
manual powerdown is always available via the overriding
FORCEOFF input. Table 2 summarizes the enhanced
automatic powerdown functionality.
8
I/O
UART
CPU
FIGURE 6. CONNECTIONS FOR AUTOMATIC POWERDOWN
WHEN NO VALID RECEIVER SIGNALS ARE
PRESENT
If enhanced automatic powerdown isn’t desired, the user can
implement the standard automatic powerdown feature
(mimics the function on the ICL3221E/23E/43E) by
connecting the INVALID output to the FORCEON and
FORCEOFF inputs, as shown in Figure 6. After 30μs of
invalid receiver levels, INVALID switches low and drives the
ISL4270E into a forced powerdown condition. INVALID
switches high as soon as a receiver input senses a valid
RS-232 level, forcing the ISL4270E to power on. See the
FN6041.2
June 16, 2010
ISL4270E
“INVALID DRIVING FORCEON AND FORCEOFF” section
of Table 2 for an operational summary. This operational
mode is perfect for handheld devices that communicate with
another computer via a detachable cable. Detaching the
cable allows the internal receiver pull-down resistors to pull
the inputs to GND (an invalid RS-232 level), causing the
30μs timer to time-out and drive the IC into powerdown.
Reconnecting the cable restores valid levels, causing the IC
to power back up.
reduces ripple on the transmitter outputs and slightly
reduces power consumption.
Hybrid Automatic Powerdown Options
When using minimum required capacitor values, make sure
that capacitor values do not degrade excessively with
temperature. If in doubt, use capacitors with a larger nominal
value. The capacitor’s equivalent series resistance (ESR)
usually rises at low temperatures and it influences the
amount of ripple on V+ and V-.
For devices which communicate only through a detachable
cable, connecting INVALID to FORCEOFF (with
FORCEON = 0) may be a desirable configuration. While the
cable is attached INVALID and FORCEOFF remain high, so
the enhanced automatic powerdown logic powers down the
RS-232 device whenever there is 30 seconds of inactivity on
the receiver and transmitter inputs. Detaching the cable
allows the receiver inputs to drop to an invalid level (GND),
so INVALID switches low and forces the RS-232 device to
power down. The ISL4270E remains powered down until the
cable is reconnected (INVALID = FORCEOFF = 1) and a
transition occurs on a receiver or transmitter input (see
Figure 5). For immediate power up when the cable is
reattached, connect FORCEON to FORCEOFF through a
network similar to that shown in Figure 3.
Capacitor Selection
The ISL4270E charge pumps require only 0.1μF capacitors
for the full operational voltage range. Table 3 lists other
acceptable capacitor values for various supply voltage
ranges. Do not use values smaller than those listed in
Table 3. Increasing the capacitor values (by a factor of 2)
TABLE 3. REQUIRED CAPACITOR VALUES
VCC
(V)
C2, C3, C4
(μF)
C1
(μF)
3.0 to 3.6
0.1
0.1
4.5 to 5.5
0.047
0.33
3.0 to 5.5
0.22
1
Power Supply Decoupling
In most circumstances a 0.1μF bypass capacitor is
adequate. In applications that are particularly sensitive to
power supply noise, decouple VCC to ground with a
capacitor of the same value as the charge-pump capacitor C1.
Connect the bypass capacitor as close as possible to the IC.
Transmitter Outputs when Exiting
Powerdown
Figure 8 shows the response of two transmitter outputs
when exiting powerdown mode. As they activate, the two
transmitter outputs properly go to opposite RS-232 levels,
with no glitching, ringing, nor undesirable transients. Each
transmitter is loaded with 3kΩ in parallel with 2500pF. Note
that the transmitters enable only when the magnitude of the
supplies exceed approximately 3V.
} INVALID
REGION
RECEIVER
INPUTS
TRANSMITTER
INPUTS
TRANSMITTER
OUTPUTS
tINVH
INVALID
OUTPUT
tINVL
tAUTOPWDN
tAUTOPWDN
tWU
tWU
V+
VCC
0
V-
FIGURE 7. ENHANCED AUTOMATIC POWERDOWN AND INVALID TIMING DIAGRAMS
9
FN6041.2
June 16, 2010
ISL4270E
5V/DIV
5V/DIV.
FORCEOFF
T1
2V/DIV
T1IN
T1OUT
T2
R1OUT
VCC = +3.3V
C1 - C4 = 0.1μF
VCC = +3.3V
C1 - C4 = 0.1μF
TIME (20μs/DIV.)
5μs/DIV.
FIGURE 8. TRANSMITTER OUTPUTS WHEN EXITING
POWERDOWN
FIGURE 10. LOOPBACK TEST AT 120kbps
High Data Rates
The ISL4270E maintains the RS-232 ±5V minimum
transmitter output voltages even at high data rates. Figure 9
details a transmitter loopback test circuit, and Figure 10
illustrates the loopback test result at 120kbps. For this test,
all transmitters were simultaneously driving RS-232 loads in
parallel with 1000pF, at 120kbps. Figure 11 shows the
loopback results for a single transmitter driving 1000pF and
an RS-232 load at 250kbps. The static transmitters were
also loaded with an RS-232 receiver.
VCC
+
C1
+
VCC
C1+
VL
V+
ISL4270E
V-
C2+
C2TIN
2μs/DIV.
+
C3
C4
+
TOUT
RIN
ROUT
FORCEON
VCC
T1OUT
VCC = +3.3V
C1 - C4 = 0.1μF
C1C2
T1IN
R1OUT
+
0.1μF
5V/DIV.
1000pF
5K
FORCEOFF
FIGURE 11. LOOPBACK TEST AT 250kbps
Interconnection with 3V and 5V Logic
Standard 3.3V powered RS-232 devices interface well with
3V and 5V powered TTL compatible logic families (e.g., ACT
and HCT), but the logic outputs (e.g., ROUTS) fail to reach
the VIH level of 5V powered CMOS families like HC, AC, and
CD4000. The ISL4270E VL supply pin solves this problem.
By connecting VL to the same supply (1.8V to 5V) powering
the logic device, the ISL4270E logic outputs will swing from
GND to the logic VCC.
FIGURE 9. TRANSMITTER LOOPBACK TEST CIRCUIT
10
FN6041.2
June 16, 2010
ISL4270E
±15kV ESD Protection
IEC61000-4-2 Testing
All pins on the 3V interface devices include ESD protection
structures, but the ISL4270E incorporates advanced
structures which allow the RS-232 pins (transmitter outputs
and receiver inputs) to survive ESD events up to ±15kV. The
RS-232 pins are particularly vulnerable to ESD damage
because they typically connect to an exposed port on the
exterior of the finished product. Simply touching the port
pins, or connecting a cable, can cause an ESD event that
might destroy unprotected ICs. These new ESD structures
protect the device whether or not it is powered up, protect
without allowing any latchup mechanism to activate, and
don’t interfere with RS-232 signals as large as ±25V.
The IEC61000 test method applies to finished equipment,
rather than to an individual IC. Therefore, the pins most likely to
suffer an ESD event are those that are exposed to the outside
world (the RS-232 pins in this case), and the IC is tested in its
typical application configuration (power applied) rather than
testing each pin-to-pin combination. The lower current limiting
resistor coupled with the larger charge storage capacitor yields
a test that is much more severe than the HBM test. The extra
ESD protection built into this device’s RS-232 pins allows the
design of equipment meeting level 4 criteria without the need
for additional board level protection on the RS-232 port.
Human Body Model (HBM) Testing
For this test method, a charged probe tip moves toward the IC
pin until the voltage arcs to it. The current waveform delivered
to the IC pin depends on approach speed, humidity,
temperature, etc., so it is difficult to obtain repeatable results.
The “E” device RS-232 pins withstand ±15kV air-gap
discharges.
As the name implies, this test method emulates the ESD
event delivered to an IC during human handling. The tester
delivers the charge through a 1.5kΩ current limiting resistor,
making the test less severe than the IEC61000 test which
utilizes a 330Ω limiting resistor. The HBM method
determines an ICs ability to withstand the ESD transients
typically present during handling and manufacturing. Due to
the random nature of these events, each pin is tested with
respect to all other pins. The RS-232 pins on “E” family
devices can withstand HBM ESD events to ±15kV.
Typical Performance Curves
AIR-GAP DISCHARGE TEST METHOD
CONTACT DISCHARGE TEST METHOD
During the contact discharge test, the probe contacts the
tested pin before the probe tip is energized, thereby
eliminating the variables associated with the air-gap
discharge. The result is a more repeatable and predictable
test, but equipment limits prevent testing devices at voltages
higher than ±8kV. All “E” family devices survive ±8kV contact
discharges on the RS-232 pins.
VCC = VL = 3.3V, TA = 25oC
30
VOUT+
4.0
25
2.0
SLEW RATE (V/μs)
TRANSMITTER OUTPUT VOLTAGE (V)
6.0
1 TRANSMITTER AT 250kbps
OTHER TRANSMITTERS AT 30kbps
0
-2.0
-6.0
0
1000
2000
3000
4000
5000
LOAD CAPACITANCE (pF)
FIGURE 12. TRANSMITTER OUTPUT VOLTAGE vs LOAD
CAPACITANCE
11
+SLEW
15
-SLEW
10
VOUT -
-4.0
20
5
0
1000
2000
3000
4000
5000
LOAD CAPACITANCE (pF)
FIGURE 13. SLEW RATE vs LOAD CAPACITANCE
FN6041.2
June 16, 2010
ISL4270E
Typical Performance Curves
VCC = VL = 3.3V, TA = 25oC (Continued)
45
3.5
40
3.0
250kbps
35
SUPPLY CURRENT (mA)
SUPPLY CURRENT (mA)
NO LOAD
ALL OUTPUTS STATIC
30
120kbps
25
20
20kbps
15
2.5
2.0
1.5
1.0
0.5
10
0
2000
1000
4000
3000
0
2.5
5000
3.0
3.5
4.0
4.5
5.0
5.5
6.0
SUPPLY VOLTAGE (V)
LOAD CAPACITANCE (pF)
FIGURE 14. SUPPLY CURRENT vs LOAD CAPACITANCE
WHEN TRANSMITTING DATA
FIGURE 15. SUPPLY CURRENT vs SUPPLY VOLTAGE
10m
1m
NO LOAD
ALL OUTPUTS STATIC
VCC = 3.3V
100μ
IL (A)
10μ
VL ≤ VCC
VL > VCC
1μ
100n
10n
1n
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
6.5
7.0
VL (V)
FIGURE 16. VL SUPPLY CURRENT vs VL VOLTAGE
Die Characteristics
SUBSTRATE AND QFN THERMAL PAD POTENTIAL (POWERED UP)
GND
TRANSISTOR COUNT
ISL4270E: 1063
PROCESS
Si Gate CMOS
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
12
FN6041.2
June 16, 2010
ISL4270E
Package Outline Drawing
L32.5x5B
32 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE
Rev 3, 5/10
4X 3.5
5.00
28X 0.50
A
B
6
PIN 1
INDEX AREA
6
PIN #1 INDEX AREA
32
25
1
5.00
24
3 .30 ± 0 . 15
17
(4X)
8
0.15
9
16
TOP VIEW
0.10 M C A B
+ 0.07
32X 0.40 ± 0.10
4 32X 0.23 - 0.05
BOTTOM VIEW
SEE DETAIL "X"
0.10 C
0 . 90 ± 0.1
C
BASE PLANE
SEATING PLANE
0.08 C
( 4. 80 TYP )
(
( 28X 0 . 5 )
SIDE VIEW
3. 30 )
(32X 0 . 23 )
C
0 . 2 REF
5
( 32X 0 . 60)
0 . 00 MIN.
0 . 05 MAX.
DETAIL "X"
TYPICAL RECOMMENDED LAND PATTERN
NOTES:
1. Dimensions are in millimeters.
Dimensions in ( ) for Reference Only.
2. Dimensioning and tolerancing conform to AMSE Y14.5m-1994.
3. Unless otherwise specified, tolerance : Decimal ± 0.05
4. Dimension applies to the metallized terminal and is measured
between 0.15mm and 0.30mm from the terminal tip.
5. Tiebar shown (if present) is a non-functional feature.
6. The configuration of the pin #1 identifier is optional, but must be
located within the zone indicated. The pin #1 identifier may be
either a mold or mark feature.
13
FN6041.2
June 16, 2010
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