ESD112-B1-02EL Data Sheet (966 KB, EN)

TVS Diodes
Transient Voltage Suppressor Diodes
ESD112-B1-02 Series
Bi-directional Ultra-low Capacitance ESD / Transient Protection Diode
ESD112-B1-02ELS
ESD112-B1-02EL
Data Sheet
Rev. 1.3, 2013-11-27
Final
Power Management & Multimarket
ESD112-B1-02 Series
Revision History: Rev.1.2, 2013-06-10
Page or Item
Subjects (major changes since previous revision)
Rev. 1.3, 2013-11-27: Final Data Sheet
ESD112-B1-02EL Status change to final
Trademarks of Infineon Technologies AG
AURIX™, BlueMoon™, C166™, CanPAK™, CIPOS™, CIPURSE™, COMNEON™, EconoPACK™, CoolMOS™,
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MIPAQ™, ModSTACK™, my-d™, NovalithIC™, OmniTune™, OptiMOS™, ORIGA™, PRIMARION™,
PrimePACK™, PrimeSTACK™, PRO-SIL™, PROFET™, RASIC™, ReverSave™, SatRIC™, SIEGET™,
SINDRION™, SIPMOS™, SMARTi™, SmartLEWIS™, SOLID FLASH™, TEMPFET™, thinQ!™,
TRENCHSTOP™, TriCore™, X-GOLD™, X-PMU™, XMM™, XPOSYS™.
Other Trademarks
Advance Design System™ (ADS) of Agilent Technologies, AMBA™, ARM™, MULTI-ICE™, KEIL™,
PRIMECELL™, REALVIEW™, THUMB™, µVision™ of ARM Limited, UK. AUTOSAR™ is licensed by AUTOSAR
development partnership. Bluetooth™ of Bluetooth SIG Inc. CAT-iq™ of DECT Forum. COLOSSUS™,
FirstGPS™ of Trimble Navigation Ltd. EMV™ of EMVCo, LLC (Visa Holdings Inc.). EPCOS™ of Epcos AG.
FLEXGO™ of Microsoft Corporation. FlexRay™ is licensed by FlexRay Consortium. HYPERTERMINAL™ of
Hilgraeve Incorporated. IEC™ of Commission Electrotechnique Internationale. IrDA™ of Infrared Data
Association Corporation. ISO™ of INTERNATIONAL ORGANIZATION FOR STANDARDIZATION. MATLAB™ of
MathWorks, Inc. MAXIM™ of Maxim Integrated Products, Inc. MICROTEC™, NUCLEUS™ of Mentor Graphics
Corporation. Mifare™ of NXP. MIPI™ of MIPI Alliance, Inc. MIPS™ of MIPS Technologies, Inc., USA. muRata™
of MURATA MANUFACTURING CO., MICROWAVE OFFICE™ (MWO) of Applied Wave Research Inc.,
OmniVision™ of OmniVision Technologies, Inc. Openwave™ Openwave Systems Inc. RED HAT™ Red Hat, Inc.
RFMD™ RF Micro Devices, Inc. SIRIUS™ of Sirius Satellite Radio Inc. SOLARIS™ of Sun Microsystems, Inc.
SPANSION™ of Spansion LLC Ltd. Symbian™ of Symbian Software Limited. TAIYO YUDEN™ of Taiyo Yuden
Co. TEAKLITE™ of CEVA, Inc. TEKTRONIX™ of Tektronix Inc. TOKO™ of TOKO KABUSHIKI KAISHA TA.
UNIX™ of X/Open Company Limited. VERILOG™, PALLADIUM™ of Cadence Design Systems, Inc. VLYNQ™
of Texas Instruments Incorporated. VXWORKS™, WIND RIVER™ of WIND RIVER SYSTEMS, INC. ZETEX™ of
Diodes Zetex Limited.
Last Trademarks Update 2010-10-26
Final Data Sheet
2
Rev. 1.3, 2013-11-27
ESD112-B1-02 Series
Bi-directional Ultra-low Capacitance ESD / Transient Protection Diode
1
Bi-directional Ultra-low Capacitance ESD / Transient Protection
Diode
1.1
Features
•
•
•
•
•
•
•
ESD / transient protection of RF signal lines according to:
– IEC61000-4-2 (ESD): ±20 kV (air/contact)
– IEC61000-4-4 (EFT): ±40 A (5/50 ns)
– IEC61000-4-5 (surge): ±3 A (8/20 μs)
Maximum working voltage: VRWM ±5.3 V
Extremely low capacitance: CL = 0.2 pF (typical)
Low clamping voltage: VCL = 29 V (typical) at IPP = 16 A
Very low reverse current IR < 1 nA typ.
Very small form factor down to 0.62 x 0.32 x 0.31 mm3
Pb-free (RoHS compliant) and halogen free package
1.2
•
•
Application Examples
ESD protection of sensitive RF signal lines, Bluetooth Class 2, Automated Meter Reading
RF antenna protection, frontend module, GPS, mobile TV, FM radio, UWB
1.3
Product Description
Pin 1
Pin 2
Pin 1 marking
(lasered)
Pin 1
TSLP-2
Pin 1
Pin 2
Pin 2
TSSLP-2
a) Pin configuration
b) Schematic diagram
P G-TS (S)LP -2_Dual_Diode_S erie_P inConf_and_S c hematic Diag. v s d
Figure 1-1 Pin Configuration and Schematic Diagram
Table 1-1
Ordering Information
Type
Package
Configuration
Marking code
ESD112-B1-02ELS
TSSLP-2-4
1 line, bi-directional
T
ESD112-B1-02EL
TSLP-2-20
1 line, bi-directional
TE
Final Data Sheet
3
Rev. 1.3, 2013-11-27
ESD112-B1-02 Series
Characteristics
2
Characteristics
Table 2-1
Maximum Ratings at TA = 25 °C, unless otherwise specified
Parameter
Symbol
Values
Unit
Min.
Typ.
Max.
VESD
-20
–
20
kV
IPP
-3
–
3
A
Operating temperature range
TOP
-55
–
125
°C
Storage temperature
1) VESD according to IEC61000-4-2
2) IPP according to IEC61000-4-5
Tstg
-65
–
150
°C
ESD air / contact discharge
1)
Peak pulse current (tp = 8/20 μs)
2)
Attention: Stresses above the max. values listed here may cause permanent damage to the device.
Exposure to absolute maximum rating conditions for extended periods may affect device
reliability. Maximum ratings are absolute ratings; exceeding only one of these values may
cause irreversible damage to the integrated circuit.
2.1
Electrical Characteristics at TA=25°C, unless otherwise specified
!
!
!
Figure 2-1 Definitions of electrical characteristics
Final Data Sheet
4
Rev. 1.3, 2013-11-27
ESD112-B1-02 Series
Characteristics
Table 2-2
DC Characteristics at TA = 25 °C, unless otherwise specified
Parameter
Symbol
Values
Unit
Min.
Typ.
Max.
Reverse working voltage VRWM
–5.3
–
5.3
V
Breakdown voltage
7
–
–
V
VBR
Note /
Test Condition
IR = 1 mA,
from pin 1 to pin 2,
from pin 2 to pin 1
Reverse current
Table 2-3
IR
<1
50
nA
VR = 5.3 V
Unit
Note /
Test Condition
pF
VR = 0 V, f = 1 MHz
RF Characteristics at TA = 25 °C, unless otherwise specified
Parameter
Symbol
Diode capacitance
CL
Series inductance
Table 2-4
–
LS
Values
Min.
Typ.
Max.
–
0.23
0.4
–
0.2
0.4
–
0.2
–
–
0.4
–
VR = 0 V, f = 1 GHz
nH
ESD112-B1-02ELS
ESD112-B1-02EL
ESD Characteristics at TA = 25 °C, unless otherwise specified
Parameter
Symbol
2)
Clamping voltage
VCL
1)
Clamping voltage
2)
Values
Unit
Note /
Test Condition
V
ITLP = 16 A
Min.
Typ.
Max.
–
29
–
–
44
–
ITLP = 30 A
–
11
17
IPP = 1 A
–
15
21
IPP = 3 A
1
–
Dynamic resistance
RDYN
–
1) IPP according to IEC61000-4-5 (tp = 8/20 µs)
Ω
2) Please refer to Application Note AN210 [4]. TLP parameter: Z0 = 50 Ω , tp = 100ns, tr = 300ps, averaging window: t1 = 30 ns
to t2 = 60 ns, extraction of dynamic resistance using least squares fit of TLP charactertistics between ITLP1 = 10 A and
ITLP2 = 40 A.
Final Data Sheet
5
Rev. 1.3, 2013-11-27
ESD112-B1-02 Series
Characteristics
Typical Characteristics at TA = 25 °C, unless otherwise specified
10
-7
10
-8
+125°C
10-9
IR [A]
2.2
10
-10
10
-11
10-12
+85°C
+25°C
0
1
2
3
VR [V]
4
5
6
5
6
Figure 2-2 Reverse current: IR = f(VR), TA = parameter
0.4
CL [pF]
0.3
0.2
0.1
0
0
1
2
3
VR [V]
4
Figure 2-3 Line capacitance: CL = f(VR), f = 1 MHz
Final Data Sheet
6
Rev. 1.3, 2013-11-27
ESD112-B1-02 Series
Characteristics
0.26
0.25
5.3V
CL [pF]
0.24
3.3V
0.23
0V
0.22
0.21
0.2
0
500
1000
1500
2000
2500
3000
f [MHz]
Figure 2-4 Line capacitance: CL = f(f), VR = parameter
1
0.9
0.8
CL [pF]
0.7
0.6
5.3V
0.5
0.4
3.3V
0.3
0V
0.2
0.1
0
-50
-25
0
25
50
TA [°C]
75
100
125
Figure 2-5 Line capacitance: CL = f(TA), VR = parameter
Final Data Sheet
7
Rev. 1.3, 2013-11-27
ESD112-B1-02 Series
Characteristics
120
100
VCL-max-peak = 112 [V]
VCL [V]
80
VCL-30ns-peak = 24.8 [V]
60
40
20
0
-20
-100
0
100
200
300
400 500
tp [ns]
600
700
800
900
700
800
900
Figure 2-6 IEC61000-4-2 VCL = f(t), 8 kV positiv pulse from pin 1 to pin 2
20
0
VCL [V]
-20
-40
-60
VCL-max-peak = -116 [V]
-80
VCL-30ns-peak = -25.0 [V]
-100
-120
-100
0
100
200
300
400 500
tp [ns]
600
Figure 2-7 IEC61000-4-2 VCL = f(t), 8 kV negativ pulse from pin 1 to pin 2
Final Data Sheet
8
Rev. 1.3, 2013-11-27
ESD112-B1-02 Series
Characteristics
180
160
140
VCL [V]
120
100
VCL-max-peak = 162 [V]
80
VCL-30ns-peak = 37.4 [V]
60
40
20
0
-20
-100
0
100
200
300
400 500
tp [ns]
600
700
800
900
700
800
900
Figure 2-8 IEC61000-4-2 VCL = f(t), 15 kV positiv pulse from pin 1 to pin 2
20
0
-20
VCL [V]
-40
-60
VCL-max-peak = -169 [V]
-80
VCL-30ns-peak = -37.6 [V]
-100
-120
-140
-160
-180
-100
0
100
200
300
400 500
tp [ns]
600
Figure 2-9 IEC61000-4-2 VCL = f(t), 15 kV negativ pulse from pin 1 to pin 2
Final Data Sheet
9
Rev. 1.3, 2013-11-27
ESD112-B1-02 Series
Characteristics
20
ESD112-B1-02ELS
RDYN
ITLP [A]
30
15
RDYN=1.0Ω
20
10
10
5
0
0
5
10 15 20 25 30 35 40 45 50 55 60
VTLP [V]
Equivalent VIEC [kV]
40
0
Figure 2-10 Clamping voltage : ITLP = f(VTLP) [4]
17
16
15
VCL [V]
14
13
12
11
10
9
8
7
0
1
2
IPP [A]
3
4
Figure 2-11 Clampine voltage: VCL = f(IPP), tp = 8/20 μs
Final Data Sheet
10
Rev. 1.3, 2013-11-27
ESD112-B1-02 Series
Application Information
Application Information
Connector
3
Protected signal line
ESD
I/O sensitive
device
1
2
The protection diode should be placed very close to the location
where the ESD or other transients can occur to keep loops and
inductances as small as possible .
Pin 2 (or pin 1) should be connected directly to a ground plane on
the board .
A pplic ation_E S D0P 2RF -02x x .v s d
Figure 3-1 Single line, bi-directional ESD / Transient protection [1], [2]
Final Data Sheet
11
Rev. 1.3, 2013-11-27
ESD112-B1-02 Series
Package Information
4
Package Information
4.1
TSSLP-2-4 (mm) [5]
Top view
Bottom view
0.31 +0.01
-0.02
0.32 ±0.05
0.355
0.62 ±0.05
2
Cathode
marking
0.2 ±0.035 1)
1
0.26 ±0.035 1)
0.05 MAX.
1) Dimension applies to plated terminals
TSSLP-2-3, -4-PO V01
Figure 4-1 TSSLP-2-4 Package overview
0.19
0.24
Solder mask
0.19
0.57
0.14
0.62
Copper
0.19
0.27
0.24
0.32
Stencil apertures
TSSLP-2-3, -4-FP V02
Figure 4-2 TSSLP-2-4: Footprint
g
0.35
Tape type
Ex Ey
Punched Tape
0.43 0.73
Embossed Tape 0.37 0.67
8
Ey
4
Cathode
marking
Deliveries can be both tape types (no selection possible).
Specification allows identical processing (pick & place) by users.
Ex
TSSLP-2-3, -4-TP V03
Figure 4-3 TSSLP-2-4: Packing
Figure 4-4 TSSLP-2-4: Marking (example)
Final Data Sheet
12
Rev. 1.3, 2013-11-27
ESD112-B1-02 Series
Package Information
4.2
TSLP-2-20 (mm) [5]
Top view
Bottom view
0.31 +0.01
-0.02
0.6 ±0.05
1±0.05
2
1
0.25 ±0.035 1)
0.65 ±0.05
0.05 MAX.
0.5 ±0.035 1)
Cathode
marking
1) Dimension applies to plated terminals
TSLP-2-19, -20-PO V01
Figure 4-5 TSLP-2-20: Package overview
0.28
0.35
Solder mask
0.38
0.93
0.3
1
Copper
0.28
0.45
0.35
0.6
Stencil apertures
TSLP-2-19, -20-FP V01
Figure 4-6 TSLP-2-20: Footprint
0.4
1.16
Cathode
marking
8
4
0.76
TSLP-2-19, -20-TP V02
Figure 4-7 TSLP-2-20: Packing
Type code
12
Cathode marking
TSLP-2-19, -20-MK V01
Figure 4-8 TSLP-2-20: Marking (example)
Final Data Sheet
13
Rev. 1.3, 2013-11-27
ESD112-B1-02 Series
References
References
[1]
Infineon AG - Application Note AN167: ESD Protection for Broadband LNA BGA728L7 for Portable and
Mobile TV Applications
[2]
Infineon AG - Application Note AN178: ESD Protection for RF Antennas using Infineon ESD0P4RFL and
ESD0P2RF-xx
[3]
Infineon AG - Application Note AN200: Low Cost FM Radio LNA using BFR340F for Mobile Phone
Applications
[4]
Infineon AG - Application Note AN210: Effective ESD Protection Design at System Level using VF-TLP
Characterization Methodology
[5]
Infineon AG - Recommendations for PCB Assembly of Infineon TSLP and TSSLP Packages
Final Data Sheet
14
Rev. 1.3, 2013-11-27
w w w . i n f i n e o n . c o m
Published by Infineon Technologies AG
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