ESD3V3XU1BL Data Sheet (1.4 MB, EN)

TVS Diode
Transient Voltage Suppressor Diodes
ESD3V3XU1BL
Bi-directional Ultra Low Capacitance ESD / Transient Protection Diode
ESD3V3XU1BL
Data Sheet
Revision 1.3, 2013-09-11
Final
Power Management & Multimarket
Edition 2013-09-11
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2013 Infineon Technologies AG
All Rights Reserved.
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ESD3V3XU1BL
Revision History: Revision 1.2, 2013-02-06
Page or Item
Subjects (major changes since previous revision)
Revision 1.3, 2013-09-11
5-6
Updated of Table 2-1, Table 2-2, Table 2-3 and Table 2-4
Trademarks of Infineon Technologies AG
AURIX™, BlueMoon™, C166™, CanPAK™, CIPOS™, CIPURSE™, COMNEON™, EconoPACK™, CoolMOS™,
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MIPAQ™, ModSTACK™, my-d™, NovalithIC™, OmniTune™, OptiMOS™, ORIGA™, PRIMARION™,
PrimePACK™, PrimeSTACK™, PRO-SIL™, PROFET™, RASIC™, ReverSave™, SatRIC™, SIEGET™,
SINDRION™, SIPMOS™, SMARTi™, SmartLEWIS™, SOLID FLASH™, TEMPFET™, thinQ!™,
TRENCHSTOP™, TriCore™, X-GOLD™, X-PMU™, XMM™, XPOSYS™.
Other Trademarks
Advance Design System™ (ADS) of Agilent Technologies, AMBA™, ARM™, MULTI-ICE™, KEIL™,
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development partnership. Bluetooth™ of Bluetooth SIG Inc. CAT-iq™ of DECT Forum. COLOSSUS™,
FirstGPS™ of Trimble Navigation Ltd. EMV™ of EMVCo, LLC (Visa Holdings Inc.). EPCOS™ of Epcos AG.
FLEXGO™ of Microsoft Corporation. FlexRay™ is licensed by FlexRay Consortium. HYPERTERMINAL™ of
Hilgraeve Incorporated. IEC™ of Commission Electrotechnique Internationale. IrDA™ of Infrared Data
Association Corporation. ISO™ of INTERNATIONAL ORGANIZATION FOR STANDARDIZATION. MATLAB™ of
MathWorks, Inc. MAXIM™ of Maxim Integrated Products, Inc. MICROTEC™, NUCLEUS™ of Mentor Graphics
Corporation. Mifare™ of NXP. MIPI™ of MIPI Alliance, Inc. MIPS™ of MIPS Technologies, Inc., USA. muRata™
of MURATA MANUFACTURING CO., MICROWAVE OFFICE™ (MWO) of Applied Wave Research Inc.,
OmniVision™ of OmniVision Technologies, Inc. Openwave™ Openwave Systems Inc. RED HAT™ Red Hat, Inc.
RFMD™ RF Micro Devices, Inc. SIRIUS™ of Sirius Satellite Radio Inc. SOLARIS™ of Sun Microsystems, Inc.
SPANSION™ of Spansion LLC Ltd. Symbian™ of Symbian Software Limited. TAIYO YUDEN™ of Taiyo Yuden
Co. TEAKLITE™ of CEVA, Inc. TEKTRONIX™ of Tektronix Inc. TOKO™ of TOKO KABUSHIKI KAISHA TA.
UNIX™ of X/Open Company Limited. VERILOG™, PALLADIUM™ of Cadence Design Systems, Inc. VLYNQ™
of Texas Instruments Incorporated. VXWORKS™, WIND RIVER™ of WIND RIVER SYSTEMS, INC. ZETEX™ of
Diodes Zetex Limited.
Last Trademarks Update 2010-10-26
Final Data Sheet
3
Revision 1.3, 2013-09-11
ESD3V3XU1BL
Bi-directional Ultra Low Capacitance ESD / Transient Protection Diode
1
Bi-directional Ultra Low Capacitance ESD / Transient Protection
Diode
1.1
Features
•
•
•
•
•
•
ESD / transient protection of high speed data lines exceeding
– IEC61000-4-2 (ESD): ±20 kV (air / contact)
– IEC61000-4-4 (EFT): ±2.5 kV / ±50 A (5/50 ns)
– IEC61000-4-5 (surge): ±3 A (8/20 μs)
Maximum working voltage: VRWM = ±3.6 V
Ultra low capacitance CL = 0.20 pF (typical) at f = 1 GHz
Very low clamping voltage: VCL = 14 V at ITLP = 16 A (typical) according to TLP [1]
Very low dynamic resistance: RDYN = 0.45 Ω (typical)
Pb-free and halogen-free package (RoHS compliant)
1.2
•
•
Application Examples
USB 3.0, Firewire, DVI, HDMI, S-ATA, DisplayPort, Thunderbolt
Mobile HDMI Link, MDDI, MIPI, SWP / NFC
1.3
Product Description
Pin 1 marking
(lasered)
Pin 1
Pin 1
Pin 2
Pin 2
a) Pin configuration
b) Schematic diagram
P G-TS LP-2_Dual_Diode_S erie_P inConf_and_S chematicDiag. vsd
Figure 1-1 Pin Configuration and Schematic Diagram
Table 1-1
Ordering Information
Type
Package
Configuration
ESD3V3XU1BL
TSLP-2-17
1 line, bi-directional
Final Data Sheet
4
Marking code
X2
Revision 1.3, 2013-09-11
ESD3V3XU1BL
Characteristics
2
Characteristics
Table 2-1
Maximum Rating at TA = 25 °C, unless otherwise specified 1)
Parameter
Symbol
Values
Unit
Min.
Typ.
Max.
VESD
–
–
20
kV
IPP
–
–
3
A
Peak pulse power
tp = 8/20 μs3)
PPK
–
–
36
W
Operating temperature range
TOP
-40
–
125
°C
Storage temperature
Tstg
-65
–
150
°C
ESD (air / contact) discharge
2)
Peak pulse current (tp = 8/20 μs)
3)
1) Device is electrically symmetrical
2) VESD according to IEC61000-4-2 (R = 330 Ω, C = 150 pF discharge network)
3) IPP according to IEC61000-4-5
Attention: Stresses above the max. values listed here may cause permanent damage to the device.
Exposure to absolute maximum rating conditions for extended periods may affect device
reliability. Maximum ratings are absolute ratings; exceeding only one of these values may
cause irreversible damage to the component.
2.1
Electrical Characteristics at TA = 25 °C, unless otherwise specified
!"#
Figure 2-1 Definitions of electrical characteristics
Final Data Sheet
5
Revision 1.3, 2013-09-11
ESD3V3XU1BL
Characteristics
Table 2-2
DC Characteristics at TA = 25 °C, unless otherwise specified 1)
Parameter
Symbol
Values
Unit
Note /
Test Condition
Min.
Typ.
Max.
Reverse working voltage VRWM
-3.6
–
3.6
V
Reverse current
IR
–
1
50
nA
Trigger voltage
Vt1
5
–
–
V
Holding voltage
Vh
4
4.6
–
V
IR = 10 mA
Unit
Note /
Test Condition
pF
VR = 0 V, f = 1 MHz
VR = 3.3 V
1) Device is electrically symmetrical
Table 2-3
AC Characteristics at TA = 25 °C, unless otherwise specified
Parameter
Symbol
Line capacitance
CL
Series inductance
Table 2-4
LS
Values
Min.
Typ.
Max.
–
0.22
0.35
–
0.20
–
–
0.4
–
VR = 0 V, f = 1 GHz
nH
ESD and Surge Characteristics at TA = 25 °C, unless otherwise specified 1)
Parameter
Symbol
2)
Clamping voltage
VCL
3)
Clamping voltage
4)
Clamping voltage
Dynamic resistance
2)
Dynamic resistance
4)
RDYN
Values
Unit
Note /
Test Condition
V
ITLP = 16 A
Min.
Typ.
Max.
–
14
–
–
20
–
ITLP = 30 A
–
12
–
VESD = 8 kV
–
18
–
VESD = 15 kV
–
8
–
IPP = 3 A
–
0.45
–
–
1
–
Ω
1) Device is electrically symmetrical
2) ANSI/ESD STM5.5.1 - Electrostatic Discharge Sensitive Testing using Transmission Line Pulse (TLP) Model. TLP
conditions: Z0 = 50 Ω, tp = 100 ns, tr = 0.6 ns and VTLP averaging window: t1 = 30 ns to t2 = 60 ns, extraction of dynamic
resistance using least squares fit of TLP characteristic between ITLP1 = 5 A and ITLP2 = 40 A. Please refer to Application
Note AN210[1].
3) VESD according to IEC61000-4-2, VCL at 30 ns (R = 330 Ω, C = 150 pF discharge network)
4) IPP according to IEC61000-4-5 (tp = 8/20 μs)
Final Data Sheet
6
Revision 1.3, 2013-09-11
ESD3V3XU1BL
Typical Characteristics
3
Typical Characteristics
At TA = 25 °C, unless otherwise specified
-6
10
-7
10
-8
IR [A]
10
-9
10
-10
10
10-11
-12
10
-4
-3
-2
-1
0
VR [V]
1
2
3
4
Figure 3-1 Reverse current IR = f(VR)
0.6
0.5
CL [pF]
0.4
0.3
0.2
0.1
0
-4
-3
-2
-1
0
VR [V]
1
2
3
4
Figure 3-2 Line capacitance CL = f(VR), f = 1 MHz
Final Data Sheet
7
Revision 1.3, 2013-09-11
ESD3V3XU1BL
Typical Characteristics
40
ESD3V3XU1BL
RDYN
20
30
15
20
10
10
5
0
0
-10
-5
-20
-10
Equivalent VIEC [kV]
ITLP [A]
RDYN = 0.45 Ω
RDYN = 0.45 Ω
-30
-15
-40
-20
-40
-30
-20
-10
0
10
20
30
40
VTLP [V]
Figure 3-3 Clamping voltage (TLP): ITLP = f(VTLP) according ANSI/ESD STM5.5.1- Electrostatic Discharge
Sensitivity Testing using Transmission Line Pulse (TLP) Model. TLP conditions: Z0 = 50 Ω,
tp = 100 ns, tr = 0.6 ns, ITLP and VTLP averaging window: t1 = 30 ns to t2 = 60 ns, extraction of
dynamic resistance using squares fit to TLP characteristics between ITLP1 = 5 A and
ITLP2 = 40 A. Please refer to Application Note AN210[1]
Final Data Sheet
8
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ESD3V3XU1BL
Typical Characteristics
ESD3V3XU1BL
RDYN
3
RDYN = 1.0 Ω
2
IPP [A]
1
0
-1
-2
RDYN = 1.0 Ω
-3
-15
-10
-5
0
VCL [V]
5
10
15
Figure 3-4 Pulse current (IEC61000-4-5) versus clamping voltage: IPP = f(VCL)
Final Data Sheet
9
Revision 1.3, 2013-09-11
ESD3V3XU1BL
Typical Characteristics
200
Scope: 6 GHz, 20 GS/s
175
150
VCL [V]
125
VCL-max-peak = 134 V
100
75
VCL-30ns-peak = 12 V
50
25
0
-25
-50
0
100
200
tp [ns]
300
400
Figure 3-5 Clamping voltage at +8 kV discharge according IEC61000-4-2 (R = 330 Ω, C = 150 pF)
50
Scope: 6 GHz, 20 GS/s
25
0
VCL [V]
-25
-50
-75
-100
VCL-max-peak = -134 V
-125
VCL-30ns-peak = -12 V
-150
-175
-200
0
100
200
tp [ns]
300
400
Figure 3-6 Clamping voltage at -8 kV discharge according IEC61000-4-2 (R = 330 Ω, C = 150 pF)
Final Data Sheet
10
Revision 1.3, 2013-09-11
ESD3V3XU1BL
Typical Characteristics
200
Scope: 6 GHz, 20 GS/s
175
150
VCL [V]
125
VCL-max-peak = 182 V
100
75
VCL-30ns-peak = 18 V
50
25
0
-25
-50
0
100
200
tp [ns]
300
400
Figure 3-7 Clamping voltage at +15 kV discharge according IEC61000-4-2 (R = 330 Ohm, C = 150 pF)
50
Scope: 6 GHz, 20 GS/s
25
0
VCL [V]
-25
-50
-75
-100
VCL-max-peak = -179 V
-125
VCL-30ns-peak = -18 V
-150
-175
-200
0
100
200
tp [ns]
300
400
Figure 3-8 Clamping voltage at -15 kV discharge according IEC61000-4-2 (R = 330 Ω, C = 150 pF)
Final Data Sheet
11
Revision 1.3, 2013-09-11
ESD3V3XU1BL
Typical Characteristics
0.5
CL [pF]
0.4
0.3
VR = 0 V
0.2
0.1
0
0
1
2
3
4
5
f [GHz]
6
7
8
9
10
8
9
10
Figure 3-9 Line capacitance: CL = f(f), VR = 0 V
0
-0.1
-0.2
VR = 0 V
S21 [dB]
-0.3
-0.4
-0.5
-0.6
-0.7
-0.8
-0.9
-1
0
1
2
3
4
5
f [GHz]
6
7
Figure 3-10 Insertion loss: S21 = f(f), VR = 0 V
Final Data Sheet
12
Revision 1.3, 2013-09-11
ESD3V3XU1BL
Package Information
4
Package Information
4.1
TSLP-2-17[2]
!
"
#$
0.45
Copper
Solder mask
0.375
0.35
0.275
1
0.925
0.3
0.35
0.6
0.275
Figure 4-1 TSLP-2-17 Package outline (dimension in mm)
Stencil apertures
TSLP-2-7-FP V01
Figure 4-2 TSLP-2-17 Footprint (dimension in mm)
Figure 4-3 TSLP-2-17 Packing (dimension in mm)
Figure 4-4 TSLP-2-17 Marking (example)
Final Data Sheet
13
Revision 1.3, 2013-09-11
ESD3V3XU1BL
References
References
[1]
Infineon AG - Application Note AN210: Effective ESD Protection Design at System Level Using VF-TLP
Characterization Methodology
[2]
Infineon AG - Recommendations for PCB Assembly of Infineon TSLP and TSSLP Package
Final Data Sheet
14
Revision 1.3, 2013-09-11
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Published by Infineon Technologies AG
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