ESD3V3XU1US Data Sheet (1.7 MB, EN)

TVS Diode
Transient Voltage Suppressor Diodes
ESD3V3XU1U Series
Uni-directional Ultra Low Capacitance ESD / Transient Protection Diode
ESD3V3XU1UL
ESD3V3XU1US
Data Sheet
Revision 1.1, 2011-10-19
Final
Industrial and Multi-Market
Edition 2011-10-19
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2011 Infineon Technologies AG
All Rights Reserved.
Legal Disclaimer
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characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any
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and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights
of any third party.
Information
For further information on technology, delivery terms and conditions and prices, please contact the nearest
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be endangered.
ESD3V3XU1U Series
Revision History
Page or Item
Subjects (major changes since previous revision)
Revision 1.1, 2011-10-19 Table3-2; Table3-4; Figure3-4 updated
Revision 1.0
2011.09.07
Trademarks of Infineon Technologies AG
AURIX™, BlueMoon™, C166™, CanPAK™, CIPOS™, CIPURSE™, COMNEON™, EconoPACK™, CoolMOS™,
CoolSET™, CORECONTROL™, CROSSAVE™, DAVE™, EasyPIM™, EconoBRIDGE™, EconoDUAL™,
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MIPAQ™, ModSTACK™, my-d™, NovalithIC™, OmniTune™, OptiMOS™, ORIGA™, PRIMARION™,
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SINDRION™, SIPMOS™, SMARTi™, SmartLEWIS™, SOLID FLASH™, TEMPFET™, thinQ!™,
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Other Trademarks
Advance Design System™ (ADS) of Agilent Technologies, AMBA™, ARM™, MULTI-ICE™, KEIL™,
PRIMECELL™, REALVIEW™, THUMB™, µVision™ of ARM Limited, UK. AUTOSAR™ is licensed by AUTOSAR
development partnership. Bluetooth™ of Bluetooth SIG Inc. CAT-iq™ of DECT Forum. COLOSSUS™,
FirstGPS™ of Trimble Navigation Ltd. EMV™ of EMVCo, LLC (Visa Holdings Inc.). EPCOS™ of Epcos AG.
FLEXGO™ of Microsoft Corporation. FlexRay™ is licensed by FlexRay Consortium. HYPERTERMINAL™ of
Hilgraeve Incorporated. IEC™ of Commission Electrotechnique Internationale. IrDA™ of Infrared Data
Association Corporation. ISO™ of INTERNATIONAL ORGANIZATION FOR STANDARDIZATION. MATLAB™ of
MathWorks, Inc. MAXIM™ of Maxim Integrated Products, Inc. MICROTEC™, NUCLEUS™ of Mentor Graphics
Corporation. Mifare™ of NXP. MIPI™ of MIPI Alliance, Inc. MIPS™ of MIPS Technologies, Inc., USA. muRata™
of MURATA MANUFACTURING CO., MICROWAVE OFFICE™ (MWO) of Applied Wave Research Inc.,
OmniVision™ of OmniVision Technologies, Inc. Openwave™ Openwave Systems Inc. RED HAT™ Red Hat, Inc.
RFMD™ RF Micro Devices, Inc. SIRIUS™ of Sirius Satellite Radio Inc. SOLARIS™ of Sun Microsystems, Inc.
SPANSION™ of Spansion LLC Ltd. Symbian™ of Symbian Software Limited. TAIYO YUDEN™ of Taiyo Yuden
Co. TEAKLITE™ of CEVA, Inc. TEKTRONIX™ of Tektronix Inc. TOKO™ of TOKO KABUSHIKI KAISHA TA.
UNIX™ of X/Open Company Limited. VERILOG™, PALLADIUM™ of Cadence Design Systems, Inc. VLYNQ™
of Texas Instruments Incorporated. VXWORKS™, WIND RIVER™ of WIND RIVER SYSTEMS, INC. ZETEX™ of
Diodes Zetex Limited.
Last Trademarks Update 2010-10-26
Final Data Sheet
3
Revision 1.1, 2011-10-19
ESD3V3XU1U Series
Table of Contents
Table of Contents
Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
List of Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
List of Tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1
1.1
1.2
Uni-directional Ultra Low Capacitance ESD / Transient Protection Diode . . . . . . . . . . . . . . . . . . 7
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Application Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2
Product Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3
3.1
3.2
Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Electrical Characteristics at TA = 25 °C, unless otherwise specified . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Typical Characteristics at TA=25°C, unless otherwise specified . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4
Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
5
5.1
5.2
Package Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
PG-TSLP-2-17 (mm) [3] . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
PG-TSSLP-2-1 (mm) [3] . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Terminology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Final Data Sheet
4
Revision 1.1, 2011-10-19
ESD3V3XU1U Series
List of Figures
List of Figures
Figure 2-1
Figure 3-1
Figure 3-2
Figure 3-3
Figure 3-4
Figure 3-5
Figure 3-6
Figure 3-7
Figure 3-8
Figure 3-9
Figure 3-10
Figure 3-11
Figure 3-12
Figure 3-13
Figure 3-14
Figure 4-1
Figure 5-1
Figure 5-2
Figure 5-3
Figure 5-4
Figure 5-5
Figure 5-6
Figure 5-7
Figure 5-8
Pin Configuration and Schematic Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Definitions of electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Forward current, IF = (VF) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Reverse current, IR = (VR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Reverse voltage characteristic, IR = (VR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Reverse current IR = f(TA), VR = 3.3 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Line capacitance CL = f(VR), f = 1MHz, from pin 1 to pin 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
IEC61000-4-2 VCL = f(t), 8 kV positive pulse from pin 1 to pin 2 . . . . . . . . . . . . . . . . . . . . . . . . . . 13
IEC61000-4-2 VCL = f(t), 8 kV negative pulse from pin 1 to pin 2 . . . . . . . . . . . . . . . . . . . . . . . . . . 13
IEC61000-4-2 VCL = f(t), 15 kV positive pulse from pin 1 to pin 2 . . . . . . . . . . . . . . . . . . . . . . . . . 14
IEC61000-4-2 VCL = f(t), 15 kV negative pulse from pin 1 to pin 2 . . . . . . . . . . . . . . . . . . . . . . . . . 14
Clamping voltage VTLP = f(ITLP), from pin 2 to pin 1 Note: [2] . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Clamping voltage VTLP = f(ITLP), from pin 1 to pin 2 Note: [2] . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Forward clamping voltage IPP = f(VFC), from pin 1 to pin 2 according to IEC61000-4-5 (8/20 μs) . 16
Reverse clamping voltage IPP = f(VCL), from pin 1 to pin 2 according to IEC61000-4-5 (8/20 μs) . 16
Single line, uni-directional ESD / Transient protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
PG-TSLP-2-17: Package overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
PG-TSLP-2-17: Footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
PG-TSLP-2-17: Packing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
PG-TSLP-2-17: Marking (example) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
PG-TSSLP-2-1: Package overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
PG-TSSLP-2-1: Footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
PG-TSSLP-2-1: Packing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
PG-TSSLP-2-1: Marking (example) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Final Data Sheet
5
Revision 1.1, 2011-10-19
ESD3V3XU1U Series
List of Tables
List of Tables
Table 2-1
Table 3-1
Table 3-2
Table 3-3
Table 3-4
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum Rating at TA = 25 °C, unless otherwise specified . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DC Characteristics at TA = 25 °C, unless otherwise specified . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
RF Characteristics at TA = 25 °C, unless otherwise specified . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
ESD Characteristics at TA = 25 °C, unless otherwise specified . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Final Data Sheet
6
7
8
8
9
9
Revision 1.1, 2011-10-19
ESD3V3XU1U Series
Uni-directional Ultra Low Capacitance ESD / Transient Protection Diode
1
Uni-directional Ultra Low Capacitance ESD / Transient Protection
Diode
1.1
Features
•
•
•
•
•
•
ESD / transient protection of high speed data lines exceeding:
– IEC61000-4-2 (ESD): ±20 kV (air / contact)
– IEC61000-4-4 (EFT): 2.5 kV / 50 A (5/50 ns)
– IEC61000-4-5 (surge): 3 A (8/20 μs)
Maximum working voltage: VRWM = 3.3 V
Ultra low capacitance CL = 0.4 pF (typical)
Very low clamping voltage: VCL= 8 V at IPP = 16 A (typical) [2]
Very low dynamic resistance: RDYN = 0.19 Ω (typical) [2]
Pb-free and halogen-free package (RoHS compliant)
1.2
•
•
Application Examples
USB 3.0, 10/100/1000 Ethernet, Firewire, DVI, HDMI, S-ATA, DisplayPort
Mobile HDMI Link, MDDI, MIPI, SWP / NFC
2
Product Description
Pin 1
Pin 1
Pin 2
TSLP-2
Pin 1 marking
(lasered)
TSSLP -2
Pin 1
Pin 2
Pin 2
a) Pin configuration
b) Schematic diagram
P G-TS (S)LP -2-S ingle_Die_diode_P inConf_and_S c hematicDiag.v st. vs d
Figure 2-1 Pin Configuration and Schematic Diagram
Table 2-1
Ordering Information
Type
Package
Configuration
ESD3V3XU1UL
PG-TSLP-2-17
1 line, uni-directional
X1
ESD3V3XU1US
PG-TSSLP-2-1
1 line, uni-directional
K
Final Data Sheet
7
Marking code
Revision 1.1, 2011-10-19
ESD3V3XU1U Series
Characteristics
3
Characteristics
Table 3-1
Maximum Rating at TA = 25 °C, unless otherwise specified
Parameter
Symbol
ESD (air / contact) discharge
1)
Peak pulse current (tp = 8/20 μs)
2)
Operating temperature range
Values
Min.
Typ.
Max.
VESD
–
–
20
kV
IPP
–
–
3
A
TOP
-40
–
125
°C
–
150
°C
Storage temperature
Tstg
-65
1) VESD according to IEC61000-4-2 (R = 330 Ω, C = 150 pF)
2) IPP according to IEC61000-4-5
Electrical Characteristics at TA = 25 °C, unless otherwise specified
3.1
VF
Forward voltage
IF
Forward current
VR
IR
Unit
IF
RDYN
VTrig
I PP
Reverse voltage
VCL
RDYN
Reverse current
VHold
VRWM
VHold
VTrig
VR
VRWM
VCL
VFC
VF
Dynamic resistance
Triggering reverse voltage
Clamping voltage
Holding reverse voltage
Reverse working voltage maximum
VFC
Forward clamping voltage
ITrig
Triggering reverse current
I Trig
IHold
Holding reverse current
IHold
IPP
IRWM
IRWM
RDYN
Peak pulse current
Reverse working current maximum
-I PP
IR
Diode_Charac teris tic _Curve_with _s napbac k_Uni-direc tional .v s d
Figure 3-1 Definitions of electrical characteristics
Table 3-2
DC Characteristics at TA = 25 °C, unless otherwise specified
Parameter
Symbol
Values
Unit
Note /
Test Condition
Min.
Typ.
Max.
Reverse working voltage VRWM
–
–
3.3
V
Pin 1 to Pin 2
Reverse current
–
1
50
nA
VR = 3.3 V,
IR
from Pin 1 to Pin 2
Reverse breakdown
voltage
Final Data Sheet
VBR
–
6.5
–
8
V
IR = 1 mA
from Pin 1 to Pin 2
voltage forced
Revision 1.1, 2011-10-19
ESD3V3XU1U Series
Characteristics
Table 3-3
RF Characteristics at TA = 25 °C, unless otherwise specified
Parameter
Symbol
Line capacitance
Series inductance
Table 3-4
CL
LS
Values
Unit
Note /
Test Condition
Min.
Typ.
Max.
–
0.4
0.65
pF
VR = 0 V, f = 1 MHz
–
0.4
0.65
pF
VR = 0 V, f = 1 GHz
–
0.4
–
nH
ESD3V3XU1US
–
0.2
–
nH
ESD3V3XU1UL
Unit
Note /
Test Condition
ESD Characteristics at TA = 25 °C, unless otherwise specified
Parameter
Symbol
1)
Values
Min.
Typ.
Max.
Trigger voltage [2]
VTRIG
–
7.2
–
V
TLP,
from Pin 1 to Pin 2
Reverse clamping
voltage1) [2]
VCL
–
8
–
V
TLP, IPP = 16 A,
from Pin 1 to Pin 2
–
11
–
V
TLP, IPP = 30 A,
from Pin 1 to Pin 2
–
6
–
V
TLP, IPP = 16 A,
from Pin 2 to Pin 1
–
9
–
V
TLP, IPP = 30 A,
from Pin 2 to Pin 1
–
0.19
–
Ω
TLP, Pin 1 to Pin 2
Forward clamping
voltage1) [2]
VFC
Dynamic resistance1) [2] RDYN
–
0.23
–
Ω
TLP, Pin 2 to Pin 1
1)Please refer to Application Note AN210. ANSI/ESD STM5.5.1 - Electrostatic Discharge Sensitivity Testing using
Transmission Line Pulse (TLP), tp = 100ns, tr = 0.6 ns, ITLP and VTLP averaging window: t1 = 30 ns to t2 = 60 ns,
extraction of dynamic TLP characteristic between IPP1 = 10 A and IPP2 = 40 A.
Final Data Sheet
9
Revision 1.1, 2011-10-19
ESD3V3XU1U Series
Characteristics
Typical Characteristics at TA=25°C, unless otherwise specified
3.2
0
10
10-1
10-2
10-3
IF [A]
10-4
10-5
10-6
-7
10
-8
10
-9
10
0
0.1
0.2
0.3
0.4
0.5
VF [V]
0.6
0.7
0.8
0.9
1
Figure 3-2 Forward current, IF = (VF)
-7
10
10-8
IR [A]
-9
10
10-10
10-11
10
-12
0
1
2
VR [V]
3
4
Figure 3-3 Reverse current, IR = (VR)
Final Data Sheet
10
Revision 1.1, 2011-10-19
ESD3V3XU1U Series
Characteristics
-3
10
10-4
-5
10
10-6
-7
IR [A]
10
-8
10
10-9
10
-10
10
-11
10
-12
0
1
2
3
4
5
6
7
VR [V]
Figure 3-4 Reverse voltage characteristic, IR = (VR)
-6
10
IR [A]
10-7
10-8
10-9
25
50
75
100
125
150
TA [°C]
Figure 3-5 Reverse current IR = f(TA), VR = 3.3 V
Final Data Sheet
11
Revision 1.1, 2011-10-19
ESD3V3XU1U Series
Characteristics
0.8
CL [pF]
0.6
0.4
0.2
0
0.5
1
1.5
2
2.5
3
3.5
VR [V]
Figure 3-6 Line capacitance CL = f(VR), f = 1MHz, from pin 1 to pin 2
Final Data Sheet
12
Revision 1.1, 2011-10-19
ESD3V3XU1U Series
Characteristics
80
Scope: 6 GHz, 20 GS/s
60
VCL [V]
VCL-max-peak = 81 [V]
VCL-30ns-peak = 7 [V]
40
20
0
-20
-100
0
100
200
300
400
tp [ns]
500
600
700
800
900
Figure 3-7 IEC61000-4-2 VCL = f(t), 8 kV positive pulse from pin 1 to pin 2
20
Scope: 6 GHz, 20 GS/s
0
VCL [V]
-20
VCL-max-peak = -72 [V]
-40
VCL-30ns-peak = -3 [V]
-60
-80
-100
0
100
200
300
400
tp [ns]
500
600
700
800
900
Figure 3-8 IEC61000-4-2 VCL = f(t), 8 kV negative pulse from pin 1 to pin 2
Final Data Sheet
13
Revision 1.1, 2011-10-19
ESD3V3XU1U Series
Characteristics
100
Scope: 6 GHz, 20 GS/s
VCL [V]
80
VCL-max-peak = 104 [V]
VCL-30ns-peak = 9 [V]
60
40
20
0
-20
-100
0
100
200
300
400
tp [ns]
500
600
700
800
900
Figure 3-9 IEC61000-4-2 VCL = f(t), 15 kV positive pulse from pin 1 to pin 2
20
Scope: 6 GHz, 20 GS/s
0
VCL [V]
-20
-40
VCL-max-peak = -98 [V]
VCL-30ns-peak = -7 [V]
-60
-80
-100
-100
0
100
200
300
400
tp [ns]
500
600
700
800
900
Figure 3-10 IEC61000-4-2 VCL = f(t), 15 kV negative pulse from pin 1 to pin 2
Final Data Sheet
14
Revision 1.1, 2011-10-19
ESD3V3XU1U Series
Characteristics
50
25
ESD3V3XU1U Series
RDYN
40
ITLP [A]
RDYN=0.23Ω
30
15
20
10
10
5
0
0
5
10
VTLP [V]
15
20
Equivalent VIEC [kV]
20
0
Figure 3-11 Clamping voltage VTLP = f(ITLP), from pin 2 to pin 1 Note: [2]
50
25
ESD3V3XU1U Series
RDYN
40
ITLP [A]
RDYN=0.19Ω
30
15
20
10
10
5
0
0
5
10
VTLP [V]
15
20
Equivalent VIEC [kV]
20
0
Figure 3-12 Clamping voltage VTLP = f(ITLP), from pin 1 to pin 2 Note: [2]
Note: TLP parameter: Z0 = 50 Ω, tp = 100 ns, tr = 600 ps, averaging window: t1 = 30 ns to t2 = 60 ns, extraction of
dynamic resistance using least squares fit of TLP charactertistic between IPP1 = 10 A and IPP2 = 40 A. The
equivalent stress level VIEC according IEC 61000-4-2 (R = 330 Ω , C = 150 pF) is calculated at the broad
peak of the IEC waveform at t = 30 ns with 2 A / kV
Final Data Sheet
15
Revision 1.1, 2011-10-19
ESD3V3XU1U Series
Characteristics
-1
VFC [V]
-1.5
-2
-2.5
-3
0
1
2
3
4
5
IPP [A]
Figure 3-13 Forward clamping voltage IPP = f(VFC), from pin 1 to pin 2 according to IEC61000-4-5 (8/20 μs)
7
VCL [V]
6
5
4
3
0
1
2
3
4
5
IPP [A]
Figure 3-14 Reverse clamping voltage IPP = f(VCL), from pin 1 to pin 2 according to IEC61000-4-5 (8/20 μs)
Final Data Sheet
16
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ESD3V3XU1U Series
Application Information
4
Application Information
Application_ESD3V3U1U-02xxx.vsd
Figure 4-1 Single line, uni-directional ESD / Transient protection
Final Data Sheet
17
Revision 1.1, 2011-10-19
ESD3V3XU1U Series
Package Information
5
Package Information
5.1
PG-TSLP-2-17 (mm) [3]
Top view
Bottom view
0.39 +0.01
-0.03
0.6 ±0.05
0.05 MAX.
1±0.05
0.65 ±0.05
2
0.25 ±0.035 1)
1
0.5 ±0.035 1)
Cathode
marking
1) Dimension applies to plated terminal
TSLP 2 7 PO V02
0.45
Copper
Solder mask
0.375
0.35
0.275
1
0.925
0.3
0.35
0.6
0.275
Figure 5-1 PG-TSLP-2-17: Package overview
Stencil apertures
TSLP-2-7-FP V01
Figure 5-2 PG-TSLP-2-17: Footprint
0.5
1.16
Orientation
marking
8
4
0.76
TSLP-2-7-TP V03
Figure 5-3 PG-TSLP-2-17: Packing
Type code
12
Cathode marking
Figure 5-4 PG-TSLP-2-17: Marking (example)
Final Data Sheet
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ESD3V3XU1U Series
Package Information
PG-TSSLP-2-1 (mm) [3]
Top view
Bottom view
0.31 +0.01
-0.02
2
0.62 ±0.035
0.355 ±0.025
0.32 ±0.035
1
0.2 ±0.025 1)
5.2
0.26 ±0.025 1)
Cathode
marking
1) Dimension applies to plated terminal
TSSLP-2-1,-2-PO V05
Figure 5-5 PG-TSSLP-2-1: Package overview
0.19
0.24
Solder mask
0.19
0.57
0.14
0.62
Copper
0.19
0.27
0.24
0.32
Stencil apertures
TSSLP-2-1,-2-FP V02
Figure 5-6 PG-TSSLP-2-1: Footprint
a
Tape type
Ex Ey
Punched Tape
0.43 0.73
Embossed Tape 0.37 0.67
8
Ey
Cathode
marking
g
0.35
4
Deliveries can be both tape types (no selection possible).
Specification allows identical processing (pick & place) by users.
Ex
TSSLP-2-1,-2-TP V03
Figure 5-7 PG-TSSLP-2-1: Packing
Figure 5-8 PG-TSSLP-2-1: Marking (example)
Final Data Sheet
19
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ESD3V3XU1U Series
References
References
[1]
On-chip ESD protection for integrated circuits, Albert Z. H. Wang, ISBN:0-7923-7647-1
[2]
Infineon AG - Application Note AN210: Effective ESD Protection Design at System Level Using VF-TLP
Characterization Methodology
[3]
Infineon AG - Recommendations for PCB Assembly of Infineon TSLP and TSSLP Package
Final Data Sheet
20
Revision 1.1, 2011-10-19
ESD3V3XU1U Series
Terminology
Terminology
CL
Line capacitance
DVI
Digital Visual Interface
EFT
Electrical Fast Transient
ESD
Electrostatic Discharge
HDMI
High Definition Multimedia Interface
IEC
International Electrotechnical Commission
IPP
Peak pulse current
IR
Reverse current
IRWM
Reverse working current maximum
MDDI
Mobile Display Digital Interface
MIPI
Mobile Industrial Processor Interface
NFC
Near Field Communication
PCB
Printed Circuit Board
RDYN
Dynamic resistance
RoHS
Restriction of Hazardous Substances Directive
S-ATA
Serial Advanced Technology Attachment
SWP
Single Wire Protocol
TA
Ambient temperature
TLP
Transmission Line Pulse
TOP
Operation temperature
tp
Pulse duration
tr
Pulse rise time
Tstg
Storage temperature
USB
Universal Serial Bus
VCL
Reverse clamping voltage
VESD
Electrostatic discharge voltage
VFC
Forward Clamping Voltage
VHold
Holding Voltage
VIEC
Equivalent stress level according IEC61000-4-2 (R = 330 Ω, C = 150 pF)
VR
Reverse voltage
VRWM
Reverse working voltage maximum
VTrig
Triggering Voltage
Z0
Impedance
Final Data Sheet
21
Revision 1.1, 2011-10-19
w w w . i n f i n e o n . c o m
Published by Infineon Technologies AG
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