DATASHEET

DATASHEET
±16.5kV ESD Protected, +125°C, 3.0V to 5.5V,
SOT-23/TDFN Packaged, 20Mbps, Full Fail-safe, Low
Power, RS-485/RS-422 Receivers
ISL3280E, ISL3281E, ISL3282E, ISL3283E, ISL3284E, ISL3285E
The Intersil ISL3280E, ISL3281E, ISL3282E, ISL3283E,
Features
ISL3284E, ISL3285E are ±16.5kV IEC61000 ESD Protected,
• IEC61000 ESD protection on RS-485 inputs . . . . . . . ±16.5kV
- Class 3 ESD level on all other pins. . . . . . . . . . . .>5kV HBM
3.0V to 5.5V powered, single receivers that meet both the
RS-485 and RS-422 standards for balanced communication.
These receivers have very low bus currents (+125µA/-100µA),
so they present a true “1/8 unit load” to the RS-485 bus. This
allows up to 256 receivers on the network without violating the
RS-485 specification’s 32 unit load maximum and without using
repeaters.
• Pb-free (RoHS compliant)
• Wide supply range . . . . . . . . . . . . . . . . . . . . . . . . . 3.0V to 5.5V
• Specified for +125°C operation
• Logic supply pin (VL) eases operation in mixed supply
systems (ISL3282E, ISL3284E, ISL3285E only)
Receiver inputs feature a “Full Fail-Safe” design, which ensures
a logic high Rx output if Rx inputs are floating, shorted, or
terminated but undriven.
• Full fail-safe (open, short, terminated/undriven)
• True 1/8 unit load allows up to 256 devices on the bus
The ISL3280E and ISL3284E feature an always enabled Rx;
the ISL3281E and ISL3285E feature an active high Rx enable
pin and the ISL3282E and ISL3283E include an active low
enable pin. All versions are offered in Industrial and Extended
Industrial (-40°C to +125°C) temperature ranges.
• High data rates. . . . . . . . . . . . . . . . . . . . . . . . . . up to 20Mbps
• Low quiescent supply current. . . . . . . . . . . . . . . 500µA (max)
- Very low shutdown supply current . . . . . . . . . . 20µA (max)
• -7V to +12V common mode input voltage range
A 26% smaller footprint is available with the ISL3282E and
ISL3285E TDFN package. These devices, plus the ISL3284E,
also feature a logic supply pin (VL) that sets the VOH level of
the RO output (and the switching points of the RE/RE input) to
be compatible with another supply voltage in mixed voltage
systems.
• Tri-statable Rx available (active low or high EN input)
• 5V tolerant logic inputs when VCC ≤ 5V
Applications
• Clock distribution
For companion single RS-485 transmitters in micro packages,
please see the ISL3293E datasheet.
• High node count systems
• Space constrained systems
• Security camera networks
• Building environmental control/lighting systems
• Industrial/process control networks
TABLE 1. SUMMARY OF FEATURES
FUNCTION
DATA RATE
(Mbps)
# DEVICES
ON BUS
VL PIN?
QUIESCENT ICC
(µA)
LOW POWER
SHUTDOWN?
LEAD
COUNT
ISL3280E
1 Rx
20
256
NO
NO
350
NO
5-SOT
ISL3281E
1 Rx
20
256
ACTIVE HIGH
NO
350
YES
6-SOT
ISL3282E
1 Rx
20
256
ACTIVE LOW
YES
350
YES
8-TDFN
ISL3283E
1 Rx
20
256
ACTIVE LOW
NO
350
YES
6-SOT
ISL3284E
1 Rx
20
256
NO
YES
350
NO
6-SOT
ISL3285E
(No longer available or supported)
1 Rx
20
256
ACTIVE HIGH
YES
350
YES
8-TDFN
PART NUMBER
July 27, 2015
FN6543.4
1
RX
ENABLE?
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas LLC 2007, 2014, 2015. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
ISL3280E, ISL3281E, ISL3282E, ISL3283E, ISL3284E, ISL3285E
Pin Configurations
ISL3281E
(6 LD SOT-23)
TOP VIEW
ISL3280E
(5 LD SOT-23)
TOP VIEW
VCC
1
5
GND 2
A
VCC
GND 2
R
RO 3
1
4
B
RO 3
1
GND
2
NC
VCC
8
B
7
RE
3
6
VL
4
5
A
R
VCC
1
GND 2
1
GND 2
R
RO 3
2
5
RE
4
B
6
A
5
RE
4
B
ISL3285E
(8 LD TDFN)
TOP VIEW
6
A
5
VL
4
B
RO 1
BL E
ILA
GND 2 R AVA
E
G
R
L ON
NO
NC 3
VCC
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R
RO 3
ISL3284E
(6 LD SOT-23)
TOP VIEW
VCC
A
ISL3283E
(6 LD SOT-23)
TOP VIEW
ISL3282E
(8 LD TDFN)
TOP VIEW
RO
R
6
4
TE
P OR
SUP
OR 8 B
7
RE
6
VL
5
A
D
FN6543.4
July 27, 2015
ISL3280E, ISL3281E, ISL3282E, ISL3283E, ISL3284E, ISL3285E
Ordering Information
PART NUMBER
(Notes 1, 2, 3)
PART MARKING
(Note 4)
TEMP. RANGE
(°C)
PACKAGE
(RoHS Compliant)
PKG.
DWG. #
ISL3280EFHZ-T
280F
-40 to +125
5 Ld SOT-23
P5.064
ISL3280EIHZ-T
280I
-40 to +85
5 Ld SOT-23
P5.064
ISL3281EFHZ-T
281F
-40 to +125
6 Ld SOT-23
P6.064
ISL3281EIHZ-T
281I
-40 to +85
6 Ld SOT-23
P6.064
ISL3282EFRTZ-T
82F
-40 to +125
8 Ld TDFN
L8.2x3A
ISL3282EIRTZ-T
82I
-40 to +85
8 Ld TDFN
L8.2x3A
ISL3283EFHZ-T
283F
-40 to +125
6 Ld SOT-23
P6.064
ISL3283EIHZ-T
283I
-40 to +85
6 Ld SOT-23
P6.064
ISL3284EFHZ-T
284F
-40 to +125
6 Ld SOT-23
P6.064
ISL3284EIHZ-T
284I
-40 to +85
6 Ld SOT-23
P6.064
ISL3285EFRTZ-T (No longer available or supported)
85F
-40 to +125
8 Ld TDFN
L8.2x3A
ISL3285EIRTZ-T (No longer available or supported)
85I
-40 to +85
8 Ld TDFN
L8.2x3A
NOTES:
1. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials and 100% matte tin
plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free
products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
2. Please refer to TB347 for details on reel specifications.
3. For Moisture Sensitivity Level (MSL), please see product information page for ISL3280E, ISL3281E, ISL3282E, ISL3283E, ISL3284E, ISL3285E. For
more information on MSL, please see tech brief TB363.
4. SOT-23 “PART MARKING” is branded on the bottom side.
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ISL3280E, ISL3281E, ISL3282E, ISL3283E, ISL3284E, ISL3285E
Truth Table
RECEIVING
INPUTS
OUTPUT
RE, RE
A-B
RO
1, 0
≥ -0.05V
1
1, 0
≤ -0.2V
0
1, 0
Inputs Open/Shorted
1
0, 1
X
High-Z*
NOTE: *Shutdown Mode, except for ISL3280E, ISL3284E
Pin Descriptions
PIN NAME
RO
RE, RE
GND
FUNCTION
Receiver output: If A - B  -50mV, RO is high; If A - B  -200mV, RO is low; RO = High if A and B are unconnected (floating) or shorted.
Receiver output enable. RO is enabled when RE/RE is high / low; RO is high impedance when RE/RE is low/high. If the Rx enable function
is not used, connect RE directly to GND, or connect RE through a 1kΩ, or greater, resistor to VCC. RE/RE are internally pulled low/high.
Ground connection. This is also the potential of the TDFN thermal pad.
A
±16.5kV IEC61000 ESD protected RS-485, RS-422 level, noninverting receiver input.
B
±16.5kV IEC61000 ESD protected RS-485, RS-422 level, inverting receiver input.
VCC
System power supply input (3.0V to 5.5V). On devices with a VL pin powered from a separate supply, power-up VCC first.
VL
Logic-level supply, which sets the VIL / VIH levels for the RE (ISL3282E only) and RE (ISL3285E only) pins and sets the VOH level of the RO
output (ISL3282E, ISL3284E, ISL3285E only). If VL and VCC are different supplies, power-up this supply after VCC and keep VL ≤ VCC.
NC
No Connection.
Typical Operating Circuits
+3.3V TO 5V
+3.3V
+
1
0.1µF
0.1µF
+
2
VCC
VCC
ISL3281E
3 RO
R
ISL329xE
A
6
B
4
RT
6
Y
4
Z
D
5 RE
DI 1
DE 3
GND
GND
2
5
FIGURE 1. NETWORK WITH ENABLES
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July 27, 2015
ISL3280E, ISL3281E, ISL3282E, ISL3283E, ISL3284E, ISL3285E
Typical Operating Circuits (Continued)
+3.3V TO 5V
+3.3V
+
1
VCC
0.1µF
0.1µF
+
2
R
3
VCC
ISL3280E
3 RO
1kΩ TO 3kΩ
ISL329xE
A
5
B
4
RT
6
Y
4
Z
DE
D
GND
GND
2
5
DI 1
FIGURE 2. NETWORK WITHOUT ENABLES
1.8V
+3.3V TO 5V
+3.3V
+
4
VCC
6
VL
VCC
0.1µF
0.1µF
8
1 RO
R
1
VCC
ISL3282E
LOGIC
DEVICE
(µP, ASIC,
UART)
2.5V
+
VL
ISL3298E
A
5
B
8
RT
6
Y
7
Z
D
7 RE
DI 3
DE 2
GND
2
VCC
NOTE: IF POWERED FROM SEPARATE SUPPLIES,
POWER-UP VCC BEFORE VL
LOGIC
DEVICE
(P, ASIC,
UART)
GND
4, 5
FIGURE 3. NETWORK WITH VL PIN FOR INTERFACE TO LOWER VOLTAGE LOGIC DEVICES
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FN6543.4
July 27, 2015
ISL3280E, ISL3281E, ISL3282E, ISL3283E, ISL3284E, ISL3285E
Absolute Maximum Ratings
Thermal Information
VCC to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 7V
VL to GND (ISL3282E, ISL3284E, ISL3285E Only) . . . -0.3V to (VCC +0.3V)
Input Voltages
RE, RE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 7V
Input/Output Voltages
A, B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -8V to +13V
RO (Not ISL3282E, ISL3284E, ISL3285E). . . . . . . . -0.3V to (VCC +0.3V)
RO (ISL3282E, ISL3284E, ISL3285E) . . . . . . . . . . . . -0.3V to (VL +0.3V)
Short-circuit Duration
RO. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Indefinite
ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Specification Table
Thermal Resistance (Typical)
JA (°C/W) JC (°C/W)
190
N/A
5 Ld SOT-23 Package (Note 5) . . . . . . . . . .
6 Ld SOT-23 Package (Note 5) . . . . . . . . . .
177
N/A
8 Ld TDFN Package (Notes 6, 7). . . . . . . . .
65
8
Maximum Junction Temperature (Plastic Package) . . . . . . . . . . . +150°C
Maximum Storage Temperature Range . . . . . . . . . . . . . .-65°C to +150°C
Pb-free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see TB493
Operating Conditions
Temperature Range
F Suffix. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +125°C
I Suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to +85°C
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
5. JA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
6. JA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech
Brief TB379.
7. For JC, the “case temp” location is the center of the exposed metal pad on the package underside.
Electrical Specifications Test Conditions: VCC = 3.0V to 5.5V; VL = VCC (ISL3282E, ISL3284E, ISL3285E only); Typicals are at TA = +25°C
(Note 12); Unless Otherwise Specified (Note 8).
PARAMETER
SYMBOL
TEST CONDITIONS
TEMP
(°C)
MIN
TYP
MAX
(Note 11) (Note 12) (Note 11)
UNIT
DC CHARACTERISTICS
VL = VCC if ISL3282E, or
ISL3285E
VCC  3.6V
VCC  5.5V
VIH3
2.7V  VL < 3.0V
VIH4
2.3V  VL < 2.7V
ISL3282E and
ISL3285E only
VIH5
1.6V  VL < 2.3V
VIH6
1.35V  VL < 1.6V
VIL1
VL = VCC if ISL3282E or ISL3285E
Full
-
-
0.7
V
Full
-
-
0.6
V
VIH1
Input High Voltage (RE, RE)
(Notes 9, 10)
VIH2
Input Low Voltage (RE, RE)
(Notes 9, 10)
ISL3282E and
ISL3285E only
Full
2
-
-
V
Full
2.4
-
-
V
Full
1.7
-
-
V
Full
1.6
-
-
V
Full
0.72*VL
-
-
V
25
-
0.5*VL
-
V
Full
-
-
0.7
V
VIL2
VL  2.7V
VIL3
2.3V  VL < 2.7V
VIL4
1.6V  VL < 2.3V
Full
-
-
0.25*VL
V
VIL5
1.35V  VL < 1.6V
25
-
0.33*VL
-
V
Logic Input Current (Note 9)
IIN1
RE = RE = 0V or VCC
Full
-15
±9
15
µA
Input Current (A, B)
IIN2
VCC = 0V, 3.6V, or 5.5V
Full
-
80
125
µA
Receiver Differential Threshold
Voltage
V TH
-7V  VCM  12V
VIN = 12V
VIN = -7V
Full
-100
-50
-
µA
Full
-200
-125
-50
mV
Receiver Input Hysteresis
V TH
VCM = 0V
25
-
15
-
mV
Receiver Input Resistance
RIN
-7V  VCM  12V
Full
-
150
-
kΩ
Receiver Short-Circuit Current
IOSR
0V  VO  VCC
Full
±7
±30
±85
mA
Receiver Output High Voltage
VOH1
IO = -3.5mA, VID = -50mV (VL = VCC if ISL3282E,
ISL3284E, ISL3285E)
Full
VCC - 0.4
-
-
V
VOH2
IO = -1mA, VL  1.6V
Full
VL - 0.4
-
-
V
VOH3
IO = -500µA, VL = 1.5V
Full
1.2
-
-
V
VOH4
IO = -150µA, VL = 1.35V
Full
1.15
-
-
V
VOH5
IO = -100µA, VL  1.35V
Full
VL - 0.1
-
-
V
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ISL3282E,
ISL3284E and
ISL3285E only
FN6543.4
July 27, 2015
ISL3280E, ISL3281E, ISL3282E, ISL3283E, ISL3284E, ISL3285E
Electrical Specifications Test Conditions: VCC = 3.0V to 5.5V; VL = VCC (ISL3282E, ISL3284E, ISL3285E only); Typicals are at TA = +25°C
(Note 12); Unless Otherwise Specified (Note 8). (Continued)
PARAMETER
SYMBOL
Receiver Output Low Voltage
Three-state (high impedance)
Receiver Output Current
(Notes 9, 10)
TEST CONDITIONS
TEMP
(°C)
MIN
TYP
MAX
(Note 11) (Note 12) (Note 11)
UNIT
VOL1
IO = 4mA, VID = -200mV, VL  2.2V if ISL3282E,
ISL3284E, ISL3285E
Full
-
0.2
0.4
V
Full
-
0.2
0.4
V
VOL2
IO = 2mA, VL  1.5V
VOL3
IO = 1mA, VL  1.35V
VOL4
IO = 500µA, VL  1.35V
IOZR
ISL3282E,
ISL3284E and
ISL3285E only
Full
-
0.1
0.4
V
25
-
0.1
-
V
0V  VO  VCC
Full
-1
0.015
1
µA
ICC
RE/RE = VCC/0V
Full
-
400
500
µA
ISHDN
RE/RE = 0V/VCC
Full
-
-
20
µA
IEC61000-4-2, Air-Gap Discharge Method
25
-
±16.5
-
kV
IEC61000-4-2, Contact Discharge Method
25
-
±9
-
kV
SUPPLY CURRENT
No-Load Supply Current
Shutdown Supply Current
(Note 9)
ESD PERFORMANCE
RS-485 Pins (A, B)
All Pins
Human Body Model, from bus pins to GND
25
-
±16.5
-
kV
HBM, per MIL-STD-883 Method 3015
25
-
±5
-
kV
MM
25
-
±250
-
V
VID = ±2V, VCM = 0V (Figure 4 and Table 2)
(Note 12)
Full
20
30, 24
-
Mbps
VID = ±2V, VCM = 0V (Figure 4)
Full
20
36
60
ns
RECEIVER SWITCHING CHARACTERISTICS
Maximum Data Rate
Receiver Input to Output Delay
fMAX
tPLH, tPHL
Receiver Skew | tPLH - tPHL |
VL  1.5V (Figure 4)
ISL3282E,
ISL3284E and
ISL3285E only
25
-
44
-
ns
tSK1
VCC = 3.3V ±10% (Figure 4)
Full
-
1
5.5
ns
tSK2
VCC = 5V ±10% (Figure 4)
VL = VCC if
ISL3282E,
ISL3284E, or
ISL3285E
Full
-
2
7.5
ns
tSK3
VL  1.8V (Figure 4)
tSK4
VL = 1.5V (Figure 4)
ISL3282E,
ISL3284E and
ISL3285E only
Receiver Enable to Output High
(Note 9)
tZH
RL = 1kΩ, CL = 15pF,
SW = GND (Figure 5)
(Note 12)
VL  1.5V (Note 12)
Receiver Enable to Output Low
(Note 9)
tZL
RL = 1kΩ, CL = 15pF,
SW = VCC (Figure 5)
(Note 12)
VL  1.5V (Note 12)
Receiver Disable from Output
High (Note 9)
tHZ
RL = 1kΩ, CL = 15pF,
SW = GND (Figure 5)
Receiver Disable from Output
Low (Note 9)
tLZ
RL = 1kΩ, CL = 15pF,
SW = VCC (Figure 5)
VL  1.5V (Note 12)
VL  1.5V (Note 12)
25
-
2
-
ns
25
-
4
-
ns
Full
-
240, 90
500
ns
25
-
250, 120
-
ns
Full
-
240, 90
500
ns
25
-
250, 120
-
ns
Full
-
10
20
ns
25
-
24, 20
-
ns
Full
-
10
20
ns
25
-
24, 20
-
ns
NOTES:
8. All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to device ground unless otherwise
specified.
9. Does not apply to the ISL3280E or ISL3284E.
10. If the Rx enable function isn’t needed, connect the enable pin to the appropriate supply, as described in the “Pin Descriptions” table on page 4
11. Parts are 100% tested at +25°C. Over-temperature limits established by characterization and are not production tested.
12. Typical values are at 3.3V, 5V. Parameters with a single entry in the “TYP” column apply to 3.3V and 5V.
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ISL3280E, ISL3281E, ISL3282E, ISL3283E, ISL3284E, ISL3285E
Test Circuits and Waveforms
RE
VCC
GND
B
R
A
+1V
B
RE
0V
15pF
RO
0V
-1V
A
tPLH
tPHL
VCC OR VL
SIGNAL
GENERATORS
50%
RO
50%
0V
FIGURE 4A. TEST CIRCUIT
FIGURE 4B. MEASUREMENT POINTS
FIGURE 4. RECEIVER PROPAGATION DELAY AND DATA RATE
RE OR RE
GND
3V
B
A
1kΩ
RO
R
VCC OR VL
SW
SIGNAL
GENERATOR
RE
(INVERT FOR RE)
1.5V
1.5V
0V
GND
tZH
15pF
OUTPUT HIGH
A
SW
tHZ
+1.5V
GND
tLZ
-1.5V
VCC OR VL
tZH
+1.5V
GND
tZL
-1.5V
VCC OR VL
FIGURE 5A. TEST CIRCUIT
V
VOH - 0.25V OH
50%
RO
PARAMETER
tHZ
0V
tZL
RO
tLZ
VCC OR VL
50%
OUTPUT LOW
VOL + 0.25V V
OL
FIGURE 5B. MEASUREMENT POINTS
FIGURE 5. RECEIVER ENABLE AND DISABLE TIMES (EXCEPT ISL3280E AND ISL3284E)
Application Information
RS-485 and RS-422 are differential (balanced) data transmission
standards for use in long haul or noisy environments. RS-422 is a
subset of RS-485, so RS-485 transceivers are also RS-422
compliant. RS-422 is a point-to-multipoint (multidrop) standard,
which allows only one driver and up to 10 (assuming one unit load
devices) receivers on each bus. RS-485 is a true multipoint
standard, which allows up to 32 one unit load devices (any
combination of drivers and receivers) on each bus.
Another important advantage of RS-485 is the extended
Common Mode Range (CMR), which specifies that the driver
outputs and receiver inputs withstand signals that range from
+12V to -7V. RS-422 and RS-485 are intended for runs as long
as 4000’, so the wide CMR is necessary to handle ground
potential differences, as well as voltages induced in the cable
by external fields.
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8
Receiver Features
These devices utilize a differential input receiver for maximum
noise immunity and common mode rejection. Input sensitivity is
better than ±200mV, as required by the RS-422 and RS-485
specifications.
Receiver input resistance of 96kΩ surpasses the RS-422
specification of 4kΩ and is eight times the RS-485 “Unit Load
(UL)” requirement of 12kΩ minimum. Thus, these products are
known as “one-eighth UL” transceivers and there can be up to
256 of these devices on a network while still complying with
the RS-485 loading specification.
Receiver inputs function with common mode voltages as great
as +9V/-7V outside the power supplies (i.e., +12V and -7V),
making them ideal for long networks where induced voltages
and ground potential differences are realistic concerns.
FN6543.4
July 27, 2015
ISL3280E, ISL3281E, ISL3282E, ISL3283E, ISL3284E, ISL3285E
All the receivers include a “full fail-safe” function that
guarantees a high level receiver output if the receiver inputs are
unconnected (floating), shorted together, or connected to a
terminated but undriven bus. Fail-safe with shorted inputs is
achieved by setting the Rx upper switching point to -50mV,
thereby ensuring that the Rx sees 0V differential as a high input
level.
All receivers easily support a 20Mbps data rate and all receiver
outputs (except on the ISL3280E and ISL3284E) are
tri-statable via the active low RE input or by the active high RE
input.
TABLE 2. VIH, VIL AND DATA RATE vs VL FOR VCC = 3.3V OR 5V
VL
(V)
VIH
(V)
VIL
(V)
DATA RATE
(Mbps)
1.35
0.55
0.5
11
1.6
0.7
0.6
16
1.8
0.8
0.7
23
2.3
1
0.9
27
2.7
1.1
1
30
3.3
1.3
1.2
30
5.5 (i.e., VCC)
2
1.8
24
VCC = +3.3V
RO
RE
VCC = +2V
VOH = 3.3V
RXD
VIH  2V
VOH  2V
GND
ISL3283E
ESD
DIODE
GND
VCC = +2V
VL
RO
RE
VOH = 2V
RXD
VIH = 1V
GND
VOH  2V
ISL3282E
The ISL3280E, ISL3281E, ISL3282E, ISL3283E, ISL3284E,
ISL3285E are designed to operate with a wide range of
supply voltages from 3.0V to 5.5V. These devices meet the
RS-422 and RS-485 specifications over this full range.
Logic Supply (VL Pin, ISL3282E, ISL3284E,
ISL3285E Only)
Note: If powered from separate supplies, power-up VCC before
powering up the VL supply and keep VL ≤ VCC.
The ISL3282E, ISL3284E and ISL3285E include a VL pin that
powers the logic input (RE or RE) and/or the Rx output. These
pins interface with “logic” devices such as UARTs, ASICs and
microcontrollers and today most of these devices use power
supplies significantly lower than 3.3V. Thus, a 3.3V output level
from a 3.3V powered RS-485 IC might seriously overdrive and
damage the logic device input. Similarly, the logic device’s low
VOH might not exceed the VIH of a 3.3V or 5V powered RE
input. Connecting the VL pin to the power supply of the logic
device (as shown in Figure 6) limits the ISL3282E, ISL3284E,
ISL3285E’s Rx output VOH to VL (see Figures 9 through 13)
and reduces the RE/RE input switching point to a value
compatible with the logic device’s output levels. Tailoring the
logic pin input switching point and output levels to the supply
voltage of the UART, ASIC, or microcontroller eliminates the
need for a level shifter/translator between the two ICs.
VL can be anywhere from VCC down to 1.35V, but the input
switching points may not provide enough noise margin when
VL < 1.6V. Table 2 indicates typical VIH, VIL and data rate
values for various VL settings so the user can ascertain
whether or not a particular VL voltage meets his/her needs.
The quiescent, RO unloaded, VL supply current (IL) is typically
less than 60µA for VL ≤ 3.3V, as shown in Figure 8.
ESD Protection
RXEN
UART/PROCESSOR
VCC = +3.3V TO 5V
Wide Supply Range
ESD
DIODE
RXEN
GND
All pins on these devices include class 3 (>4kV) Human Body
Model (HBM) ESD protection structures, but the RS-485 pins
(receiver inputs) incorporate advanced structures allowing
them to survive ESD events in excess of ±16.5kV HBM and
±16.5kV IEC61000. The RS-485 pins are particularly
vulnerable to ESD damage because they typically connect to
an exposed port on the exterior of the finished product.
Simply touching the port pins, or connecting a cable, can
cause an ESD event that might destroy unprotected ICs.
These new ESD structures protect the device whether or not it
is powered up and without degrading the RS-485 common
mode range of -7V to +12V. This built-in ESD protection
eliminates the need for board level protection structures
(e.g., transient suppression diodes) and the associated,
undesirable capacitive load they present.
UART/PROCESSOR
FIGURE 6. USING VL PIN TO ADJUST LOGIC LEVELS
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FN6543.4
July 27, 2015
ISL3280E, ISL3281E, ISL3282E, ISL3283E, ISL3284E, ISL3285E
IEC61000-4-2 Testing
Data Rate, Cables and Terminations
The IEC61000 test method applies to finished equipment, rather
than to an individual IC. Therefore, the pins most likely to suffer
an ESD event are those that are exposed to the outside world (the
RS-485 pins in this case) and the IC is tested in its typical
application configuration (power applied) rather than testing
each pin-to-pin combination. The lower current limiting resistor
coupled with the larger charge storage capacitor yields a test
that is much more severe than the HBM test. The extra ESD
protection built into this device’s RS-485 pins allows the design
of equipment meeting level 4 criteria without the need for
additional board level protection on the RS-485 port.
RS-485, RS-422 are intended for network lengths up to 4000’,
but the maximum system data rate decreases as the
transmission length increases. Networks operating at 20Mbps
are limited to lengths less than 100’, while a 250kbps network
that uses slew rate limited transmitters can operate at that data
rate over lengths of several thousand feet.
AIR-GAP DISCHARGE TEST METHOD
To minimize reflections, proper termination is imperative for high
data rate networks. Short networks using slew rate limited
transmitters need not be terminated, but terminations are
recommended unless power dissipation is an overriding concern.
For this test method, a charged probe tip moves toward the IC pin
until the voltage arcs to it. The current waveform delivered to the
IC pin depends on approach speed, humidity, temperature, etc.,
so it is difficult to obtain repeatable results. The A and B RS-485
pins withstand ±16.5kV air-gap discharges.
CONTACT DISCHARGE TEST METHOD
During the contact discharge test, the probe contacts the tested
pin before the probe tip is energized, thereby eliminating the
variables associated with the air-gap discharge. The result is a
more repeatable and predictable test, but equipment limits
prevent testing devices at voltages higher than ±9kV. The
ISL3280E, ISL3281E, ISL3282E, ISL3283E, ISL3284E, ISL3285E
survive ±9kV contact discharges on the RS-485 pins.
Twisted pair is the cable of choice for RS-485, RS-422 networks.
Twisted pair cables tend to pick up noise and other
electromagnetically induced voltages as common mode signals,
which are effectively rejected by the differential receiver in these
ICs.
In point-to-point, or point-to-multipoint (single driver on bus)
networks, the main cable should be terminated in its
characteristic impedance (typically 120Ω) at the end farthest
from the driver. In multi receiver applications, stubs connecting
receivers to the main cable should be kept as short as possible.
Multipoint (multi driver) systems require that the main cable be
terminated in its characteristic impedance at both ends. Stubs
connecting a transmitter or receiver to the main cable should be
kept as short as possible.
Low Power Shutdown Mode
These BiCMOS receivers all use a fraction of the power required
by their bipolar counterparts and the versions with output enable
functions include a shutdown feature that reduces the already
low quiescent ICC to a 20µA trickle. These versions enter
shutdown whenever the receiver disables (RE = VCC or
RE = GND).
Typical Performance Curves
CL = 15pF, TA = +25°C; unless otherwise specified.
250
0.50
0.40
0.30
IL (A)
ICC (mA)
200
VCC = VL = 3.3V
0.35
0.25
150
VL = 5V, VCC = 5V ONLY
100
0.20
0.15
0.10
50
VL  1.8V
VL = 3.3V
RE = VCC, RE = 0V
0.05
0
-40
VCC = 5V OR 3.3V
VCC = VL = 5V
0.45
-15
10
60
35
TEMPERATURE (°C)
85
110 125
FIGURE 7. SUPPLY CURRENT vs TEMPERATURE
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10
0
VL = 2.5V
0
1
2
3
4
5
6
7 7.5
RE VOLTAGE (V)
FIGURE 8. VL SUPPLY CURRENT vs ENABLE PIN VOLTAGE
FN6543.4
July 27, 2015
ISL3280E, ISL3281E, ISL3282E, ISL3283E, ISL3284E, ISL3285E
Typical Performance Curves
30
VCC = VL = 5V
VOL, +25°C
VOH, +25°C
50
40
RECEIVER OUTPUT CURRENT (mA)
RECEIVER OUTPUT CURRENT (mA)
60
CL = 15pF, TA = +25°C; unless otherwise specified. (Continued)
VOL, +85°C
VOL, +125°C
VOH, +125°C
30
VOH, +85°C
20
10
0
1
0
2
3
4
VOL, +25°C
25
15
10
5
VCC = 5V OR 3.3V, VL = 3.3V
0
0.5
9
VOL, +25°C
VOL, +85°C
16
14
VOL, +125°C
12 VOH, +25°C
10
8
VOH, +85°C
VOH, +125°C
6
4
2
0
0
0.5
1.0
1.5
2.0
VOL, +85°C
6
VOL, +125°C
5
VOH, +25°C
4
VOH, +125°C
2
1
0
0.5
VOL, +125°C
3.0
2.5
2.0
VOH, +25°C
VOH, +85°C
1.5
VOH, +125°C
1.0
1.0
1.5
1.8
FIGURE 12. RECEIVER OUTPUT CURRENT vs RECEIVER OUTPUT
VOLTAGE
VOL, +25°C
4.0
3.5
VOH, +85°C
3
55
VOL, +85°C
3.0 3.3
RECEIVER OUTPUT VOLTAGE (V)
PROPAGATION DELAY (ns)
RECEIVER OUTPUT CURRENT (mA)
4.5
2.5
VOL, +25°C
7
0
2.5
FIGURE 11. RECEIVER OUTPUT CURRENT vs RECEIVER OUTPUT
VOLTAGE
VCC = 5V or 3.3V, VL = 1.5V
2.0
VCC = 5V OR 3.3V, VL = 1.8V
8
RECEIVER OUTPUT VOLTAGE (V)
5.0
1.5
FIGURE 10. RECEIVER OUTPUT CURRENT vs RECEIVER OUTPUT
VOLTAGE
RECEIVER OUTPUT CURRENT (mA)
RECEIVER OUTPUT CURRENT (mA)
VCC = 5V OR 3.3V, VL = 2.5V
1.0
RECEIVER OUTPUT VOLTAGE (V)
FIGURE 9. RECEIVER OUTPUT CURRENT vs RECEIVER OUTPUT
VOLTAGE
18
VOH, +85°C
VOH, +125°C
RECEIVER OUTPUT VOLTAGE (V)
20
VOL, +125°C
20
0
5
VOL, +85°C
VOH, +25°C
VCC = 5V
50
VL = 1.5V
45
VL = 1.8V
40
VL = 2.5V
35
0.5
0
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4 1.5
RECEIVER OUTPUT VOLTAGE (V)
FIGURE 13. RECEIVER OUTPUT CURRENT vs RECEIVER OUTPUT
VOLTAGE
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11
30
-40
-15
10
35
60
85
110 125
TEMPERATURE (°C)
FIGURE 14. RECEIVER PROPAGATION DELAY vs TEMPERATURE
FN6543.4
July 27, 2015
ISL3280E, ISL3281E, ISL3282E, ISL3283E, ISL3284E, ISL3285E
Typical Performance Curves
5.0
|tPLH - tPHL|
CL = 15pF, TA = +25°C; unless otherwise specified. (Continued)
55
VCC = 5V
4.5
SKEW (ns)
3.5
3.0
2.5
VL = 2.5V
2.0
VL = 1.8V
1.5
50
PROPAGATION DELAY (ns)
VL = 1.5V
4.0
1.0
VCC = 3.3V
VL = 1.5V
45
VL = 1.8V
40
VL = 2.5V
35
0.5
0
-40
-15
10
35
60
85
110
30
-40
125
-15
10
TEMPERATURE (°C)
|tPLH - tPHL|
VCC = 3.3V
3.5
VL = 1.5V
2.0
RECEIVER OUTPUT (V)
SKEW (ns)
3.0
2.5
1.5 VL = 1.8V
1.0
VL = 2.5V
0.5
VL = 1.8V
0
-40
-15
10
35
60
RECEIVER INPUT (V)
110 125
85
110
VCC = 5V
0
-2.0
A-B
VL = 5V
5.0
4.0
VL = 2.5V
3.0
2.0
1.0
0
VL = 1.5V
125
TIME (20ns/DIV)
FIGURE 17. RECEIVER SKEW vs TEMPERATURE
RECEIVER OUTPUT (V)
85
2.0
TEMPERATURE (°C)
VCC = 3.3V
2.0
FIGURE 18. RECEIVER WAVEFORMS
Die Characteristics
SUBSTRATE AND TDFN THERMAL PAD POTENTIAL
(POWERED UP):
0
-2.0
60
FIGURE 16. RECEIVER PROPAGATION DELAY vs TEMPERATURE
RECEIVER INPUT (V)
FIGURE 15. RECEIVER SKEW vs TEMPERATURE
4.0
35
TEMPERATURE (°C)
A-B
GND
4.0
VL = 3.3V
3.0
VL = 2.5V
2.0
VL = 1.5V
1.0
TRANSISTOR COUNT:
140
PROCESS:
Si Gate BiCMOS
0
TIME (20ns/DIV)
FIGURE 19. RECEIVER WAVEFORMS
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12
FN6543.4
July 27, 2015
ISL3280E, ISL3281E, ISL3282E, ISL3283E, ISL3284E, ISL3285E
Revision History
The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to the web to make sure that
you have the latest revision.
DATE
REVISION
CHANGE
July 27, 2015
FN6543.4
- Added “No longer available or supported” statement to ISL3285E in Table 1 on page 1, Ordering Information
table on page 3 and ISL3285E pin configuration on page 2.
Replaced L8.2x3A package outline drawing with the newest revision. Changes from revision 1 to revision 2:
Tiebar Note updated
From: Tiebar shown (if present) is a non-functional feature.
To: Tiebar shown (if present) is a non-functional feature and may be located on any of the 4 sides (or ends).
December 4, 2014
FN6543.3
-Updated datasheet to Intersil new standard.
-Added text in several places to clarify that VL can be connected to Vcc.
-Ordering information table on page 3: Added MSL note.
-Electrical spec table on page 6 under "Logic Input Current": Updated note reference.
-Electrical spec table on page 7 under "Shutdown Supply Current": Updated note reference.
-Electrical spec table on page 7 under "RECEIVER SWITCHING CHARACTERISTICS : Updated all the note
references.
-Updated POD P5.064 to new format: Moved dimensions from table onto drawing and added land pattern.
-Updated POD P6.064 to new format: Same dimensions, added land pattern and moved dimensions from table
onto drawing.
- Updated POD L8.2X3A to new format: Added recommended land pattern.
-Added revision history.
About Intersil
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address some of the largest markets within the industrial and infrastructure, mobile computing and high-end consumer markets.
For the most updated datasheet, application notes, related documentation and related parts, please see the respective product
information page found at www.intersil.com.
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Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time
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accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third
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13
FN6543.4
July 27, 2015
ISL3280E, ISL3281E, ISL3282E, ISL3283E, ISL3284E, ISL3285E
Package Outline Drawing
P5.064
5 LEAD SMALL OUTLINE TRANSISTOR PLASTIC PACKAGE
Rev 3, 4/11
8°
0°
3.00 3
2.80
(1.90)
5
0.22
0.08 5
4
3.00
2.60
1.70
1.50
3
2
(0.95)
SEE DETAIL X
0.50
0.30
0.20 (0.008) M C
TOP VIEW
END VIEW
0.25
0.10
0.10 MIN
1.30
0.90
1.45 SEATING
0.90 PLANE
C
GAUGE PLANE
SEATING
PLANE
4
0.55
0.35
C
0.15
0.00
0.10 (0.004) C
(0.60)
SIDE VIEW
8°
0°
(0.25)
DETAIL "X"
5x (0.60)
5x (1.2)
5
4
(2.4)
NOTES:
1. Dimensioning and tolerance per ASME Y14.5M-1994.
3
2. Package conforms to EIAJ SC-74 and JEDEC MO178AA.
3. Package length and width are exclusive of mold flash, protrusions,
or gate burrs.
4. Footlength measured at reference to gauge plane.
5. Lead thickness applies to the flat section of the lead between
0.08mm and 0.15mm from the lead tip.
(2x 0.95)
6. Controlling dimension: MILLIMETER.
Dimensions in ( ) for reference only.
(1.90)
TYPICAL RECOMMENDED LAND PATTERN
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14
FN6543.4
July 27, 2015
ISL3280E, ISL3281E, ISL3282E, ISL3283E, ISL3284E, ISL3285E
Package Outline Drawing
P6.064
6 LEAD SMALL OUTLINE TRANSISTOR PLASTIC PACKAGE
Rev 4, 2/10
0-8°
1.90
0.95
0.08-0.22
D
A
6
5
4
2.80
PIN 1
INDEX AREA
1.60 +0.15/-0.10
3
3
(0.60)
1
2
3
0.20 C
2x
0.40 ±0.10
B
SEE DETAIL X
3
0.20 M C A-B D
END VIEW
TOP VIEW
10° TYP
(2 PLCS)
2.90 ±0.10
3
1.15 +0.15/-0.25
C
0.10 C
SEATING PLANE
0.00-0.15
SIDE VIEW
(0.25)
GAUGE
PLANE
1.45 MAX
DETAIL "X"
0.45±0.1
4
(0.95)
(0.60)
(1.20)
(2.40)
NOTES:
1.
Dimensions are in millimeters.
Dimensions in ( ) for Reference Only.
2.
Dimensioning and tolerancing conform to ASME Y14.5M-1994.
3.
Dimension is exclusive of mold flash, protrusions or gate burrs.
4.
Foot length is measured at reference to guage plane.
5.
Package conforms to JEDEC MO-178AB.
TYPICAL RECOMMENDED LAND PATTERN
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15
FN6543.4
July 27, 2015
ISL3280E, ISL3281E, ISL3282E, ISL3283E, ISL3284E, ISL3285E
Package Outline Drawing
L8.2x3A
8 LEAD THIN DUAL FLAT NO-LEAD PLASTIC PACKAGE WITH E-PAD
Rev 2, 05/15
0.25
0.50
2.20
6
PIN 1
INDEX AREA
(4X)
6
PIN #1 INDEX AREA
B
3.00
A
1.80 +0.1/ -0.15
2.00
0.15
(8x0.40)
1.65 +0.1/ -0.15
TOP VIEW
BOTTOM VIEW
(8x0.25)
PACKAGE
OUTLINE
(6x0.50)
0.75
SEE DETAIL "X"
SIDE VIEW
1.80
3.00
0.05
(8x0.40)
1.65
C
0.20 REF
C
BASE PLANE
SEATING PLANE
0.08 C
5
(8x0.20)
0.05
2.00
TYPICAL RECOMMENDED LAND PATTERN
DETAIL "X"
NOTES:
1.
Dimensions are in millimeters.
Dimensions in ( ) for Reference Only.
2.
Dimensioning and tolerancing conform to ASME Y14.5m-1994.
3.
Unless otherwise specified, tolerance : Decimal ± 0.05
4.
Dimension b applies to the metallized terminal and is measured
between 0.20mm and 0.32mm from the terminal tip.
5.
Tiebar shown (if present) is a non-functional feature and may
be located on any of the 4 sides (or ends).
6.
The configuration of the pin #1 identifier is optional, but must be
located within the zone indicated. The pin #1 indentifier may be
either a mold or mark feature.
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16
FN6543.4
July 27, 2015
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