DATASHEET

ISL43485
®
Data Sheet
March 15, 2005
3.3V, Low Power, 30Mbps, RS-485/RS-422
Transceiver
The Intersil ISL43485 is a high speed BiCMOS 3.3V
powered, single transceiver that meets both the RS-485 and
RS-422 standards for balanced communication. Unlike
some competitive devices, this Intersil transceiver is
specified for 10% tolerance supplies (3V to 3.6V).
Data rates up to 30Mbps are achievable by using this
transceiver, which features higher slew rates.
Receiver (Rx) inputs feature a “fail-safe if open” design,
which ensures a logic high output if Rx inputs are floating,
and the ISL43485 presents a “single unit load” to the RS-485
bus, which allows up to 32 transceivers on the network.
Driver (Tx) outputs are short circuit protected, even for
voltages exceeding the power supply voltage. Additionally,
on-chip thermal shutdown circuitry disables the Tx outputs to
prevent damage if power dissipation becomes excessive.
• High Data Rate. . . . . . . . . . . . . . . . . . . . . . up to 30Mbps
• Operates from a Single +3.3V Supply (10% Tolerance)
• Interoperable with 5V Logic
• Single Unit Load Allows up to 32 Devices on the Bus
• Low Current Shutdown Mode. . . . . . . . . . . . . . . . . . 15nA
• Three State Rx and Tx Outputs
• 10ns Propagation Delay, 1ns Skew
• Half Duplex Pinout
• Current Limiting and Thermal Shutdown for driver
Overload Protection
• Pb-Free Available (RoHS Compliant)
Applications
• SCSI “Fast 20” Drivers and Receivers
• Factory Automation
• Data Loggers
ISL43485 (SOIC)
TOP VIEW
RO 1
Features
• -7V to +12V Common Mode Input Voltage Range
Logic inputs (e.g., DI and DE) accept signals in excess of
5.5V, making them compatible with 5V logic families.
Pinout
FN6071.1
• Security Networks
• Building Environmental Control Systems
8
VCC
RE 2
7
B/Z
• Industrial/Process Control Networks
DE 3
6
A/Y
• Level Translators
5
GND
Ordering Information
DI 4
R
D
PART NO.
(BRAND)
TEMP.
RANGE (°C)
PACKAGE
PKG.
DWG. #
ISL43485IB
(43485IB)
-40 to 85
8 Ld SOIC
M8.15
ISL43485IBZ
(43485IB) (Note)
-40 to 85
8 Ld SOIC (Pb-free)
M8.15
ISL43485IB-T
(43485IB)
-40 to 85
8 Ld SOIC
Tape and Reel
M8.15
ISL43485IBZ-T
(43485IB) (Note)
-40 to 85
8 Ld SOIC
M8.15
Tape and Reel (Pb-free)
NOTE: Intersil Pb-free products employ special Pb-free material sets;
molding compounds/die attach materials and 100% matte tin plate
termination finish, which are RoHS compliant and compatible with
both SnPb and Pb-free soldering operations. Intersil Pb-free products
are MSL classified at Pb-free peak reflow temperatures that meet or
exceed the Pb-free requirements of IPC/JEDEC J STD-020.
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2004, 2005. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
ISL43485
Truth Tables
TRANSMITTING
RECEIVING
INPUTS
OUTPUTS
INPUTS
OUTPUT
RE
DE
DI
Z
Y
RE
DE
A-B
RO
X
1
1
0
1
0
0
≥ +0.2V
1
X
1
0
1
0
0
0
≤ -0.2V
0
0
0
X
High-Z
High-Z
0
0
Inputs Open
1
1
0
X
High-Z *
High-Z *
1
0
X
High-Z *
1
1
X
High-Z
NOTE: *Shutdown Mode
NOTE: *Shutdown Mode
Pin Descriptions
PIN
FUNCTION
RO
Receiver output: If A > B by at least 0.2V, RO is high; If A < B by 0.2V or more, RO is low; RO = High if A and B are unconnected (floating).
RE
Receiver output enable. RO is enabled when RE is low; RO is high impedance when RE is high.
DE
Driver output enable. The driver outputs, Y and Z, are enabled by bringing DE high. They are high impedance when DE is low.
DI
Driver input. A low on DI forces output Y low and output Z high. Similarly, a high on DI forces output Y high and output Z low.
GND
Ground connection.
A/Y
Noninverting receiver input and noninverting driver output. Pin is an input if DE = 0; pin is an output if DE = 1.
B/Z
Inverting receiver input and inverting driver output. Pin is an input if DE = 0; pin is an output if DE = 1.
VCC
System power supply input (3V to 3.6V).
Typical Operating Circuit
ISL43485
+3.3V
+3.3V
+
8
0.1µF
0.1µF
+
8
VCC
1 RO
VCC
R
D
2 RE
B/Z
7
3 DE
A/Y
6
4 DI
RT
RT
7
B/Z
DE 3
6
A/Y
RE 2
R
D
GND
GND
5
5
2
DI 4
RO 1
FN6071.1
March 15, 2005
ISL43485
Absolute Maximum Ratings
Thermal Information
VCC to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7V
Input Voltages
DI, DE, RE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7V
Input/Output Voltages
A/Y, B/Z . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -8V to +12.5V
RO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to (VCC +0.5V)
Short Circuit Duration
Y, Z . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous
Thermal Resistance (Typical, Note 1)
θJA (°C/W)
8 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . .
170
Maximum Junction Temperature (Plastic Package) . . . . . . . . 150°C
Maximum Storage Temperature Range . . . . . . . . . . . -65°C to 150°C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300°C
(Lead Tips Only)
Operating Conditions
Temperature Range
ISL43485I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to 85°C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θJA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Electrical Specifications
Test Conditions: VCC = 3V to 3.6V; Unless Otherwise Specified. Typicals are at VCC = 3.3V, TA = 25°C,
Note 2
PARAMETER
TEMP
(°C)
MIN
TYP
MAX
UNITS
Full
-
-
VCC
V
RL = 100Ω (RS-422) (Figure 1A)
Full
2
2.7
-
V
RL = 54Ω (RS-485) (Figure 1A)
Full
1.5
2.3
VCC
V
RL = 60Ω, -7V ≤ VCM ≤ 12V (Figure 1B)
Full
1.5
2.6
-
V
∆VOD
RL = 54Ω or 100Ω (Figure 1A)
Full
-
0.01
0.2
V
VOC
RL = 54Ω or 100Ω (Figure 1A)
Full
-
1.8
3
V
∆VOC
RL = 54Ω or 100Ω (Figure 1A)
Full
-
0.01
0.2
V
SYMBOL
TEST CONDITIONS
DC CHARACTERISTICS
Driver Differential VOUT (no load)
VOD1
Driver Differential VOUT (with load)
VOD2
Change in Magnitude of Driver
Differential VOUT for
Complementary Output States
Driver Common-Mode VOUT
Change in Magnitude of Driver
Common-Mode VOUT for
Complementary Output States
Logic Input High Voltage
VIH
DE, DI, RE
Full
2
-
-
V
Logic Input Low Voltage
VIL
DE, DI, RE
Full
-
-
0.8
V
Logic Input Current
IIN1
DE, DI
Full
-2
-
2
µA
RE
Full
-25
-
25
µA
VIN = 12V
Full
-
0.6
1
mA
VIN = -7V
Full
-
-0.3
-0.8
mA
-7V ≤ VCM ≤ 12V
Full
-0.2
-
0.2
V
Input Current (A/Y, B/Z)
IIN2
Receiver Differential Threshold
Voltage
VTH
DE = 0V, VCC = 0V or 3.6V
Receiver Input Hysteresis
∆VTH
VCM = 0V
25
-
50
-
mV
Receiver Output High Voltage
VOH
IO = -4mA, VID = 200mV
Full
VCC 0.4
-
-
V
Receiver Output Low Voltage
VOL
IO = -4mA, VID = 200mV
Full
-
-
0.4
V
3
FN6071.1
March 15, 2005
ISL43485
Electrical Specifications
Test Conditions: VCC = 3V to 3.6V; Unless Otherwise Specified. Typicals are at VCC = 3.3V, TA = 25°C,
Note 2 (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
TEMP
(°C)
MIN
TYP
MAX
UNITS
Three-State (high impedance)
Receiver Output Current
IOZR
0.4V ≤ VO ≤ 2.4V
Full
-1
-
1
µA
Receiver Input Resistance
RIN
-7V ≤ VCM ≤ 12V
Full
12
19
-
kΩ
No-Load Supply Current (Note 3)
ICC
DI = 0V or VCC
DE = VCC,
RE = 0V
or VCC
Full
-
0.75
1.2
mA
DE = 0V,
RE = 0V
Full
-
0.65
1
mA
Shutdown Supply Current
ISHDN
DE = 0V, RE = VCC, DI = 0V or VCC
Full
-
15
100
nA
Driver Short-Circuit Current,
VO = High or Low
IOSD1
DE = VCC, -7V ≤ VY or VZ ≤ 12V (Note 4)
Full
-
-
250
mA
Receiver Short-Circuit Current
IOSR
0V ≤ VO ≤ VCC
Full
8
-
60
mA
(Figure 2A)
Full
30
50
-
Mbps
tDD
RDIFF = 60Ω, CL = 15pF (Figure 2A)
Full
3
10
25
ns
tR, tF
RDIFF = 60Ω, CL = 15pF (Figure 2A)
Full
3
6
12
ns
Full
6
10
22
ns
RL = 27Ω, CL = 15pF (Figure 2C)
Full
-
1
5
ns
DRIVER SWITCHING CHARACTERISTICS
Maximum Data Rate
fMAX
Driver Differential Output Delay
Driver Differential Rise or Fall Time
Driver Input to Output Delay
tPLH, tPHL RL = 27Ω, CL = 15pF (Figure 2C)
Driver Output Skew
tSKEW
Driver Enable to Output High
tZH
RL = 110Ω, CL = 50pF, SW = GND (Figure 3),
(Note 5)
Full
-
45
90
ns
Driver Enable to Output Low
tZL
RL = 110Ω, CL = 50pF, SW = VCC (Figure 3),
(Note 5)
Full
-
45
90
ns
Driver Disable from Output High
tHZ
RL = 110Ω, CL = 50pF, SW = GND (Figure 3)
Full
-
60
90
ns
Driver Disable from Output Low
tLZ
RL = 110Ω, CL = 50pF, SW = VCC (Figure 3)
Full
-
70
100
ns
Driver Enable from Shutdown to
Output High
tZH(SHDN) RL = 110Ω, CL = 50pF, SW = GND (Figure 3),
(Notes 7, 8)
Full
-
115
150
ns
Driver Enable from Shutdown to
Output Low
tZL(SHDN)
RL = 110Ω, CL = 50pF, SW = VCC (Figure 3),
(Notes 7, 8)
Full
-
115
150
ns
VID ≥ 1.5V with tr/tf = 10ns, RO tH & tL ≥ 60% tUI
(Figure 4)
Full
27
35
-
Mbps
Full
25
45
80
ns
(Figure 4)
Full
-
2
12
ns
RECEIVER SWITCHING CHARACTERISTICS
Maximum Data Rate
fMAX
Receiver Input to Output Delay
tPLH, tPHL (Figure 4)
Receiver Skew | tPLH - tPHL |
tSKD
Receiver Enable to Output High
tZH
RL = 1kΩ, CL = 15pF, SW = GND (Figure 5),
(Note 6)
Full
-
11
25
ns
Receiver Enable to Output Low
tZL
RL = 1kΩ, CL = 15pF, SW = VCC (Figure 5),
(Note 6)
Full
-
11
25
ns
Receiver Disable from Output High
tHZ
RL = 1kΩ, CL = 15pF, SW = GND (Figure 5)
Full
-
7
20
ns
Receiver Disable from Output Low
tLZ
RL = 1kΩ, CL = 15pF, SW = VCC (Figure 5)
Full
-
7
20
ns
4
FN6071.1
March 15, 2005
ISL43485
Electrical Specifications
Test Conditions: VCC = 3V to 3.6V; Unless Otherwise Specified. Typicals are at VCC = 3.3V, TA = 25°C,
Note 2 (Continued)
PARAMETER
SYMBOL
Time to Shutdown
tSHDN
TEST CONDITIONS
(Note 7)
TEMP
(°C)
MIN
TYP
MAX
UNITS
Full
80
190
300
ns
Receiver Enable from Shutdown to
Output High
tZH(SHDN) RL = 1kΩ, CL = 15pF, SW = GND (Figure 5),
(Notes 7, 9)
Full
-
240
400
ns
Receiver Enable from Shutdown to
Output Low
tZL(SHDN)
RL = 1kΩ, CL = 15pF, SW = VCC (Figure 5),
(Notes 7, 9)
Full
-
240
400
ns
NOTES:
2. All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to device ground unless
otherwise specified.
3. Supply current specification is valid for loaded drivers when DE = 0V.
4. Applies to peak current. See “Typical Performance Curves” for more information.
5. When testing this parameter, keep RE = 0 to prevent the device from entering SHDN.
6. When testing this parameter, the RE signal high time must be short enough (typically <100ns) to prevent the device from entering SHDN.
7. The ISL43485 is put into shutdown by bringing RE high and DE low. If the inputs are in this state for less than 80ns, the parts are guaranteed
not to enter shutdown. If the inputs are in this state for at least 300ns, the parts are guaranteed to have entered shutdown. See “Low-Power
Shutdown Mode” section.
8. Keep RE = VCC, and set the DE signal low time >300ns to ensure that the device enters SHDN.
9. Set the RE signal high time >300ns to ensure that the device enters SHDN.
Test Circuits and Waveforms
VCC
RL/2
DE
DI
VCC
Z
DI
VOD
D
375Ω
DE
Z
VOD
D
Y
Y
RL/2
FIGURE 1A. VOD AND VOC
VOC
RL = 60Ω
VCM
-7V TO +12V
375Ω
FIGURE 1B. VOD WITH COMMON MODE LOAD
FIGURE 1. DC DRIVER TEST CIRCUITS
5
FN6071.1
March 15, 2005
ISL43485
Test Circuits and Waveforms (Continued)
3V
CL = 15pF
DE
tr, tf = 4.5ns
3V
Z
DI
DI
1.5V
RDIFF = 60Ω
D
Y
1.5V
0V
CL = 15pF
tPLH
SIGNAL
GENERATOR
tPHL
VOH
50%
OUT (Y)
50%
VOL
FIGURE 2A. DIFFERENTIAL TEST CIRCUIT
tPLH
tPHL
VOH
OUT
3V
OUT (Z)
50%
50%
DE
VOL
Z
DI
RL = 27Ω
tDD
VOM
D
Y
DIFF OUT (Y - Z)
CL = 15pF
SIGNAL
GENERATOR
VOM =
VOH + VOL
2
50%
10%
tDD
90%
90%
tR
≈ 1.5V
+VOD
50%
10%
-VOD
tF
SKEW = |tPLH (Y or Z) - tPHL (Z OR Y)|
FIGURE 2C. SINGLE ENDED TEST CIRCUIT
FIGURE 2B. MEASUREMENT POINTS
FIGURE 2. DRIVER DATA RATE, PROPAGATION DELAY AND DIFFERENTIAL TRANSITION TIMES
DE
DI
Z
110Ω
VCC
D
SIGNAL
GENERATOR
SW
Y
GND
3V
CL = 50pF
DE
NOTE 7
1.5V
1.5V
0V
tZH, tZH(SHDN)
PARAMETER
OUTPUT
RE
DI
SW
tHZ
Y/Z
X
1/0
GND
tLZ
Y/Z
X
0/1
VCC
tZH
Y/Z
0 (Note 5)
1/0
GND
tZL
Y/Z
tZH(SHDN)
Y/Z
tZL(SHDN)
Y/Z
0 (Note 5)
0/1
1 (Note 8)
1/0
1 (Note 8)
0/1
FIGURE 3A. TEST CIRCUIT
VCC
GND
OUTPUT HIGH
NOTE 7
tHZ
VOH - 0.25V
50%
OUT (Y, Z)
VOH
0V
tZL, tZL(SHDN)
tLZ
NOTE 7
VCC
OUT (Y, Z)
50%
VOL + 0.25V V
OUTPUT LOW
VCC
OL
FIGURE 3B. MEASUREMENT POINTS
FIGURE 3. DRIVER ENABLE AND DISABLE TIMES
6
FN6071.1
March 15, 2005
ISL43485
Test Circuits and Waveforms (Continued)
RE
GND
+1.5V
3V
15pF
B
R
A
A
RO
1.5V
1.5V
0V
tPLH
tPHL
VCC
SIGNAL
GENERATOR
50%
RO
50%
0V
FIGURE 4A. TEST CIRCUIT
FIGURE 4B. MEASUREMENT POINTS
FIGURE 4. RECEIVER DATA RATE AND PROPAGATION DELAY
RE
GND
B
A
1kΩ
RO
R
VCC
SW
SIGNAL
GENERATOR
NOTE 7
GND
RE
15pF
3V
1.5V
1.5V
0V
PARAMETER
DE
A
SW
tHZ
0
+1.5V
GND
tLZ
0
-1.5V
VCC
tZH (Note 6)
0
+1.5V
GND
tZL (Note 6)
0
-1.5V
VCC
tZH(SHDN) (Note 9)
0
+1.5V
GND
tZL(SHDN) (Note 9)
0
-1.5V
tZH, tZH(SHDN)
NOTE 7
tHZ
VOH - 0.25V
1.5V
RO
VOH
0V
tZL, tZL(SHDN)
tLZ
NOTE 7
VCC
RO
1.5V
VOL + 0.25V V
OUTPUT LOW
VCC
FIGURE 5A. TEST CIRCUIT
OUTPUT HIGH
OL
FIGURE 5B. MEASUREMENT POINTS
FIGURE 5. RECEIVER ENABLE AND DISABLE TIMES
Application Information
Receiver Features
RS-485 and RS-422 are differential (balanced) data
transmission standards for use in long haul or noisy
environments. RS-422 is a subset of RS-485, so RS-485
transceivers are also RS-422 compliant. RS-422 is a pointto-multipoint (multidrop) standard, which allows only one
driver and up to 10 (assuming one unit load devices)
receivers on each bus. RS-485 is a true multipoint standard,
which allows up to 32 one unit load devices (any
combination of drivers and receivers) on each bus. To allow
for multipoint operation, the RS-485 spec requires that
drivers must handle bus contention without sustaining any
damage.
This device utilizes a differential input receiver for maximum
noise immunity and common mode rejection. Input
sensitivity is ±200mV, as required by the RS422 and RS-485
specifications.
Another important advantage of RS-485 is the extended
common mode range (CMR), which specifies that the driver
outputs and receiver inputs withstand signals that range from
+12V to -7V. RS-422 and RS-485 are intended for runs as
long as 4000’, so the wide CMR is necessary to handle
ground potential differences, as well as voltages induced in
the cable by external fields.
All the receivers include a “fail-safe if open” function that
guarantees a high level receiver output if the receiver inputs
are unconnected (floating).
7
Receiver input impedance surpasses the RS-422 spec of
4kΩ, and meets the RS-485 “Unit Load” requirement of 12kΩ
minimum.
Receiver inputs function with common mode voltages as
great as +9V/-7V outside the power supplies (i.e., +12V and
-7V), making them ideal for long networks where induced
voltages are a realistic concern.
The receiver easily meets the data rate supported by the
driver, and the receiver output is tri-statable via the active
low RE input.
FN6071.1
March 15, 2005
ISL43485
Driver Features
Built-In Driver Overload Protection
The RS-485, RS-422 driver is a differential output device
that delivers at least 1.5V across a 54Ω load (RS-485), and
at least 2V across a 100Ω load (RS-422) even with
VCC = 3V. The driver features low propagation delay skew to
maximize bit width, and to minimize EMI, and it is tri-statable
via the active high DE input.
As stated previously, the RS-485 spec requires that drivers
survive worst case bus contentions undamaged. The
ISL43485 meets this requirement via driver output short
circuit current limits, and on-chip thermal shutdown circuitry.
Outputs of the ISL43485 driver are not slew rate limited, so
faster output transition times allow data rates of at least
30Mbps.
Data Rate, Cables, and Terminations
Twisted pair is the cable of choice for RS-485, RS-422
networks. Twisted pair cables tend to pick up noise and
other electromagnetically induced voltages as common
mode signals, which are effectively rejected by the
differential receivers in this IC.
RS-485, RS-422 are intended for network lengths up to
4000’, but the maximum system data rate decreases as the
transmission length increases. Devices operating at 30Mbps
are often limited to lengths of less than one hundred feet.
Figure 6 details the ISL43485’s 30Mbps performance driving
200’ of “CAT5” cable terminated in 120Ω at both ends. Note
that the differential signal delivered to the receiver at the end
of the cable (A-B) still exceeds 1.5V peak. Longer cable
lengths are possible by reducing the data rate, as shown in
Figure 7 for a data rate of 20Mbps.
To minimize reflections, proper termination is imperative
when using this 30Mbps device. In point-to-point, or point-tomultipoint (single driver on bus) networks, the main cable
should be terminated in its characteristic impedance
(typically 120Ω) at the end farthest from the driver. In multireceiver applications, stubs connecting receivers to the main
cable should be kept as short as possible. Multipoint (multidriver) systems require that the main cable be terminated in
its characteristic impedance at both ends. Stubs connecting
a transceiver to the main cable should be kept as short as
possible.
8
The driver output stages incorporate short circuit current
limiting circuitry which ensures that the output current never
exceeds the RS-485 spec, even at the common mode
voltage range extremes. Additionally, it utilizes a foldback
circuit which reduces the short circuit current, and thus the
power dissipation, whenever the contending voltage
exceeds either supply.
In the event of a major short circuit condition, this device
also includes a thermal shutdown feature that disables the
drivers whenever the die temperature becomes excessive.
This eliminates the power dissipation, allowing the die to
cool. The drivers automatically reenable after the die
temperature drops about 15 degrees. If the contention
persists, the thermal shutdown/reenable cycle repeats until
the fault is cleared. Receivers stay operational during
thermal shutdown.
Low Power Shutdown Mode
This BiCMOS transceiver uses a fraction of the power
required by its bipolar counterparts, nevertheless, the
ISL43485 includes a shutdown feature that reduces the
already low quiescent ICC to a 15nA trickle. They enter
shutdown whenever the receiver and driver are
simultaneously disabled (RE = VCC and DE = GND) for a
period of at least 300ns. Disabling both the driver and the
receiver for less than 80ns guarantees that shutdown is not
entered.
Note that receiver and driver enable times increase when
these devices enable from shutdown. Refer to Notes 5-9, at
the end of the Electrical Specification table, for more
information.
FN6071.1
March 15, 2005
ISL43485
0
5
RO
0
DRIVER+CABLE DELAY
3
1.5
(~290ns)
A-B
0
-1.5
-3
DI = 20Mbps
5
0
5
RO
0
DRIVER+CABLE DELAY
3
1.5
A-B
-1.5
-3
TIME (20ns/DIV)
FIGURE 6. DRIVER AND RECEIVER WAVEFORMS DRIVING
200 FEET OF CAT5 CABLE (DOUBLE
TERMINATED WITH 120Ω)
FIGURE 7. DRIVER AND RECEIVER WAVEFORMS DRIVING
300 FEET OF CAT5 CABLE (DOUBLE
TERMINATED WITH 120Ω)
2.9
DIFFERENTIAL OUTPUT VOLTAGE (V)
110
DRIVER OUTPUT CURRENT (mA)
(~425ns)
0
TIME (20ns/DIV)
100
90
80
70
60
50
40
30
20
10
0
DRIVER INPUT (V)
5
RECEIVER OUTPUT (V)
DI = 30Mbps
DRIVER INPUT (V)
VCC = 3.3V, TA = 25°C; Unless Otherwise Specified
RECEIVER INPUT (V)
RECEIVER INPUT (V)
RECEIVER OUTPUT (V)
Typical Performance Curves
0
0.5
1
1.5
2
2.5
DIFFERENTIAL OUTPUT VOLTAGE (V)
3
2.8
RDIFF = 100Ω
2.7
2.6
2.5
2.4
2.3
RDIFF = 54Ω
2.2
2.1
2
-40
3.5
-25
0
25
50
75
85
TEMPERATURE (°C)
FIGURE 8. DRIVER OUTPUT CURRENT vs DIFFERENTIAL
OUTPUT VOLTAGE
FIGURE 9. DRIVER DIFFERENTIAL OUTPUT VOLTAGE vs
TEMPERATURE
160
800
140
120
750
80
60
40
ICC (µA)
OUTPUT CURRENT (mA)
ISL83483/85, DE = VCC, RE = X
Y OR Z = LOW
100
20
0
-20
700
Y OR Z = HIGH
-40
650
-60
ISL83483/85, DE = RE = GND; ISL83491, DE = X, RE = GND;
ISL83488/90
-80
-100
-120
-7 -6
-4
-2
0
2
4
6
OUTPUT VOLTAGE (V)
8
10
12
FIGURE 10. DRIVER OUTPUT CURRENT vs SHORT CIRCUIT
VOLTAGE
9
600
-40
-25
0
25
50
75
85
TEMPERATURE (°C)
FIGURE 11. SUPPLY CURRENT vs TEMPERATURE
FN6071.1
March 15, 2005
ISL43485
Typical Performance Curves
VCC = 3.3V, TA = 25°C; Unless Otherwise Specified (Continued)
16
4
RDIFF = 54Ω
3.5
RDIFF = 54Ω
FIGURE 2A
|tPHLY - tPLHZ|
tPLHZ
14
3
13
2.5
tPLHY
11
tPHLY
10
2
1.5
|CROSSING PT. OF Y↑ & Z↓ CROSSING PT. OF Y↓ & Z↑|
tPHLY
1
9
tPHLZ
8
-40
-25
0
25
50
0.5
-40
85
75
|tPLHY - tPHLZ|
-25
TEMPERATURE (°C)
0
5
RO
0
3
2.5
B/Z
2
1.5
1
RECEIVER OUTPUT (V)
DI
5
DRIVER INPUT (V)
RDIFF = 54Ω, CL = 15pF
A/Y
0.5
0
TIME (10ns/DIV)
FIGURE 14. DRIVER AND RECEIVER WAVEFORMS,
LOW TO HIGH
50
85
75
FIGURE 13. DRIVER SKEW vs TEMPERATURE
DRIVER OUTPUT (V)
DRIVER OUTPUT (V)
RECEIVER OUTPUT (V)
FIGURE 12. DRIVER PROPAGATION DELAY vs
TEMPERATURE
0
25
TEMPERATURE (°C)
RDIFF = 54Ω, CL = 15pF
DI
5
0
5
RO
0
DRIVER INPUT (V)
12
SKEW (ns)
PROPAGATION DELAY (ns)
15
3
2.5
2
A/Y
1.5
1
0.5
B/Z
0
TIME (10ns/DIV)
FIGURE 15. DRIVER AND RECEIVER WAVEFORMS,
HIGH TO LOW
Die Characteristics
SUBSTRATE POTENTIAL (POWERED UP):
GND
TRANSISTOR COUNT:
528
PROCESS:
Si Gate BiCMOS
10
FN6071.1
March 15, 2005
ISL43485
Small Outline Plastic Packages (SOIC)
M8.15 (JEDEC MS-012-AA ISSUE C)
8 LEAD NARROW BODY SMALL OUTLINE PLASTIC
PACKAGE
N
INDEX
AREA
0.25(0.010) M
H
INCHES
B M
E
SYMBOL
-B-
1
2
3
L
SEATING PLANE
-A-
h x 45o
A
D
µα
e
A1
B
0.25(0.010) M
C
0.10(0.004)
C A M
MIN
MAX
NOTES
0.0532
0.0688
1.35
1.75
-
0.0040
0.0098
0.10
0.25
-
B
0.013
0.020
0.33
0.51
9
C
0.0075
0.0098
0.19
0.25
-
D
0.1890
0.1968
4.80
5.00
3
E
0.1497
0.1574
3.80
4.00
4
0.050 BSC
1.27 BSC
-
H
0.2284
0.2440
5.80
6.20
-
h
0.0099
0.0196
0.25
0.50
5
L
0.016
0.050
0.40
1.27
6
8o
0o
α
NOTES:
MILLIMETERS
A
N
B S
MAX
A1
e
-C-
MIN
8
0o
8
7
8o
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
Rev. 0 12/93
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per
side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater
above the seating plane, shall not exceed a maximum value of
0.61mm (0.024 inch).
10. Controlling dimension: MILLIMETER. Converted inch dimensions
are not necessarily exact.
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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11
FN6071.1
March 15, 2005
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