ISL9200EVAL1 Application Note ® Application Note November 17, 2005 AN1218.0 Author: Chuck Wong Introduction Design Specification The ISL9200EVAL1 is the evaluation board for the ISL9200 double-fault tolerant charging system solution. The components for the entire solution are placed inside the white rectangular box (see Figure 1). The system mainly consists of the ISL6292C charging IC and the ISL9200 protection IC. The ISL6292C is an integrated Li-ion battery charger with the charge current set at 0.5A (refer to the ISL6292C datasheet for more information). The ISL9200 protects the charging system against three types of failures: The design specifications are given in Table 1. • Input overvoltage when the AC adapter fails to regulate its voltage under 6.5V; • Load overcurrent when failures such as a short circuit occurs in the charging system; • Battery over charge. When any single failure occurs in the charging system, the ISL6292C Output node will not output a voltage higher than 4.5V nor a current higher than the set current limit (1A for this board). As shown in Figure 1, the evaluation board has multiple test points for the convenience of evaluation. The upper half of the board contains connectors for the power connection. The lower half contains test points for easy access to various pins of the two ICs. This application note introduces the ISL9200EVAL1 evaluation board and the ISL9200 behavior based on the board. ISL9200EVAL1 Photo TABLE 1. DESIGN SPECIFICATIONS SPECIFICATION MIN TYP 6.5 6.8 7.0 V Overcurrent Protection Threshold - 1.0 - A Battery OVP Threshold - 4.4 4.5 V Input Voltage - - 30 V Charge Current - 0.5 - A 4.20 4.25 4.30 V Input OVP Threshold Charger Output Voltage MAX UNIT Schematic, Layout, and BOM The schematic, layout and the BOM for the evaluation board are shown in Figures 21, 22, and Table 2 respectively. Evaluation Waveforms This section introduce the waveforms captured using the ISL9200EVAL1 to verify the functionality of the ISL9200. Power-up There are two ways to power-up the evaluation board. One way is to connect an ac adapter or the power supply to the evaluation board and then turn on the power. The second way is to connect the supply to the evaluation board after the supply is powered up (hot insertion). Figure 2 shows the first way. Approximately 10ms after the input voltage rises to 5V, the ISL9200 begins the soft-start process. The 10ms delay allows any transient to settle down before the start-up, which is demonstrated during the hot insertion. The blue waveform is the load current into a 10Ω resistive load. Figure 3 shows the captured waveforms during the hot insertion of the power supply. The input overshoot caused by the resonance of the parasitic inductance of the supply cable and the ceramic input decoupling capacitor is clearly shown. Figure 4 shows the zoomed-in view of Figure 3 at the powerup moment. The transient is completed before the ISL9200 starts to turn on. FIGURE 1. PHOTO OF THE ISL9200EVAL1 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2005. All Rights Reserved. All other trademarks mentioned are the property of their respective owners. Application Note 1218 Evaluation Waveforms Input Overshoot VIN (1V/div) OUT (1V/div) VIN (2V/div) OUT (2V/div) Load Current (200mA/div) Time: 5ms/div FIGURE 2. CAPTURED WAVEFORMS FOR POWER-UP. THE OUTPUT IS LOADED WITH A 10Ω RESISTOR Load Current (500mA/div) Time: 10ms/div FIGURE 3. CAPTURED WAVEFORMS FOR HOT INSERTION OF THE POWER SUPPLY Time: 200ms/div Input Overshoot VIN (2V/div) VIN (2V/div) OUT (2V/div) Time: 20μs/div FIGURE 4. ZOOMED-IN VIEW OF FIGURE 3 WRN (5V/div) FIGURE 5. THE INPUT RISES GRADUALLY AND EXCEEDS THE INPUT OVP THRESHOLD VIN (2V/div) VIN (2V/div) OUT (2V/div) OUT (2V/div) WRN (5V/div) WRN (5V/div) Time: 5μs/div FIGURE 6. THE ZOOMED-IN VIEW OF FIGURE 5 2 Time: 5ms/div FIGURE 7. THE INPUT RISES GRADUALLY AND EXCEEDS THE INPUT OVP THRESHOLD AN1218.0 November 17, 2005 Application Note 1218 Evaluation Waveforms (Continued) VIN (2V/div) VIN (2V/div) OUT (2V/div) OUT (2V/div) ILIM (1V/div) WRN (5V/div) WRN (5V/div) Time: 500μs/div Time: 2μs/div FIGURE 8. THE INPUT RISES QUICKLY FROM 6.5V TO 10.5V FIGURE 9. TRANSIENT WAVEFORMS WHEN INPUT STEPS FROM 0V TO 9V Time: 100μs/div VIN (2V/div) VIN (2V/div) OUT (2V/div) OUT (2V/div) Time: 500μs/div VB (5V/div) VB (5V/div) WRN (5V/div) WRN (5V/div) FIGURE 10. NO REACTION TO THE 0V TO 5V VB-PIN VOLTAGE WHEN THE PULSE WIDTH IS LESS THAN THE BLANKING TIME Time: 20s/div VIN (1V/div) FIGURE 11. THE ISL9200 TURNS OFF THE OUTPUT WHEN VB VOLTAGE EXCEEDS 160μs Time: 200ms/div VIN (1V/div) VB (1V/div) OUT (1V/div) OUT (1V/div) Load Current (500mA/div) WRN (5V/div) WRN (5V/div) FIGURE 12. THE ISL9200 LATCHES OFF AFTER 16-COUNT OF BATTERY OVP 3 FIGURE 13. THE POWER-UP WAVEFORMS WHEN THE OUTPUT IS OVER-LOADED WITH A 3Ω RESISTOR AN1218.0 November 17, 2005 Application Note 1218 Evaluation Waveforms (Continued) Time: 10ms/div VIN (1V/div) Time: 200ms/div VIN (1V/div) OUT (1V/div) OUT (1V/div) Load Current (500mA/div) Load Current (500mA/div) WRN (5V/div) WRN (5V/div) FIGURE 14. THE ZOOMED-IN VIEW OF FIGURE 13 Time: 10ms/div VIN (1V/div) FIGURE 15. THE POWER-UP WAVEFORMS WHEN THE OUTPUT IS SHORT-CIRCUITED Time: 200μs/div VIN (1V/div) OUT (1V/div) Load Current (500mA/div) Load Current (500mA/div) OUT (1V/div) WRN (5V/div) WRN (5V/div) FIGURE 16. THE ZOOMED-IN VIEW OF FIGURE 15 FIGURE 17. THE ZOOMED-IN VIEW OF FIGURE 18 Time: 200ms/div Time: 200ms/div VIN (1V/div) VIN (1V/div) OUT (1V/div) Load Current (500mA/div) WRN (5V/div) FIGURE 18. THE 3Ω RESISTOR OVER LOAD OCCURS AFTER THE POWER IS ON 4 Load Current (2A/div) OUT (1V/div) WRN (5V/div) FIGURE 19. SHORT-CIRCUIT HAPPENS AFTER THE INPUT POWER IS UP AN1218.0 November 17, 2005 Application Note 1218 Evaluation Waveforms (Continued) VIN (1V/div) Load Current (2A/div) OUT (1V/div) Time: 10μs/div WRN (5V/div) FIGURE 20. THE ZOOMED-IN VIEW OF FIGURE 19 Input Over-Voltage Protection (OVP) The ISL9200 turns off the internal power FET when the input voltage exceeds the input OVP threshold to protect other electronics in the system. Figure 5 shows the action when the input is exceeding the OVP threshold gradually. The output voltage falls to ground after and the WRN logic signal turns to low. Figure 6 is a zoomed-in view to show more details during the transition. The ISL9200 was conducting 0.5A before the protection is triggered. When the OVP is triggered, the input voltage signal has a ringing due the parasitic cable inductance. The OVP threshold typically has a 100mV hysteresis. The WRN signal has a narrow pulse after the OVP because the ringing of the input voltage signal exceeds the hysteresis during the first cycle. Figure 7 shows the waveforms when the input voltage drops below the falling threshold for the input OVP. The WRN signal rises immediately to show the removal of the input overvoltage situation but the output rises after the 10ms delay. When the input voltage exceeds the OVP threshold, the internal power FET is turned off within 1μs. Figure 8 shows the behavior when the input voltage rises quickly from 6.5V to 10.5V. The time scale is 2μs/div and the reaction time is well within 1μs. When a power supply that is already failed (unable to regulate the output below 6.5V) is used to power-up the ISL9200, the high input voltage will not show up at the ISL9200 output at all. Figure 9 illustrates such case. A 9V supply is used to power-up. The ISL9200 starts to operate once the input voltage exceeds the POR threshold, as indicated by the ILIM and the WRN pin voltages, but the internal power FET does not start to turn on before the end of the 10ms delay. Since the input voltage rises above the OVP threshold within 10ms, the OVP is issued before the soft-start process. The failed supply voltage will never show up at the OUT pin in this case. 5 Battery Overvoltage Protection The battery OVP function is to prevent over-charge of the Liion battery. The typical protection threshold is 4.4V. There is a blanking time of approximately 160μs to prevent triggering of the battery OVP by a transient voltage. Only when the battery voltage exceeds the threshold for longer than the blanking time, will the OVP be triggered. The ISL9200 also has a 4-bit binary counter to count the battery OVP event. The internal power FET will be permanently latched off if the battery OVP event exceeds 16 counts. Then IC can then be reset only by cycling the input power or the enable input pin. Figure 10 to Figure 12 illustrate the battery OVP behavior. Figure 10 shows the captured waveforms when the VB-pin voltage pulses between 0V and 5V but the pulse width is less than the blanking time. The ISL9200 does not react to the VB-pin overvoltage in this case. Figure 11 shows the case that the pulse width barely exceeds the blanking time. The battery OVP is triggered, as indicated by the falling voltage on the OUT pin. A very narrow pulse can be found at the falling edge of the VB pulse. Figure 12 illustrates the latch off of the ISL9200 after 16-count of the battery OVP events. The VB pin voltage changes between 4.3V to 4.5V for 20 times but the IC does not react to the VB voltage after 16 counts. Overcurrent Protection (OCP) The ISL9200EVAL1 sets the overcurrent protection threshold at 1A. When the current in the internal power FET exceeds 1A, the power FET is turned off. The ISL9200 tries to soft-start again after approximately 60ms. Same as the battery OVP event, an internal 4-bit binary counter sets the limit of 16 counts for the OCP event before latching off. The OCP also has a blanking time to prevent any transient current from triggering the protection. The behavior of the ISL9200 is slightly different between the cases that the output is over-loaded before and after the input power is up. When the over-load exists before the input AN1218.0 November 17, 2005 Application Note 1218 power is up, the over load will be detected during the softstart. The gate voltage of the internal power FET is controlled near the gate threshold voltage during the soft start; hence the FET current is controlled and is not capable to rise very fast. If the load current stays above the OCP threshold for longer than the blanking time, the power FET is turned off. Figure 13 to Figure 16 show the captured waveforms during the power-up. The output is over loaded with a 3Ω resistor and a hard short-circuit respectively. Both cases the ISL9200 is latched off after 16 attempts of soft start. The zoomed-in views show the difference in the output voltage, one rises proportionally to the current and the other one shorted to ground all the time. For both cases, the peak load current is only slightly higher than the 1A limit. and Figure 16. The high current when a hard short-circuit is happening after the power is up does not flow through the battery so is not a hazardous condition to the Li-ion battery. Summary This application note introduced the schematics, layout, and BOM of the ISL9200EVAL1 evaluation board for the ISL9200. Captured scope waveforms during power-up, input OVP, battery OVP and output OCP cases are shown to demonstrate the robustness of the ISL9200. The FMEA document for the charging system using the two chips of this evaluation board will be available upon request to further prove the safety of the ISL9200 solution. If the input power is already on, the internal power FET is fully turned on and the gate voltage has passed the gate threshold voltage. When an over load case occurs, there is a delay for the gate voltage to move to the gate threshold voltage. Before reaching the gate threshold voltage, the power FET remains fully on, hence the current in the FET is totally dependent on the conditions outside the ISL9200. Figure 18 illustrates the behavior that the output is loaded with a 3Ω resistor after the power is on. The ISL9200 still latches off after 16 count of OCP. After every OCP, the IC starts softly, hence the waveforms are same as those in Figure 14. The only difference happens during the first OCP event. Figure 17 shows the zoomed-in view of the first OCP event. The current rises to the level limited by the 3Ω resistor and other parasitics. Note that the input voltage stays above the POR threshold since this case represents a minor overcurrent situation. When a hard short-circuit event happens after the power is up, the overcurrent during the initial pulse is more severe. Figure 19 illustrate the case that the output is short-circuited after the IC is powered up. Note that the current waveform has 17 pulses with the first pulse very close to the second one on the time scale but the magnitude is significantly higher than the second and the rest. The current scale is changed to 2A/div in order to see the magnitude of the first pulse. Figure 20 shows the zoomed-in view of the first pulse. For the same reason, the power FET is fully turned on when the short-circuit occurs and the current is totally depended on the conditions outside the ISL9200. Since the output is a short circuit, the current is totally dependent on the parasitics. The current is Figure 20 shoots up more than 4A. Note that the input voltage is pulled under the POR threshold due to the high current; hence the IC is actually reset during the first pulse. That is the explanation why there are 17 current pulses in this case. Once the initial overcurrent event is finished, the ISL9200 begins the soft-start process. The rest of the waveforms are the same as the ones in Figure 15 6 AN1218.0 November 17, 2005 Application Note 1218 FIGURE 21. SCHEMATICS FOR THE EVALUATION BOARD (B) TOP LAYER (A) SILK SCREEN LAYER (C) BOTTOM LAYER FIGURE 22. LAYOUT FOR THE EVALUATION BOARD 7 AN1218.0 November 17, 2005 Application Note 1218 TABLE 2. BILL-OF-MATERIAL FOR THE ISL9200 EVALUATION BOARD ITEM # QTY REFERENCE 1 1 C1 2 5 3 PART # PACKAGE VENDOR 1µF, 16V, X5R PCC2224CT-ND 0603 Digikey C2, C4, C5, C7, C8 1µF, 6.3V, X5R PCC1915CT-ND 0603 Digikey 1 C3 22nF, 16V, X7R PCC1754CT-ND 0603 Digikey 4 1 C6 4.7µF, 16V, X5R PCC2323CT-ND 0805 Digikey 5 3 R1, R5, R7 10k, 1% P10.0KHCT-ND 0603 Digikey 6 1 R2 25.5k, 1% 311-25.5KHCT-ND 0603 Digikey 7 1 R3 470Ω, 5% 311-470HCT-ND 0603 Digikey 8 1 R4 200k, 1% 311-200KHCT-ND 0603 Digikey 9 1 R6 160k, 1% 311-160KHCT-ND 0603 Digikey 10 1 D1 Red LED 67-1552-1-ND 0805 Digikey 11 1 J1 Jumper A19423-ND Digikey 12 1 Shunt S9001-ND Digikey 13 4 Test Points - Black 5011K-ND Digikey 14 6 ISL6292C OUTPUT(2), Test Points - Red VIN(2), VCC, ISL9200 OUT 5010K-ND Digikey 15 7 WRN, ILIM, EN, VB, FAULT, Test Points - Yellow EN, STATUS 5014K-ND Digikey 16 1 U1 Charging System Protection IC 17 1 U2 Li-ion Battery Charger GND(4) DESCRIPTION ISL9200 4X3 DFN Intersil ISL6292C 3X3 DFN Intersil NOTE: Do not populate C6, C7, and C8. All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 8 AN1218.0 November 17, 2005