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8XZ-T
RECOM ISL9211BIRU5
ISL9211
January 13, 2009
Charging System Safety Circuit
Features
The ISL9211 is an integrated circuit (IC) optimized to provide
a redundant safety protection to a Li-ion battery charging
system. The IC monitors the input voltage, the battery
voltage, and the charge current. When any of the three
parameters exceeds its limit, the IC turns off an internal
N-channel MOSFET to remove the power from the charging
system to the battery. In addition to the above protected
parameters, the IC also monitors its own internal
temperature and turns off the N-channel MOSFET when the
temperature exceeds +150°C. Together with the battery
charger IC and the protection module in a battery pack, the
charging system using the ISL9211 has triple-level
protection and is two-fault tolerant.
• 24V Max Input Voltage
The IC is designed to turn on the internal NFET slowly to
avoid inrush current at power up but will turn off the NFET
quickly when the input is overvoltage in order to remove the
power before any damage occurs. The ISL9211 has a logic
flag output to indicate a fault condition.
• Pb-Free (RoHS Compliant)
Typical Application Circuit
• PDAs and Smart Phones
INPUT
VIN
C2
ISL6292
BATTERY
CHARGER
VB
GND
FAULT
• Fully Integrated Protection Circuit for Three Protected
Variables
• High Accuracy Protection Thresholds
• User Programmable Overcurrent Protection Threshold
• Responds To Input Overvoltage in Less Than 1µs
• High Immunity of False Triggering Under Transients
• Fault Indication for Various Fault Occurrence
• Easy to Use
Applications
• Cell Phones
• Digital Still Cameras
• Technical Brief TB363 “Guidelines for Handling and
Processing Moisture Sensitive Surface Mount Devices
(SMDs)”
RVB
RILIM
• Desktop Chargers
Related Literature
ISL9211
ILIM
• Supports Up To 1.5A Input Current
• Portable Instruments
OUT
C1
FN6658.4
BATTERY
PACK
• Technical Brief TB379 “Thermal Characterization of
Packaged Semiconductor Devices”
• Technical Brief TB389 “PCB Land Pattern Design and
Surface Mount Guidelines for QFN Packages”
Ordering Information
PART NUMBER
PART
MARKING
Pinout
TEMP
RANGE
(°C)
ISL9211IRU58XZ-T* 15X
-40 to +85 8 Ld µTDFN L8.2x2
ISL9211IRU68XZ-T* 16X
-40 to +85 8 Ld µTDFN L8.2x2
*Please refer to TB347 for details on reel specifications.
NOTE: These Intersil Pb-free plastic packaged products employ
special Pb-free material sets; molding compounds/die attach
materials and NiPdAu plate - e4 termination finish, which is RoHS
compliant and compatible with both SnPb and Pb-free soldering
operations. Intersil Pb-free products are MSL classified at Pb-free
peak reflow temperatures that meet or exceed the Pb-free
requirements of IPC/JEDEC J STD-020.
1
ISL9211
(8 LD 2x2 ΜTDFN)
TOP VIEW
PACKAGE PKG.
(Pb-Free) DWG. #
VIN
1
8
OUT
GND
2
7
ILIM
NC
3
6
VB
FAULT
4
5
GND
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas LLC 2008, 2009, 2015. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
ISL9211
Absolute Maximum Ratings
Thermal Information
Supply Voltage (VIN) . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 26V
Output and VB Pin (OUT, VB) (Note 1) . . . . . . . . . . . . . . -0.3V to 8V
Other Pins (ILIM, FAULT). . . . . . . . . . . . . . . . . . . . . . . -0.3V to 5.5V
Thermal Resistance (Typical, Note 2)
JA (°C/W)
8 Ld 2x2 µTDFN Package . . . . . . . . . .
120
Maximum Junction Temperature (Plastic Package) . . . . . . . +150°C
Maximum Storage Temperature Range . . . . . . . . . .-65°C to +150°C
Pb-Free Reflow Profile. . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Recommended Operating Conditions
Ambient Temperature Range . . . . . . . . . . . . . . . . . . .-40°C to +85°C
Supply Voltage, VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.3V to 24V
Operating Current Range. . . . . . . . . . . . . . . . . . . . . . . . . 0A to 1.5A
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTES:
1. The maximum voltage rating for the VB pin under continuous operating conditions is 5.5V. All other pins are allowed to operate continuously at
the absolute maximum ratings.
2. JA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See
Tech Brief TB379.
Electrical Specifications
Typical values are tested at VIN = 5V and +25°C Ambient Temperature, maximum and minimum values are
established over the recommended operating conditions; Parameters with MIN and/or MAX limits are 100%
tested at +25°C, unless otherwise specified. Temperature limits established by characterization and are not
production tested.
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Rising
-
-
2.47
V
Falling
POWER-ON RESET
Rising VIN Threshold
VPOR
VIN Bias Current
2.20
-
-
V
IVIN
RILIM = 24.9k
-
-
1000
µA
VOVP
ISL9211IRU58
5.6
5.8
6.0
V
ISL9211IRU68
6.6
6.8
6.95
V
ISL9211IRU58
5.55
-
-
V
ISL9211IRU68
6.55
-
-
V
-
-
1
µs
PROTECTIONS
Input Overvoltage Protection
Input OVP Falling Threshold
Input OVP Response Time (Note 3)
Overcurrent Protection
IOCP
0.93
1.0
1.07
A
Overcurrent Protection Blanking Time
BTOCP
VVB = 3V, RILIM = 24.9k
-
180
-
µs
Battery Overvoltage Protection Threshold
VBOVP
4.25
4.34
4.40
V
-
30
50
mV
-
180
-
µs
-
-
20
nA
Over-Temperature Protection Rising Threshold
-
150
-
°C
Over-Temperature Protection Falling Threshold
-
110
-
°C
-
0.4
0.8
V
-
-
1.5
µA
-
170
280
m
Battery OVP Threshold Hysteresis
Battery OVP Blanking Time
BTBOVP
VVB = 4.34V
VB Pin Leakage Current
LOGIC
FAULT Output Logic Low
Sink 5mA current
FAULT Output Logic High Leakage Current
POWER MOSFET
On-Resistance (Note 3)
rDS(ON)
Measured at 200mA
NOTE:
3. Limits should be considered typical and are not production tested.
2
FN6658.4
January 13, 2009
ISL9211
Pin Descriptions
Typical Application
VIN (Pin 1)
The input power source. The VIN can withstand 24V input.
VIN
INPUT
OUT
ISL6292
BATTERY
CHARGER
GND (Pins 2, 5)
C1
System ground reference.
C2
NC (Pin 3)
ISL9211
No connection and must be left floating.
VB
ILIM
RVB
FAULT (Pin 4)
RILIM
FAULT is an open-drain logic output that turns LOW when
any protection event occurs.
FAULT
GND
BATTERY
PACK
VB (Pin 6)
Battery voltage monitoring input. This pin is connected to the
battery pack positive terminal via an isolation resistor.
PART
ILIM (Pin 7)
Overcurrent protection threshold setting pin. Connect a
resistor between this pin and GND to set the OCP threshold.
RILIM
24.9k
RVB
200k to 1M
C1, C2
OUT (Pin 8)
DESCRIPTION
1µF/25V X5R ceramic capacitor
Output pin.
Block Diagram
OUT
VIN
INPUT
ISL6292
BATTERY
CHARGER
Q1
Q2
POR
PRE-REG
REF
FET
DRIVER
R1
LOGIC
1.2V
RILIM
CP2
EA
VB
CP3
RVB
R3
Q4
FAULT
ILIM
0.8V
CP1
R2
Q3
R4
GND
FIGURE 1. BLOCK DIAGRAM
3
FN6658.4
January 13, 2009
ISL9211
Typical Operating Performance
The test conditions for the Typical Operating Performance are: VIN = 5V, TA = +25°C,
RILIM = 24.9k, RVB = 200k, Unless Otherwise Noted.
VIN(2V/div)
VIN(2V/div)
OUT(2V/div)
OUT(2V/div)
Load Current(200mA/div)
Fault(5V/div)
TIME - 4ms/div
FIGURE 2. CAPTURED WAVEFORMS FOR POWER-UP. THE
OUTPUT IS LOADED WITH A 10 RESISTOR
VIN(2V/div)
OUT(2V/div)
Fault(5V/div)
TIME - 2s/div
FIGURE 4. CAPTURED WAVEFORMS WHEN THE INPUT
GRADUALLY RISES TO THE INPUT
OVERVOLTAGE THRESHOLD
TIME - 20µs/div
FIGURE 3. CAPTURED WAVEFORMS WHEN THE INPUT
VOLTAGE STEPS FROM 5.5V TO 9.5V
VIN(2V/div)
OUT(2V/div)
Fault(5V/div)
TIME - 4ms/div
FIGURE 5. TRANSIENT WHEN THE INPUT VOLTAGE STEPS
FROM 6.5V TO 5.5V
VIN(1V/div)
VIN(5V/div)
VB(1V/div)
OUT(2V/div)
Fault(2V/div)
TIME - 40µs/div
FIGURE 6. TRANSIENT WAVEFORMS WHEN INPUT STEPS
FROM ZERO TO 9V
4
OUT(1V/div)
Fault(2V/div)
TIME - 20s/div
FIGURE 7. BATTERY OVERVOLTAGE PROTECTION. THE IC
IS LATCHED OFF AFTER 16 COUNTS OF
PROTECTION. VB VOLTAGE VARIES BETWEEN
4.3V TO 4.5V
FN6658.4
January 13, 2009
ISL9211
Typical Operating Performance
The test conditions for the Typical Operating Performance are: VIN = 5V, TA = +25°C,
RILIM = 24.9k, RVB = 200k, Unless Otherwise Noted. (Continued)
VIN(2V/div)
VIN(2V/div)
Load Current(500mA/div)
Load Current(500mA/div)
OUT(2V/div)
OUT(2V/div)
Fault(2V/div)
Fault(2V/div)
TIME - 1ms/div
TIME - 40ms/div
FIGURE 9. ZOOMED-IN VIEW OF FIGURE 8
FIGURE 8. POWER-UP WAVEFORMS WHEN OUTPUT IS
SHORT-CIRCUITED
5.85
2.52
2.48
5.80
RISING THRESHOLD
RISING THRESHOLD
2.40
VOVP (V)
VPOR (V)
2.44
2.36
FALLING THRESHOLD
2.32
2.28
5.75
FALLING THRESHOLD
5.70
5.65
2.24
2.20
-50
-30
-10
10
30
50
70
5.60
-50
90
-30
-10
TEMPERATURE (°C)
ILIM PIN VOLTAGE (V)
OVERCURRENT PROTECTION (A)
1.00
0.99
0.98
3.0V
0.984
0.982
0.980
0.978
0.976
0.974
0.96
0.95
-50
90
0.986
1.01
0.97
70
0.988
4.3V
1.02
50
FIGURE 11. INPUT OVERVOTLAGE PROTECTION vs
TEMPERATURE
5.0V
1.03
30
TEMPERATURE (°C)
FIGURE 10. VPOR vs TEMPERATURE
1.04
10
-30
-10
10
30
50
70
90
110 130
TEMPERATURE (°C)
FIGURE 12. OVERCURRENT PROTECTION vs
TEMPERATURE AT VARIOUS INPUT VOLTAGES
5
0.972
-50
-30
-10
10
30
50
70
90
110 130
TEMPERATURE (°C)
FIGURE 13. ILIM PIN VOLTAGE vs TEMPERATURE
FN6658.4
January 13, 2009
ISL9211
Typical Operating Performance
The test conditions for the Typical Operating Performance are: VIN = 5V, TA = +25°C,
RILIM = 24.9k, RVB = 200k, Unless Otherwise Noted. (Continued)
350
3.0V
300
4.3V
rDS(ON) (m)
250
200
150
5.0V
100
50
0
-50
-30
-10
10
30
50
70
90
110
130
TEMPERATURE (°C)
FIGURE 14. ON-RESISTANCE vs TEMPERATURE AT DIFFERENT INPUT VOLTAGES
Theory of Operation
The ISL9211 is an integrated circuit (IC) optimized to provide
a redundant safety protection to a Li-ion battery from
charging system failures. The IC monitors the input voltage,
the battery voltage, and the charge current. When any of the
above three parameters exceeds its limit, the IC turns off an
internal N-channel MOSFET to remove the power from the
charging system. In addition to the above protected
parameters, the IC also monitors its own internal
temperature and turns off the N-channel MOSFET when the
temperature exceeds +150°C. Together with the battery
charger IC and the protection module in a battery pack, the
charging system has triple-level protection from
overcharging the Li-ion battery and is two-fault tolerant. The
ISL9211 protects up to 26V input voltage.
Power-Up
The ISL9211 has a power-on reset (POR) threshold of
2.47V (max). Before the input voltage reaches the POR
threshold, the internal power NFET is off. Approximately
10ms after the input voltage exceeds the POR threshold, the
IC resets itself and begins the soft-start. The 10ms delay
allows any transients at the input during a hot insertion of the
power supply to settle down before the IC starts to operate.
The soft-start slowly turns on the power NFET to reduce the
inrush current as well as the input voltage drop during the
transition. The power-up sequence is illustrated in Figure 2.
Input Overvoltage Protection (OVP)
The input voltage is monitored by the comparator CP1 in the
Block Diagram (Figure 1). CP1 has an accurate reference of
1.2V from the bandgap reference. The OVP threshold is set
by the resistive divider consisting of R1 and R2. When the
input voltage exceeds the threshold, the CP1 outputs a logic
signal to turn off the power NFET within 1µs (see Figure 3) to
prevent the high input voltage from damaging the electronics
in the handheld system. The hysteresis for the input OVP
threshold is given in the “Electrical Specifications” table on
6
page 2. When the input overvoltage condition is removed,
the ISL9211 re-enables the output by running through the
soft-start, as shown in Figure 5. Because of the 10ms
second delay before the soft-start, the output is never
enabled if the input rises above the OVP threshold quickly,
as shown in Figure 6.
Battery Overvoltage Protection
The battery voltage OVP is realized with the VB pin. The
comparator CP3, as shown in Figure 1, monitors the VB pin
and issues an overvoltage signal when the battery voltage
exceeds the 4.34V battery OVP threshold. The threshold
has 30mV built-in hysteresis. The comparator CP3 has a
built-in 180µs blanking time to prevent any transient voltage
from triggering the OVP. If the OVP situation still exists after
the blanking time, the power NFET is turned off. The control
logic contains a 4-bit binary counter that if the battery
overvoltage event occurs 16x, the power NFET is turned off
permanently, as shown in Figure 7. Recycling the input
power will reset the counter and restart the ISL9211.
The resistor between the VB pin and the battery, RVB, as
shown in the “Typical Application Circuit” on page 1, is an
important component. This resistor provides a current limit in
case the VB pin is shorted to the input voltage under a failure
mode. The VB pin leakage current under normal operation is
negligible to allow a resistance of 200k to 1M be used.
Overcurrent Protection (OCP)
The current in the power NFET is limited to prevent charging
the battery with an excessive current. The current is sensed
using the voltage drop across the power FET after it is
turned on. The reference of the OCP is generated using a
sensing FET Q2 (Mirror to Q1), as shown in Figure 1. The
current in the sensing FET is forced to match the value
programmed by the ILIM pin. The size of the power FET Q1
is 31,250x the size of the sensing FET. Therefore, when the
current in the power FET is 31,250x the current in the
sensing FET, the drain voltage of the power FET falls below
FN6658.4
January 13, 2009
ISL9211
The OCP threshold can be calculated using Equation 1:
0.8V
25000
I LIM = ---------------  31250 = ---------------R ILIM
R ILIM
(EQ. 1)
where the 0.8V is the regulated voltage at the ILIM pin. The
OCP comparator CP2 has a built-in 170µs delay to prevent
false triggering by transient signals. The OCP function also
has a 4-bit binary counter that accumulates during an OCP
event. When the total count reaches 8, the power NFET is
turned off permanently until the input power is recycled or
the enable pin is toggled. Figures 8 and 9 illustrate the
waveforms during the power-up when the output is shorted
to ground.
Internal Over-Temperature Protection
The ISL9211 monitors its own internal temperature to
prevent thermal failures. When the internal temperature
reaches +150°C, the IC turns off the N-channel power
MOSFET. The IC does not resume operation until the
internal temperature drops below +110°C.
Fault Indication Output
The FAULT pin is an open-drain output that indicates a LOW
signal when any of the three fault events happens. This
provides a signal to the microprocessor to take further action
to enhance the safety of the charging system.
Applications Information
The ISL9211 is designed to meet the “Lithium-Safe” criteria
when operating together with a qualified Li-ion battery
charger. The “Lithium-Safe” criteria requires the charger
output to fall within the green region shown in Figure 15
under normal operating conditions and NOT to fall in the red
region when there is a single fault in the charging system.
Taking into account the safety circuit in a Li-ion battery pack,
the charging system is allowed to have two faults without
creating hazardous conditions for the battery cell. The output
of the Li-ion charger, such as the ISL6292, ISL6292C, has a
typical I-V curve shown with the blue lines under normal
operation, which is within the green region. The function of
the ISL9211 is to add a redundant protection layer such that,
under any single fault condition, the charging system output
does not exceed the I-V limits shown with the red lines. As a
result, the charging system adopting the ISL9211 and the
ISL6292, ISL6292C chip set can easily pass the “LithiumSafe” criteria test procedures.
The ISL9211 is a simple device that requires only three
external components, in addition to the ISL6292 charger
circuit, to meet the “Lithium-Safe” criteria, as shown in the
“Typical Application Circuit” on page 1. The selection of the
current limit resistor RILIM is given in “Overcurrent Protection
(OCP)” on page 6.
7
RVB Selection
The RVB prevents a large current from the VB pin to the
battery terminal, in case the ISL9211 fails. The
recommended value should be between 200k to 1M.
With 200k resistance, the worst case current flowing from
the VB pin to the charger output is shown in Equation 2,
assuming the VB pin voltage is 24V under a failure mode
and the battery voltage is 4.2V.
 24V – 4.2V    200k  = 99A
(EQ. 2)
Such a small current can be easily absorbed by the bias
current of other components in the handheld system.
Increasing the RVB value reduces the worst case current,
but at the same time increases the error for the 4.34V
battery OVP threshold.
The error of the battery OVP threshold is the original
accuracy at the VB pin given in the “Electrical Specifications”
table on page 2 plus the voltage built across the RVB by the
VB pin leakage current. The VB pin leakage current is less
than 20nA, as given in the “Electrical Specifications” table.
With the 200k resistor, the worst-case additional error is
4mV and with a 1M resistor, the worst-case additional error
is 20mV.
1000
ISL9211
LIMITS
CHARGE CURRENT (mA)
that of the sensing FET. The comparator CP2 then outputs a
signal to turn off the power FET.
ISL6292C
LIMITS
0
1
2
3
4
5
6
BATTERY VOLTAGE (V)
FIGURE 15. LITHIUM-SAFE OPERATING REGIONS
Capacitor Selection
The input capacitor (C1 in the “Typical Application Circuit” on
page 1) is for decoupling. Higher value reduces the voltage
drop or the overshoot during transients.
Two scenarios can cause the input voltage overshoot. The
first one is when the AC adapter is inserted live (hot
insertion) and the second one is when the current in the
power NFET of the ISL9211 has a step-down change.
Figure 16 shows an equivalent circuit for the ISL9211 input.
The cable between the AC/DC converter output and the
handheld system input has a parasitic inductor. The parasitic
resistor is the lumped sum of various components, such as
the cable, the adapter output capacitor ESR, the connector
contact resistance, and so on.
FN6658.4
January 13, 2009
ISL9211
C1
L
R
AC/DC
ADAPTER
C2
ISL9211
CABLE
HANDHELD SYSTEM
FIGURE 16. EQUIVALENT CIRCUIT FOR THE ISL9211 INPUT
During the load current step-down transient, the energy
stored in the parasitic inductor is used to charge the input
decoupling capacitor C2. The ISL9211 is designed to turn off
the power NFET slowly during the OCP and the battery OVP
event. Because of such design, the input overshoot during
those events is not significant. During an input OVP,
however, the NFET is turned in less than 1µs and can lead to
significant overshoot. Higher capacitance reduces the
overshoot.
The overshoot caused by a hot insertion is not very
dependent on the decoupling capacitance value. Especially
when ceramic type capacitors are used for decoupling. In
theory, the over-shoot can rise up to twice of the DC output
voltage of the AC adapter. The actual peak voltage is
dependent on the damping factor that is mainly determined
by the parasitic resistance (R in Figure 16).
In practice, the input decoupling capacitor is recommended
to use a 25V, X5R dielectric ceramic capacitor with a value
between 0.1µF to 1µF.
The output of the ISL9211 and the input of the charging
circuit typically share one decoupling capacitor. The
selection of that capacitor is mainly determined by the
requirement of the charging circuit. When using the ISL6292
family chargers, a 1µF, 6.3V, X5R capacitor is
recommended.
Layout Recommendation
The ISL9211 uses a 2x2 DFN package. Use some copper on
the component layer if possible to improve the thermal
performance if possible.
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9001 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
8
FN6658.4
January 13, 2009
ISL9211
Package Outline Drawing
L8.2x2
8 Lead Ultra Thin Dual Flat No-Lead COL Plastic Package (UTDFN COL)
Rev 3, 11/07
2X 1.5
2.00
A
6
PIN 1
INDEX AREA
PIN #1 INDEX AREA
6
B
6X 0.50
1
4
7X 0.4 ± 0.1
1X 0.5 ±0.1
2.00
(4X)
0.15
8
5
TOP VIEW
0.10 M C A B
4 0.25 +0.05 / -0.07
BOTTOM VIEW
( 8X 0 . 25 )
SEE DETAIL "X"
( 1X 0 .70 )
0 . 55 MAX
0.10 C
C
BASE PLANE
SEATING PLANE
0.08 C
(1.8 )
SIDE VIEW
C
( 7X 0 . 60 )
0 . 2 REF
0 . 00 MIN.
0 . 05 MAX.
( 6X 0 . 5 )
DETAIL "X"
TYPICAL RECOMMENDED LAND PATTERN
NOTES:
1. Dimensions are in millimeters.
Dimensions in ( ) for Reference Only.
2. Dimensioning and tolerancing conform to AMSE Y14.5m-1994.
3. Unless otherwise specified, tolerance : Decimal ± 0.05
4. Dimension b applies to the metallized terminal and is measured
between 0.15mm and 0.30mm from the terminal tip.
5. Tiebar shown (if present) is a non-functional feature.
6. The configuration of the pin #1 identifier is optional, but must be
located within the zone indicated. The pin #1 identifier may be
either a mold or mark feature.
9
FN6658.4
January 13, 2009
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