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Data Sheet
ISL6291
May 2, 2005
FN9102.2
Li-ion/Li Polymer Linear Battery Charger
Features
The ISL6291 provides a low-cost integrated charger solution
for single-cell Li-ion and Li Polymer rechargeable batteries.
No external pass element, current sensing resistor, or
reverse blocking diode is required with this solution.
• Integrated Linear Pass Element
1
• Programmable Current Limit Up to 2.0A
• Programmable End-of-Charge Current
• Trickle Charge an Over Discharged Battery
• Charge Current Thermal Foldback
• Simple Interface for Low-Cost Thermistor
• Accepts USB Bus Power
• Ambient Temperature Range: -20°C to 70°C
• Thermally-Enhanced 5x5 QFN Package (JA = 33°C/W)
• Pb-Free Available (RoHS Compliant)
Applications
• Handheld Devices
• Cell Phones
• PDAs
• Stand-Alone Chargers
• USB Bus-Powered Chargers
Related Literature
• Technical Brief TB363 “Guidelines for Handling and
Processing Moisture Sensitive Surface Mount Devices
(SMDs)”
• Technical Brief TB389 “PCB Land Pattern Design and
Surface Mount Guidelines for QFN Packages”
Pinout
VIN
VBAT
VBAT
ISL6291 (QFN)
TOP VIEW
16
15
14
13
12
VBAT
FAULT
2
11
TEMP
STATUS
3
10
IMIN
TIME
4
9
IREF
5
6
7
8
V2P8
1
EN
VIN
TOEN
The ISL6291 is packed in a thermally enhanced 5x5 QFN
package. See the Technical Brief TB389 given in the Related
Literature for more information related to the package.
• 1% Voltage Accuracy
VIN
When the wall adapter is not present, the ISL6291 draws
less than 1A current from the battery. Two logic outputs
provide the charging status and fault information, and an
easy interface to system logic. A V2P8 pin outputs a 2.8V
reference voltage that can be used to bias other circuits, or
as an indication for the adapter presence.
• No External Reverse Blocking Diode Required
GND
The ISL6291 is a constant-current (CC)/constant-voltage
(CV) charger. The constant charge current is programmable
up to 2.0A with an external signal resistor. An internal
trimmed current-sense circuit guarantees 10% accuracy,
with no bulky external current-sense resistor. The constant
voltage is either 4.1V or 4.2V. The charger always
preconditions the battery with 1/10 of the programmed
charge current at the beginning of a charge cycle, until it
verifies that the battery can be fast-charged. A safety timer
prevents over-charging a dead battery. The charging
terminates as the charge current falls below the
programmed minimum current during the CV mode. The
charger automatically re-charges the battery when the
battery voltage drops below a recharge threshold. A simple
interface with an NTC thermistor avoids charging the battery
outside a programmable temperature window. A thermalfoldback feature of the ISL6291 guarantees safe operation
when the printed circuit board space is limited for thermal
dissipation. The charger reduces the charge current
automatically, as the internal temperature rises above a
preset level, to prevent further temperature rise.
• Integrated Charge Current Sensor
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a trademark of Intersil Americas LLC.
Copyright Intersil Americas LLC. 2005. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
ISL6291
Ordering Information
PART NUMBER
TEMP. RANGE
(°C)
PACKAGE
PKG. DWG.
#
ISL6291-1CR
-20 to 70
16 Ld 5x5 QFN L16.5x5B
ISL6291-1CRZ
(See Note)
-20 to 70
16 Ld 5x5 QFN L16.5x5B
(Pb-free)
ISL6291-2CR
-20 to 70
16 Ld 5x5 QFN L16.5x5B
ISL6291-2CRZ
(See Note)
-20 to 70
16 Ld 5x5 QFN L16.5x5B
(Pb-free)
ISL6291-2CRTR5155
-20 to 70
16 Ld 5x5 QFN L16.5x5B
ISL6291-2CRZTR5155 (See Note)
-20 to 70
16 Ld 5x5 QFN L16.5x5B
(Pb-free)
ISL6291EVAL1
Evaluation Board
*Add “-T” suffix to part number for tape and reel packaging.
NOTE: Intersil Pb-free products employ special Pb-free material
sets; molding compounds/die attach materials and 100% matte tin
plate termination finish, which are RoHS compliant and compatible
with both SnPb and Pb-free soldering operations. Intersil Pb-free
products are MSL classified at Pb-free peak reflow temperatures that
meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
2
FN9102.2
May 2, 2005
ISL6291
Block Diagrams
VIN
x3
x3
VPOR
V2P8
REF
VMIN
ISEN
-
VPOR
+
+
-
VRECHRG
+
Inputok
100000:1
current
mirror
VCH
VBAT
-
80mV
IR
+
CA
CHRG
IREF
+
VA -
Current
Source
T rickle/CC
IMIN
ISEN2
VCH
TEMP
MON
IMIN
+
+
-
MIN_I
Minbat
VMIN
TOEN
V2P8
+
VTMIN
-
U.T.
Recharge
LOGIC
S
VTMAX
O.T.
SET
STATUS
+
TEMP
VRECHRG
Q
CHRG
Charge
R
+
S
CLR
SET
Q
Q
FAULT
FAULT
Fault
R
CLR
COUNTER
Q
SHDN
EN
Inputok
OSC
TIME
3
GND
FN9102.2
May 2, 2005
ISL6291
Typical Application
5V W all
Adapter
VIN
C1
1 F
VBAT
10F
TOEN
5 k
C2
5 k
V2P8
Battery
Pack
ISL6291
T
TEMP
FAULT
IREF
STATUS
IMIN
EN
RIMIN
V2P8
0.1F
TIME
15 nF
4
GND
80k
RIREF
80 k 
CTIME
FN9102.2
May 2, 2005
ISL6291
Absolute Maximum Ratings
Thermal Information
Supply Voltage (VIN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13.5V
Signal Input Voltage (EN, TOEN). . . . . . . . . . . . . . . . . . . . . . . . 3.3V
ESD Rating
Human Body Model (Per MIL-STD-883 Method 3015.7) . . . . .1kV
Machine Model (Per EIAJ ED-4701 Method C-111) . . . . . . . .200V
Thermal Resistance
JA (°C/W)
Jc (°C/W)
QFN Package (Notes 1, 2) . . . . . . . .
36
5.5
Maximum Junction Temperature (Plastic Package) . . . . . . . . 150°C
Maximum Storage Temperature Range . . . . . . . . . . . -65°C to 150°C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300°C
Recommended Operating Conditions
Ambient Temperature Range . . . . . . . . . . . . . . . . . . . .-20°C to 70°C
Supply Voltage, VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.35V to 10V
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. JA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See
Tech Brief TB379.
2. For JC, the “case temp” location is the center of the exposed metal pad on the package underside.
Electrical Specifications
Typical Values Are Tested at 25°C and 5V Input, Maximum and Minimum Values Are Guaranteed Over 0°C to
70°C Ambient Temperature with a Supply Voltage in the Range of 4.35V to 10V, Unless Otherwise Noted.
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
POWER-ON RESET
Rising VIN Threshold
-
3.9
4.3
V
Hysteresis
-
160
-
mV
STANDBY CURRENT
VBAT Pin Sink Current
ISTANDBY
VIN < VBAT
-
-
1
A
VIN Pin Supply Current
IVIN
VIN > VBAT and EN = floating
-
1
-
mA
Output Voltage
VCH
ISL6291-1
4.059
4.10
4.141
V
Output Voltage
VCH
ISL6291-2
4.158
4.20
4.242
V
-
-
250
mV
0.9
1.0
1.1
A
-
100
-
mA
RIMIN pin = 80k
-
100
-
mA
VOLTAGE REGULATION
Dropout Voltage (Note 3)
VDROP
VBAT = 4.2V, charge current = 0.5A
CHARGE CURRENT
Constant Charge Current (Note 4)
ICHARGE
Trickle Charge Current
ITRICKLE
End-of-Charge Threshold
IEOC
RIREF = 80k, VBAT = VCH - 100mV
RECHARGE THRESHOLD
Recharge Voltage Threshold
VRECHRG
ISL6291-2
-
4.00
-
V
Recharge Voltage Threshold
VRECHRG
ISL6291-1
-
3.90
-
V
-
3.0
-
V
TRICKLE CHARGE THRESHOLD
Trickle Charge Threshold Voltage
VMIN
TEMPERATURE MONITORING
Low Battery Temperature Threshold
VTMIN
1.425
1.505
1.575
V
High Battery Temperature Threshold
VTMAX
V2P8 = 3V
.260
.305
.340
V
Battery Removal Threshold
VRMV
-
2.25
-
V
Charge Current Foldback Threshold (Note 3)
TFOLD
85
100
115
°C
Current Foldback Gain
GFOLD
-
40
-
mA/°C
2.1
3
3.9
ms
Logic Input High
2.0
-
-
V
Logic Input Low
-
-
0.8
V
5
-
-
mA
OSCILLATOR
CTIME = 15nF
Oscillation Period
LOGIC INPUT AND OUTPUT
STATUS/FAULT Sink Current
Pin Voltage = 0.8V
NOTES:
3. Guaranteed by design, not tested.
4. The actual current may be affected by the thermal fold-back or the dropout voltage.
5
FN9102.2
May 2, 2005
ISL6291
Functional Pin Description
V2P8 (Pin 8)
VIN (Pin 1, 15, 16)
VIN is the input power source pin that is connected to a wall
adapter.
FAULT (Pin 2)
FAULT is an open-drain output indicating fault status. When
a fault condition occurs, this pin is pulled to LOW.
IREF (Pin 9)
STATUS (Pin 3)
STATUS is an open-drain output indicating charging and
inhibit states. During any charge mode, this pin is pulled to
LOW.
TIME (Pin 4)
Connect a timing capacitor CTIME between this pin and
GND. The internal oscillator, as shown in the Block Diagram,
charges and discharges the timing capacitor between 0.5V
and 1.5V with 10A current. The oscillation period can be
found as:
6
T OSC = 0.2  10  C TIME
22
C TIME
 T OSC = 14  -----------------1nF
IREF is the programming input for the constant charge
current. Connect a resistor RIREF (see the Typical
Application) to this pin. The voltage of this pin is regulated to
a 0.8V reference voltage. The charging current during the
constant current mode charge is 100,000 times of the
current in the RIREF resistor. The charging current in the
constant current mode can be found as:
V REF
5
0.8V
I REF = 100000  ----------------- = ----------------- 10  A 
R IREF R IREF
where VREF is the 0.8V reference voltage.
 sec onds 
A 22-stage binary counter increments each oscillation period
to set up the TIMEOUT interval. The TIMEOUT interval can
be calculated as:
TIMEOUT = 2
V2P8 is a 2.8V reference voltage output. V2P8 pin outputs a
2.8V voltage when the input voltage rises above the POR
threshold and outputs zero voltage otherwise. This pin can
be used as an adapter presence signal. A 0.1F Ceramic
capacitor is recommended for decoupling purposes. This pin
can be used to bias other circuits with a maximum current of
2mA.
 minutes 
When the fast charge takes longer than the TIMEOUT
interval, or the Trickle charge time exceeds 1/8 of the
TIMEOUT interval, the charger issues a TIMEOUT fault
status and stops charging.
The oscillator also provides a time reference for the charger.
GND (Pin 5)
GND is the connection to system ground.
TOEN (Pin 6)
TOEN is the TIMEOUT enable input pin. Pulling this pin to
LOW disables the TIMEOUT charge-time limit for the fast
charge modes. Leave this pin floating to enable the
TIMEOUT limit. An internal 10Apull-up circuit pulls this pin
up to a 2.8V internal reference. The trickle mode always has
the 1/8 TIMEOUT limited charge time regardless of this
input. When a TIMEOUT fault is issued, the charger is
latched. The only way to enable the charger again is to cycle
the input power, or to toggle the EN pin.
IMIN (Pin 10)
IMIN is a programmable input for the end-of-charge current.
The pin voltage is also regulated at 0.8V. The end-of-charge
current can be found as:
V REF
4
0.8V
I MIN = 10000  ---------------- = ---------------- 10  A 
R IMIN R IMIN
TEMP (Pin 11)
TEMP is an Input for an external NTC thermistor. As shown
in the Block Diagram, two comparators forms a window
comparator with its low and high thresholds set by VTMIN
and VTMAX respectively. When the voltage on the TEMP pin
is outside the window, the charger stops. When the TEMP
pin voltage falls back into the window, the charger starts a
new charge cycle. The VTMIN and VTMAX voltage is
determined by the internal resistor divider, as shown in the
block diagram. See “Battery Pack Temperature Monitoring”
for more information.
The TEMP pin is also used for battery removal detection. It
is assumed that the thermistor is co-packed with the battery.
When the charger sees a TEMP pin voltage that is 2.1V or
higher, it assumes that the battery is removed. When a
battery is removed, a FAULT signal is indicated and charging
is halted. When a battery is inserted again, a new charge
cycle starts.
EN (Pin 7)
VBAT (Pin 12, 13, 14)
EN is the CMOS logic input. Leave this pin floating to enable
the charger. This pin is pulled up to the internal 2.8V
reference via a 10A current source.
VBAT is the connection to a battery. Typically a 10F
Tantalum capacitor is needed for stability when no battery is
attached to this pin. When a battery is connected, however,
no capacitor is required for stability. A 0.1F ceramic
capacitor is recommended for decoupling.
6
FN9102.2
May 2, 2005
ISL6291
The charger starts a new charge cycle when a wall adapter
is plugged in, a new battery is inserted, a battery voltage
drops below the re-charge threshold, a temperature fault
ends, or the EN pin is toggled from LOW to HIGH.
Description
Initialization
The ISL6291 initializes as the input voltage rises above the
power-on-reset (POR) threshold. Once the input voltage
reaches the POR level, the V2P8 pin outputs a 2.8V voltage.
This output voltage can be used as an adapter presence
indication and to bias the thermistor circuit. The POR takes
about 200s. During the POR, the STATUS pin outputs a
logic HIGH signal, and the FAULT pin outputs a logic LOW
signal.
Trickle Charge Mode
A charge cycle always starts with the trickle charge mode.
The trickle charge mode is to pre-condition the battery and
prepare it for the fast charge (constant current or constant
voltage charge). It is not recommended to fast charge a
Li-ion battery when the battery is deeply discharged,
indicated by a low battery voltage. When the ISL6291 sees a
battery voltage lower than the VMIN given in the Electrical
Specifications, it forces 1/10 of the current in the constant
current mode into the battery. The charger stays in the trickle
mode until the battery voltage is above VMIN for 15
consecutive oscillation cycles (TOSC). The 15-cycle delay is
to avoid entering the constant current mode accidentally,
caused by any transient voltage spike on the battery pack
terminals. The charge time for the trickle mode is limited to
1/8 of the TIMEOUT interval (see TIME pin description and
Figure 1). If the trickle charge time takes longer than 1/8 of
the TIMEOUT interval, a TIMEOUT fault is issued and the
charger is latched. The minimum trickle charge time is 15
TOSC, and the maximum time is 1/8 TIMEOUT. During the
trickle mode, the STATUS pin is set to logic LOW, and the
FAULT pin is set to logic HIGH.
Operation States
Immediately after the POR, the charger enters a charge
state. A charge state always cycles through a trickle mode, a
constant-current mode, and a constant voltage mode, as
shown in Figure 1. If the battery completes a charge cycle
without a fault, the operation moves to the inhibit state,
waiting for the battery to be discharged to start another
charge cycle. Two types of fault may occur during a charge
cycle, namely, a TIMEOUT fault or a temperature fault (refer
to Functional Pin Description on TIME, TOEN, and TEMP
pins). If a fault occurs during the charge modes, the
operation enters the fault state. The charger is in a standby
state when the adapter is removed, or the EN pin of the IC is
pulled to LOW. In the standby state, the charger IC draws
less than 1A current from the battery. The two open-drain
pins, STATUS and FAULT, indicate the operation states of
the charger (see Table 1).
Constant Current Charge Mode
The battery is charged with a constant current programmed
by the IREF pin resistor (see IREF pin description) during
the constant current mode. The constant current is trimmed
to 10% accuracy. The battery voltage rises towards the
charge termination voltage VCH in this mode. The constant
current mode ends when the battery voltage reaches VCH.
The internal clock counter limits the maximum time for the
constant current mode to the TIMEOUT interval. The counter
is reset at the beginning of the this charge mode. If the
TABLE 1. STATUS INDICATIONS
FAULT
STATUS
INDICATION
HIGH
HIGH
Charge completed with no fault (Inhibit) or
Standby
HIGH
LOW
Charging in one of the three modes
LOW
HIGH
Fault
*Both outputs are pulled up with external resistors.
V CH
VRECHRG
IREF
V MIN
TIMEOUT
Trickle time
< 1/8 TIMEOUT
IREF/10
IMIN
0
0
Trickle
Mode
Constant Current
Mode
Constant Voltage
Mode
Inhibit Trickle CC
Mode Mode
CV
Mode
TIME
FIGURE 1. MODES OF OPERATION
7
FN9102.2
May 2, 2005
ISL6291
charge time exceeds the TIMEOUT interval, a fault is issued
and the charger is latched. The charger then enters the Fault
state.
The TIMEOUT limit is disabled when the TOEN pin is pulled
to LOW (see TOEN pin description for more information).
During the constant current charge mode, the STATUS pin
remains LOW and the FAULT pin remains HIGH.
Internal Current Sensing
A 100,000:1 current mirror is employed to sense the current
in the pass element, as shown in the Block Diagram. The
current mirror is trimmed to 10% accuracy. The second
mirrored output, represented by ISEN2 in the block diagram,
is used to compare with the IMIN pin current to determine
the end-of-charge condition.
Constant Voltage Charge Mode
The ISL6291 regulates the battery terminal voltage at VCH in
the constant voltage mode. As the battery continues being
charged, the charge current starts to decrease, as shown in
Figure 1. When the charge current drops to the minimum
value IMIN, programmed by the IMIN pin, the charge cycle
completes. The total charge time for the constant current
mode and the constant voltage mode must not exceed the
TIMEOUT interval, unless the TOEN pin is pulled LOW;
otherwise, the charger also stops charging and indicates a
FAULT status. During the constant voltage mode, the
STATUS remains LOW and the FAULT remains HIGH.
Two versions of ISL6291 (see Ordering Information) are
available: a 4.1V termination voltage version, and a 4.2V
termination voltage version.
VIN
POR Threshold
V2P8
STATUS
FAULT
200us
POR
The charger enters the Inhibit State once a normal charge
cycle completes. The ISL6291 then monitors the battery
voltage. Once the battery voltage falls below the VRECHRG
threshold, a new charge cycle starts, as shown in Figure 1.
Both STATUS and FAULT are HIGH in this state.
Fault State
Two types of fault may occur during a charge cycle: the
TIMEOUT fault (refer to the TIME pin and the TOEN pin
description), and the temperature fault (see TEMP pin
description and the Battery Pack Temperature Monitoring
section). When a TIMEOUT fault occurs, the charger is
latched. The latch is released only by recycling the input
power or toggling the EN signal. When a temperature fault
occurs, the charger is reset and a new charge cycle starts
when the temperature fault ends. In case of a fault, the
FAULT pin indicates a logic LOW and the STATUS pin
outputs a logic HIGH.
Standby State
The charger is in the Standby State when the EN pin is held
LOW or the wall adapter is removed. The charger draws less
than 1A of standby current when the adapter is removed.
Timing Diagram
Figure 2 summarizes the operation of the charger and the
key signals after an adapter is attached to the charger input.
No fault occurs in this diagram and the EN pin is assumed
not connected to logic LOW.
8
15 Cycles to
1/8 TIMEOUT
VRECHRG
VBAT
15 Cycles
3.0V VMIN
ICHARGE
t0
Inhibit State
Charge
Cycle
Charge Cycle
t1 t2 t3
t4
t5
t6 t7
t8
FIGURE 2. TIMING DIAGRAM AFTER AN ADAPTER IS
ATTACHED TO THE CHARGER INPUT
Charge Current Control
The charging current in the pass element is controlled by the
current amplifier CA, as shown in the Block Diagram. The
CA, the pass element, and the 100,000:1 current mirror form
a control loop. During a trickle charge mode or a constant
current charge mode, the control reference to the loop is the
reference current IR. The voltage amplifier VA does not
affect the loop operation because the battery voltage is lower
than the charge termination voltage VCH, so that the voltage
amplifier output is blocked by the diode connecting to the
current reference. If the charge current in the PMOS pass
element is too high, its mirrored output is higher than the
reference IR. The non-inverting input of the current amplifier
has a higher voltage than the inverting input so that the
current amplifier output increases, reducing the gate-tosource voltage of the PMOS pass element. The current in
the pass element thereby reduces. If the charge current is
too low, the current amplifier output reduces to force the
current to increase.
During the Trickle mode charge, the current reference
typically equals 1/10 of the current in the IREF pin. During
the constant current mode, the reference current equals the
current in the IREF pin.
If the temperature inside the IC rises above a typical value of
100°C, the current source block starts to reduce the reference
current IR at a rate of 0.4A/°C for every degree of
temperature rise.
FN9102.2
May 2, 2005
ISL6291
Charge Termination Voltage Regulation
As the battery voltage rises to the 4.1V or 4.2V termination
voltage, the voltage amplifier starts to output positive voltage
and to source current. This current partially cancels the
current of the reference current IR to reduce the charge
current. If the battery voltage increases further due to the
charging, the voltage amplifier increases its output current to
reduce the equivalent reference current. As a result, after the
battery voltage reaches the termination voltage, the charge
current starts to decrease.
As the charging current drops to the end-of-charge current
level programmed by the IMIN pin, the charge stops. The
large voltage control loop gain guarantees that the battery
voltage is regulated within the 1% error specification.
Select an NTC thermistor whose resistance value satisfies
the above equation. A curve-1 NTC thermistor from Vishay is
a good candidate for this application. If a thermistor does not
meet this requirement, using a resistor in parallel or series
with the thermistor may solve the problem. Once the
thermistor is selected, the pull-up resistor should be chosen
as:
R U = R TL
2.8V
ISL6291
Under
Temp
CP1
+
Internal Thermal Management
The temperature rise of a linear charger is always a concern
in real applications. The temperature rise is caused by the
power dissipation of the charger. Maximum power
dissipation occurs when the battery is charged in the
constant current mode. The advanced thermal management
function of the ISL6291 frees users from the temperature
rise concern. The ISL6291 adopts a current-foldback
technique against the temperature rise. Under normal
operation, the ISL6291 charges the battery with the
programmed IREF. If the internal thermal monitoring circuit
detects 100°C temperature in the IC, it starts to reduce the
charge current to prevent further temperature rise. The gain
for the current-foldback is 40mA/°C (or 0.4A°C for the
reference current IR) after the internal temperature reaches
100°C; therefore, for a charger with the constant charge
current set at 1A, the charge current is reduced to zero when
the internal temperature rises to 125°C. The actual internal
temperature should settle between 100°C to 125°C,
depending on the operating conditions, if the temperature
does rise above 100°C.
Battery Pack Temperature Monitoring
The ISL6291 uses two comparators to form a window
comparator. Figure 3 shows the internal circuit. When the
TEMP pin voltage is “out of the window,” as determined by
the VTMIN and VTMAX, the charging is stopped. The two
MOSFETs, Q1 and Q2, produce hysteresis for both upper
and lower threshold. Figure 4 shows all the critical voltage
levels and the output of the two comparators versus the
TEMP pin voltage.
The external thermistor circuit is shown in Figure 3. The NTC
thermistor RT requires a pull-up resistor RU to form a
resistive divider. RU should be pulled up to the 2.8V V2P8
pin. Assume the resistance of the NTC thermistor is RTH at
the high temperature limit, and is RTL at the low limit. It can
be shown that:
R TL = 9  R TH
9
V2P8
R1
100K
VTMIN
RU
To TEMP Pin
R2
75K
TEMP
Q1
Over
Temp
CP2
+
R3
5K
RT
R4
20K
VTMAX
Q2
R5
4K
GND
FIGURE 3. THE INTERNAL AND EXTERNAL CIRCUIT FOR THE
BATTERY PACK TEMPERATURE MONITORING
2.8V
VTMIN (1.4V)
VTMIN- (1.2V)
TEMP
Pin
Voltage
VTMAX+ (0.33V)
VTMAX (0.28V)
0V
Under
Temp
Over
Temp
FIGURE 4. CRITICAL VOLTAGE LEVELS FOR TEMP PIN
If a parallel or series resistor is used, the RTL value is the
combined value at the low temperature limit. The
temperature hysteresis can be calculated once the thermistor
is selected. The typical hysteresis is about 3°C to 5°C.
FN9102.2
May 2, 2005
ISL6291
Battery Removal Detection
The ISL6291 assumes that the thermistor is co-packed with
the battery and is removed together with the battery. When
the ISL6291 sees a voltage of 2.1V or higher on the TEMP
pin, it assumes that the battery is removed. When the battery
is removed, the charger stops and indicates a fault signal. A
new charge cycle starts when a battery is inserted again.
Output Capacitor COUT
COUT is typically a 10F Tantalum capacitor if the charger is
required to operate with no battery attached. For embedded
battery applications, there is no requirement for a capacitor if
the battery is placed close enough to the charger output. It is
recommended, however, that the charger have at least a
0.1uF ceramic capacitor at the charger output for decoupling
purposes.
Input Capacitor CIN
CIN is typically a 10F Tantalum capacitor or 1F Ceramic
capacitor.
Stability
The charger is stable with a wide range of external
components, including the typical external components.
10
FN9102.2
May 2, 2005
ISL6291
Quad Flat No-Lead Plastic Package (QFN)
Micro Lead Frame Plastic Package (MLFP)
L16.5x5B
16 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE
(COMPLIANT TO JEDEC MO-220VHHB ISSUE C)
MILLIMETERS
SYMBOL
MIN
NOMINAL
A
0.80
A1
-
A2
-
A3
b
NOTES
0.90
1.00
-
-
0.05
-
-
1.00
9
0.20 REF
0.28
D
0.33
9
0.40
5, 8
5.00 BSC
D1
D2
MAX
-
4.75 BSC
2.95
3.10
9
3.25
7, 8
E
5.00 BSC
-
E1
4.75 BSC
9
E2
2.95
e
3.10
3.25
7, 8
0.80 BSC
-
k
0.25
-
-
-
L
0.35
0.60
0.75
8
L1
-
-
0.15
10
N
16
2
Nd
4
3
Ne
4
3
P
-
-
0.60
9

-
-
12
9
Rev. 1 10/02
NOTES:
1. Dimensioning and tolerancing conform to ASME Y14.5-1994.
2. N is the number of terminals.
3. Nd and Ne refer to the number of terminals on each D and E.
4. All dimensions are in millimeters. Angles are in degrees.
5. Dimension b applies to the metallized terminal and is measured
between 0.15mm and 0.30mm from the terminal tip.
6. The configuration of the pin #1 identifier is optional, but must be
located within the zone indicated. The pin #1 identifier may be
either a mold or mark feature.
7. Dimensions D2 and E2 are for the exposed pads which provide
improved electrical and thermal performance.
8. Nominal dimensions are provided to assist with PCB Land Pattern
Design efforts, see Intersil Technical Brief TB389.
9. Features and dimensions A2, A3, D1, E1, P &  are present when
Anvil singulation method is used and not present for saw
singulation.
10. Depending on the method of lead termination at the edge of the
package, a maximum 0.15mm pull back (L1) maybe present. L
minus L1 to be equal to or greater than 0.3mm.
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9001 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
11
FN9102.2
May 2, 2005
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