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NTERSIL
-888-ISheet
1Data
July 2004
ISL6292D
FN9166
Li-ion/Li Polymer Battery Charger
Features
The ISL6292D is an integrated single-cell Li-ion or
Li-polymer battery charger capable of operating with an input
voltage as low as 2.4V. This charger is designed to work with
various types of ac adapters or a USB port.
• Complete Charger for Single-Cell Li-ion Batteries
The ISL6292D operates as a linear charger when the ac
adapter is a voltage source. The battery is charged in a
CC/CV (constant current/constant voltage) profile. The
charge current is programmable up to 2A. The ISL6292D
can also work with a current-limited adapter to minimize the
thermal dissipation, in which case the ISL6292D combines
the benefits of both a linear charger and a pulse charger.
• Very Low Thermal Dissipation
The ISL6292D features charge current thermal foldback to
guarantee safe operation when the printed circuit board is
space limited for thermal dissipation. Additional features
include preconditioning of an over-discharged battery, an
NTC thermistor interface for charging the battery in a safe
temperature range, automatic recharge, and thermally
enhanced QFN package.
ISL6292DCR4
TEMP.
RANGE (°C)
-20 to 70
PACKAGE
16 Ld 4x4 QFN
PKG.
DWG. #
L16.4x4
ISL6292DCR4-T 16 Ld 4x4 QFN Tape and Reel
ISL6292DCRZ
(Note)
-20 to 70
16 Ld 4x4 QFN (Pb-free) L16.4x4
• Two-Speed Blinking Indication at Fault Conditions
• 1% Voltage Accuracy
• Programmable Current Limit up to 2A
• Programmable End-of-Charge Current
• Charge Current Thermal Foldback
• NTC Thermistor Interface for Battery Temperature Monitor
• Accepts Multiple Types of Adapters or USB BUS
Power
• Guaranteed to Operate at 2.65V After Start Up
• Ambient Temperature Range: -20°C to 70°C
• QFN Package:
- Compliant to JEDEC PUB95 MO-220
QFN - Quad Flat No Leads - Package Outline
- Near Chip Scale Package footprint, which improves
PCB efficiency and has a thinner profile
• Pb-free Available
Applications
ISL6292DCRZ-T 16 Ld 4x4 QFN Tape and Reel (Pb-free)
(Note)
• Handheld Devices including Medical Handhelds
NOTE: Intersil Pb-free products employ special Pb-free material
sets; molding compounds/die attach materials and 100% matte tin
plate termination finish, which is compatible with both SnPb and
Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed
the Pb-free requirements of IPC/JEDEC J Std-020B.
• PDAs, Cell Phones and Smart Phones
• Portable Instruments, MP3 Players
• Self-Charging Battery Packs
• Stand-Alone Chargers
• USB Bus-Powered Chargers
16 15 14 13
STAT1 3
10 IMIN
TIME 4
9 IREF
6
7
8
EN
11 TEMP
V2P8
12 VBAT
STAT2 2
TOEN
VIN 1
5
1
Related Literature
• Technical Brief TB363 “Guidelines for Handling and
Processing Moisture Sensitive Surface Mount Devices
(SMDs)”
VBAT
VBAT
VIN
VIN
ISL6292D (16 LEAD QFN)
TOP VIEW
GND
Pinout
• No External Blocking Diode Required
• Thermally-Enhanced QFN Packages
Ordering Information
PART #
• Integrated Pass Element and Current Sensor
• Technical Brief TB379 “Thermal Characterization of
Packaged Semiconductor Devices”
• Technical Brief TB389 “PCB Land Pattern Design and
Surface Mount Guidelines for QFN Packages”
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2004. All Rights Reserved.
All other trademarks mentioned are the property of their respective owners.
ISL6292D
Absolute Maximum Ratings
Thermal Information
Supply Voltage (VIN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to 7V
Output Pin Voltage (VBAT) . . . . . . . . . . . . . . . . . . . . . . -0.3 to 5.5V
Signal Input Voltage (TOEN, TIME, IREF, IMIN) . . . . . . -0.3 to 3.2V
Output Pin Voltage (STAT1, STAT2) . . . . . . . . . . . . . . . . . -0.3 to 7V
Charge Current (For 4x4 QFN Package) . . . . . . . . . . . . . . . . . 2.1A
ESD Rating
Human Body Model (Per MIL-STD-883 Method 3015.7) . . .1500V
Machine Model (Per EIAJ ED-4701 Method C-111) . . . . . . . .150V
Thermal Resistance (Note 1)
JA (°C/W)
JC (°C/W)
QFN Package (Notes 1, 2). . . . . . . . . . .
41
4
Maximum Junction Temperature (Plastic Package) . . . . . . . . 150°C
Maximum Storage Temperature Range . . . . . . . . . . . -65°C to 150°C
For recommended soldering conditions, see Tech Brief TB389.
Recommended Operating Conditions
Ambient Temperature Range . . . . . . . . . . . . . . . . . . . .-20°C to 70°C
Supply Voltage, VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.3V to 6.5V
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. JA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See
Tech Brief TB379.
2. JC, “case temperature” location is at the center of the exposed metal pad on the package underside. See Tech Brief TB379.
Electrical Specifications
Typical values are tested at VIN = 5V and 25°C Ambient Temperature, maximum and minimum values are
guaranteed over 0°C to 70°C Ambient Temperature with a supply voltage in the range of 4.3V to 6.5V, unless
otherwise noted.
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
POWER-ON RESET
Rising VIN Threshold
VPOR
3.0
3.5
4.0
V
Falling VIN Threshold (Note 3)
VPOR
2.25
2.4
2.65
V
VIN floating or EN = LOW
-
-
3.0
A
STANDBY CURRENT
VBAT Pin Sink Current
ISTANDBY
VIN Pin Supply Current
IVIN
VBAT floating and EN pulled low
-
30
-
A
VIN Pin Supply Current
IVIN
VBAT floating and EN floating
-
1
-
mA
4.158
4.20
4.242
V
-
140
-
mV
VOLTAGE REGULATION
Output Voltage
VCH
Dropout Voltage
VBAT = 3.7V, 0.5A
CHARGE CURRENT
Constant Charge Current (Note 4)
ICHARGE
RIREF = 80k, VBAT = 3.7V
0.9
1.0
1.1
A
Trickle Charge Current
ITRICKLE
RIREF = 80k, VBAT = 2.0V
-
110
-
mA
Constant Charge Current
ICHARGE
IREF Pin Voltage > 1.3V, VBAT = 3.7V
400
450
500
mA
Trickle Charge Current
ITRICKLE
IREF Pin Voltage > 1.3V, VBAT = 2.0V
-
45
-
mA
Constant Charge Current
ICHARGE
IREF Pin Voltage < 0.4V, VBAT = 3.7V
-
-
100
mA
Trickle Charge Current
ITRICKLE
IREF Pin Voltage < 0.4V, VBAT = 2.0V
-
10
-
mA
85
110
135
mA
-
-200
-80
mV
VRECHRG
3.85
4.0
-
V
VMIN
2.56
2.76
3.0
V
End-of-Charge Threshold
RIMIN = 80k
RECHARGE THRESHOLD
Recharge Voltage Threshold Below VCH
Recharge Voltage Threshold
VRECHRG
The threshold in relative to VCH
TRICKLE CHARGE THRESHOLD
Trickle Charge Threshold Voltage
2
ISL6292D
Electrical Specifications
Typical values are tested at VIN = 5V and 25°C Ambient Temperature, maximum and minimum values are
guaranteed over 0°C to 70°C Ambient Temperature with a supply voltage in the range of 4.3V to 6.5V, unless
otherwise noted. (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
V2P8 = 3.0V
1.40
1.50
1.60
V
V2P8 = 3.0V
-
214
-
mV
V2P8 = 3.0V
.587
0.605
.623
V
V2P8 = 3.0V
-
55
-
mV
V2P8 = 3.0V
-
2.25
-
V
TEMPERATURE MONITORING
Low Battery Temperature Threshold
VTMIN
Low Temperature Threshold Hysteresis
High Battery Temperature Threshold
VTMAX
High Temperature Threshold Hysteresis
Battery Removal Threshold
VRMV
Charge Current Foldback Threshold (Note 5)
TFOLD
85
100
115
°C
Current Foldback Gain (Note 5)
GFOLD
-
100
-
mA/°C
2.4
3.0
3.6
ms
2.0
-
-
V
TOEN and EN Input Low
-
-
0.8
V
IREF and IMIN Input High
1.2
-
-
V
IREF and IMIN Input Low
-
-
0.4
V
5
-
-
mA
OSCILLATOR
Oscillation Period
TOSC
CTIME = 15nF
LOGIC INPUT AND OUTPUT
TOEN Input High
STAT1/STAT2 Sink Current
Pin Voltage = 0.8V
NOTES:
3. The POR falling edge voltage is guaranteed to be lower than the Trickle Charge Threshold Voltage (VMIN) by actual tests.
4. The actual charge current may be affected by the thermal foldback function if the thermal dissipation capability is not enough or by the on
resistance of the power MOSFET if the charger input voltage is too close to the output voltage.
5. Guaranteed by design, not a tested parameter.
3
ISL6292D
Pin Description
EN (Pin 7)
VIN (Pin 1, 15, 16)
EN is the enable logic input. Connect the EN pin to LOW to
disable the charger or leave it floating to enable the charger.
VIN is the input power source. Connect to a wall adapter.
V2P8 (Pin 8)
STAT2 (Pin 2)
STAT2 is an open-drain output to indicate the charger status.
This pin is pulled to LOW during charging and to HIGH when
not charging. When a fault situation occurs, the pin outputs a
one-speed blinking indication.
This is a 2.8V reference voltage output. This pin outputs a
2.8V voltage source when the input voltage is above POR
threshold and outputs zero otherwise. The V2P8 pin can be
used as an indication for adapter presence. Use a 1F
ceramic capacitor to stabilize the internal linear regulator.
STAT1 (Pin 3)
IREF (Pin 9)
STAT1 is an open-drain output to indicate the charger status.
The STAT1 pin is pulled LOW when the charger is charging
a battery and to HIGH when the charge finishes. This pin
outputs two different speeds of blinking signal depending on
the type of the fault case.
This is the programming input for the constant charging
current.
IMIN (Pin 10)
IMIN is the programmable input for the end-of-charge
current.
TIME (Pin 4)
The TIME pin determines the oscillation period by
connecting a timing capacitor between this pin and GND.
The oscillator also provides a time reference for the charger.
TEMP (Pin 11)
GND (Pin 5)
VBAT (Pin 12, 13, 14)
GND is the connection to system ground.
VBAT is the connection to the battery. Typically a 10F
Tantalum capacitor is needed for stability when there is no
battery attached. When a battery is attached, only a 0.1F
ceramic capacitor is required as the minimum decoupling
capacitor.
TEMP is the input for an external NTC thermistor. The TEMP
pin is also used for battery removal detection.
TOEN (Pin 6)
TOEN is the TIMEOUT enable input pin. Pulling this pin to
LOW disables the TIMEOUT charge-time limit for the fast
charge modes. Leaving this pin HIGH or floating enables the
TIMEOUT limit.
Typical Application
5V WALL
ADAPTER
VIN
C1
VBAT
C2
1µF
TOEN
10µF
R1
330
ISL6292D
V2P8
RU
D1
+
-
RT
TEMP
STAT2
STAT1
EN
IREF
IMIN
V2P8
C3
TIME
1µF
CTIME
15nF
4
GND
RIMIN
80k
RIREF
80k
T
BATTERY
PACK
ISL6292D
Block Diagram
QMAIN
VIN
ISEN
Input_OK
VMIN
IT
100000:1
Current
Mirror
+
CA
-
RIREF
IMIN
+
+
VA
-
IMIN
RIMIN
-
CHRG
Current
References
VBAT
VPOR
-
IR
VIN
+
-
IREF
V2P8
VRECHRG
QSEN
VCH
References
Temperature
Monitoring
VPOR
C1
VBAT
+
100mV
VCH
+
Trickle/Fast
ISEN
Minbat
VMIN
+
-
+
MIN_I
V2P8
Recharge
Under Temp
NTC
Interface
TEMP
VRECHRG
VIN
STAT1
LOGIC
VIN
Over Temp
Batt Removal
STAT2
TOEN
OSC
TIME
COUNTER
GND
Input_OK
EN
FIGURE 1. BLOCK PROGRAM
5
ISL6292D
Flow Chart
Anytime
VBAT>VIN, or
VTEMP>2.1V, or
VIN< VPOR,
or EN = LOW
STOP
Charger: OFF
LED: OFF
VBAT<VIN and
VTEMP<2.1V and
VIN> VPOR
and EN = HIGH
TEMP fault
removed
TRICKLE
CHARGE
TEMP FAULT
FAST CHARGE
Charger: ON
LED: ON
TEMP FAULT
TEMP fault
TEMP fault
removed
TIMEOUT
completes
VBAT > 4.0V and ICHG < IMIN
CHARGE COMPLETION
Charger: OFF
LED: OFF
VBAT < 4.0V
6
Charger: OFF and latched
LED: Blinking
(Fast Speed for both STAT1
and STAT2)
VBAT > 2.8V before 1/8
TIMEOUT completes
TEMP fault
Charger: OFF
LED: Blinking
(STAT1: Slow Speed
STAT2: Fast Speed)
TIMEOUT FAULT
Charger: ON
LED: ON
TEMP fault
Charger: OFF
LED: Blinking
(STAT1: Slow Speed
STAT2: Fast Speed)
VBAT < 2.8V when 1/8
TIMEOUT completes
ISL6292D
Theory of Operation
The ISL6292D is an integrated charger for single-cell Li-ion
or Li-polymer batteries. The ISL6292D functions as a
traditional linear charger when powered with a voltagesource adapter. When powered with a current-limited
adapter, the charger minimizes the thermal dissipation
commonly seen in traditional linear chargers.
As a linear charger, the ISL6292D charges a battery in the
popular constant current (CC) and constant voltage (CV)
profile. The constant charge current IREF is programmable
up to 2A with an external resistor or a logic input. The charge
voltage VCH has 1% accuracy over the entire recommended
operating condition range. The charger always preconditions
the battery with 10% of the programmed current at the
beginning of a charge cycle, until the battery voltage is
verified to be above the minimum fast charge voltage, VMIN.
This low-current preconditioning charge mode is named
trickle mode. The verification takes 15 cycles of an internal
oscillator whose period is programmable with the timing
capacitor. A thermal-foldback feature removes the thermal
concern typically seen in linear chargers. The charger
reduces the charge current automatically as the IC internal
temperature rises above 100°C to prevent further
temperature rise. The thermal-foldback feature guarantees
safe operation when the printed circuit board (PCB) is space
limited for thermal dissipation.
A TEMP pin monitors the battery temperature to ensure a
safe charging temperature range. The temperature range is
programmable with an external negative temperature
coefficient (NTC) thermistor. The TEMP pin is also used to
detect the removal of the battery.
The charger offers a safety timer for setting the fast charge
time (TIMEOUT) limit to prevent charging a dead battery for
an extensively long time. The TIMEOUT limit can be
Trickle
Mode
VIN
VCH
Constant Current
Mode
Constant Voltage
Mode
disabled as needed by the TOEN pin. The trickle mode is
limited to 1/8 of TIMEOUT and cannot be disabled by the
TOEN pin.
The charger automatically re-charges the battery when the
battery voltage drops below a recharge threshold. When the
wall adapter is not present, the ISL6292D draws less than
3A current from the battery.
Three indication pins are available from the charger to
indicate the charge status. The V2P8 outputs a 2.8V dc
voltage when the input voltage is above the power-on reset
(POR) level and can be used as the power-present
indication. This pin is capable of sourcing a 2mA current, so
it can also be used to bias external circuits. The STAT1 pin is
an open-drain logic output that turns LOW when the battery
is being charged and turns HIGH when the EOC condition is
qualified. The EOC condition is: the battery voltage rises
above the recharge threshold and the charge current falls
below a user-programmable EOC current threshold. Once
the EOC condition is qualified, the STAT1 output rises to
HIGH and is latched. The latch is released at the beginning
of a charge or re-charge cycle. The STAT1 pin blinks when a
fault occurs. The blinking frequency of a TIMEOUT fault is
twice as fast as a temperature fault. The STAT2 pin behaves
the same as the STAT1 except that it blinks at one frequency
only when any fault occurs.
Figure 2 shows the typical charge curves in a traditional
linear charger powered with a constant-voltage adapter.
From the top to bottom, the curves represent the constant
input voltage, the battery voltage, the charge current and the
power dissipation in the charger. The power dissipation PCH
is given by the following equations:
P CH =  V IN -V BAT   I CHARGE
Trickle
Mode
Inhibit
Input Voltage
Battery Voltage
VIN
VCH
VMIN
VMIN
IREF
IREF
ILIM
Charge Current
Constant Current
Mode
(EQ. 1)
Constant Voltage
Mode
Inhibit
Input Voltage
Battery Voltage
Charge Current
IREF/10
IREF/10
P1
P2
P3
Power Dissipation
FIGURE 2. TYPICAL CHARGE CURVES USING A
CONSTANT-VOLTAGE ADAPTER
7
P1
P2
Power Dissipation
FIGURE 3. TYPICAL CHARGE CURVES USING A CURRENTLIMITED ADAPTER
ISL6292D
where ICHARGE is the charge current. The maximum power
dissipation occurs during the beginning of the CC mode. The
maximum power the IC is capable of dissipating is
dependent on the thermal impedance of the printed-circuit
board (PCB). Figure 2 shows, with dotted lines, two cases
that the charge currents are limited by the maximum power
dissipation capability due to the thermal foldback.
When using a current-limited adapter, the thermal situation
in the ISL6292D is totally different. Figure 3 shows the
typical charge curves when a current-limited adapter is
employed. The operation requires the IREF to be
programmed higher than the limited current ILIM of the
adapter, as shown in Figure 3. The key difference of the
charger operating under such conditions occurs during the
CC mode.
The Block Diagram, Figure 1, aids in understanding the
operation. The current loop consists of the current amplifier
CA and the sense MOSFET QSEN. The current reference IR
is programmed by the IREF pin. The current amplifier CA
regulates the gate of the sense MOSFET QSEN so that the
sensed current ISEN matches the reference current IR. The
main MOSFET QMAIN and the sense MOSFET QSEN form a
current mirror with a ratio of 100,000:1, that is, the output
charge current is 100,000 times IR. In the CC mode, the
current loop tries to increase the charge current by
enhancing the sense MOSFET QSEN, so that the sensed
current matches the reference current. On the other hand,
the adapter current is limited, the actual output current will
never meet what is required by the current reference. As a
result, the current error amplifier CA keeps enhancing the
QSEN as well as the main MOSFET QMAIN, until they are
fully turned on. Therefore, the main MOSFET becomes a
power switch instead of a linear regulation device. The
power dissipation in the CC mode becomes:
P CH = R DS  ON   I CHARGE
2
Figure 4 illustrates the typical signal waveforms for the linear
charger from the power-up to a recharge cycle. More
detailed Applications Information is given below.
Applications Information
Power on Reset (POR)
The ISL6292D resets itself as the input voltage rises above
the POR rising threshold. The V2P8 pin outputs a 2.8V
voltage, the internal oscillator starts to oscillate, the internal
timer is reset, and the charger begins to charge the battery.
The two indication pins, STAT1 and STAT2, indicate LOW.
Figure 4 illustrates the start up of the charger between t0 to
t2.
The ISL6292D has a typical rising POR threshold of 3.4V
and a falling POR threshold of 2.4V. The 2.4V falling
threshold guarantees charger operation with a currentlimited adapter to minimize the thermal dissipation.
Charge Cycle
A charge cycle consists of three charge modes: trickle mode,
constant current (CC) mode, and constant voltage (CV)
mode. The charge cycle always starts with the trickle mode
until the battery voltage stays above VMIN (2.8V typical) for
15 consecutive cycles of the internal oscillator. If the battery
voltage drops below VMIN during the 15 cycles, the 15-cycle
counter is reset and the charger stays in the trickle mode.
The charger moves to the CC mode after verifying the
battery voltage. As the battery-pack terminal voltage rises to
the final charge voltage VCH, the CV mode begins. The
terminal voltage is regulated at the constant VCH in the CV
mode and the charge current is expected to decline. After
the charge current drops below IMIN, the ISL6292D indicates
the end-of-charge (EOC) with the STAT1 or STAT2 pin and
terminates. Signals in a charge cycle are illustrated in
Figure 4 between points t2 to t5.
(EQ. 2)
where rDS(ON) is the resistance when the main MOSFET is
fully turned on. This power is typically much less than the
peak power in the traditional linear mode.
The worst power dissipation when using a current-limited
adapter typically occurs at the beginning of the CV mode, as
shown in Figure 3. The equation EQ.1 applies during the CV
mode. When using a very small PCB whose thermal
impedance is relatively large, it is possible that the internal
temperature can still reach the thermal foldback threshold. In
that case, the IC is thermally protected by lowering the
charge current, as shown with the dotted lines in the charge
current and power curves. Appropriate design of the adapter
can further reduce the peak power dissipation of the
ISL6292D. See the Application Information section for more
information.
VIN
POR Threshold
V2P8
Charge Cycle
Charge Cycle
STAT1
STAT2
15 Cycles to
1/8 TIMEOUT
VRECHRG
VBAT
15 Cycles
2.8V VMIN
IMIN
ICHARGE
t0
t1 t2 t3
t4
t5
t6 t7
FIGURE 4. OPERATION WAVEFORMS
8
t8
ISL6292D
The following events initiate a new charge cycle:
Disabling TIMEOUT Limit
• POR,
The TIMEOUT limit for the fast charge modes can be
disabled by pulling the TOEN pin to LOW or shorting it to
GND. When this happens, the charger becomes a currentlimited LDO (low-dropout) supply with its voltage regulated at
the final charge voltage VCH and the current limit determined
by the IREF pin. If the LDO load current drops below the
end-of-charge current (refer to End-of-Charge section), the
STAT1 and the STAT2 pin will indicate.
• a new battery being inserted (detected by TEMP pin),
• the battery voltage drops below a recharge threshold after
completing a charge cycle,
• recovery from an battery over-temperature fault,
• or, the EN pin is toggled from GND to floating.
Further description of these events are given later in this
data sheet.
Recharge
After a charge cycle completes, charging is prohibited until
the battery voltage drops to a recharge threshold, VRECHRG
(see Electrical Specifications). Then a new charge cycle
starts at point t6 and ends at point t8, as shown in Figure 4.
The safety timer is reset at t6.
Internal Oscillator
The internal oscillator establishes a timing reference. The
oscillation period is programmable with an external timing
capacitor, CTIME, as shown in Typical Applications. The
oscillator charges the timing capacitor to 1.5V and then
discharges it to 0.5V in one period, both with 10A current.
The period TOSC is:
6
T OSC = 0.2  10  C TIME
 sec onds 
(EQ. 3)
A 1nF capacitor results in a 0.2ms oscillation period. The
accuracy of the period is mainly dependent on the accuracy
of the capacitance and the internal current source.
Total Charge Time
The total charge time for the CC mode and CV mode is
limited to a length of TIMEOUT. A 22-stage binary counter
increments each oscillation period of the internal oscillator to
set the TIMEOUT. The TIMEOUT can be calculated as:
TIMEOUT = 2
22
C TIME
 T OSC = 14  -----------------1nF
 minutes 
(EQ. 4)
A 1nF capacitor leads to 14 minutes of TIMEOUT. For
example, a 15nF capacitor sets the TIMEOUT to be 3.5
hours. The charger has to reach the end-of-charge condition
before the TIMEOUT, otherwise, a TIMEOUT fault is issued.
The TIMEOUT fault latches up the charger. There are two
ways to release such a latch-up: either to recycle the input
power, or toggle the EN pin to disable the charger and then
enable it again.
The trickle mode charge has a time limit of 1/8 TIMEOUT. If
the battery voltage does not reach VMIN within this limit, a
TIMEOUT fault is issued and the charger latches up. The
charger stays in trickle mode for at least 15 cycles of the
internal oscillator and, at most, 1/8 of TIMEOUT, as shown in
Figure 4.
9
The trickle charge time limit, however, is not disabled even
when the TOEN pin is pulled to LOW. The charger operates
in the trickle mode at the beginning of a charge cycle even if
the TIMEOUT is disabled. Leaving the TOEN pin floating is
recommended to enable the TIMEOUT. Driving the TOEN
pin above 3.0V is not recommended.
Charge Current Programming
The charge current is programmed by the IREF pin. There
are three ways to program the charge current:
1. driving the IREF pin above 1.3V
2. driving the IREF pin below 0.4V,
3. or using the RIREF as shown in the Typical Applications.
The voltage of IREF is regulated to a 0.8V reference voltage
when not driven by any external source. The charging
current during the constant current mode is 100,000 times
that of the current in the RIREF resistor. Hence, depending
on how IREF pin is used, the charge current is,



I REF = 



500mA
5
0.8V
-----------------  10  A 
R IREF
100mA
V IREF  1.3V
R IREF
(EQ. 5)
V IREF  0.4V
The 500mA current is a guaranteed maximum value for
high-power USB port, with the typical value of 450mA. The
100mA current is also a guaranteed maximum value for the
low-power USB port. This design accommodates the USB
power specification.
The internal reference voltage at the IREF pin is capable of
sourcing less than 100A current. When pulling down the
IREF pin with a logic circuit, the logic circuit needs to be able
to sink at least 100A current.
When the adapter is current limited, it is recommended that
the reference current be programmed to at least 30% higher
than the adapter current limit (which equals the charge
current). In addition, the charge current should be at least
350mA so that the voltage difference between the VIN and
the VBAT pins is higher than 100mV. The 100mV is the
offset voltage of the input-output voltage comparator shown
in the block diagram.
ISL6292D
End-of-Charge (EOC) Current
2.8V Bias Voltage
The end-of-charge current IMIN sets the level at which the
charger indicates the end of the charge with the STAT1 and
STAT2 pins, as shown in Figure 4. The charger terminates at
this moment. The IMIN is set in two ways, by connecting a
resistor between the IMIN pin and ground, or by connecting
the IMIN pin to the V2P8 pin. When programming with the
resistor, the IMIN is set in the equation below.
The ISL6292D provides a 2.8V voltage for biasing the
internal control and logic circuit. This voltage is also
available for external circuits such as the NTC thermistor
circuit. The maximum allowed external load is 2mA.
V REF
4
0.8V
I MIN = 10000  ---------------- = ---------------- 10  A 
R IMIN R IMIN
(EQ. 6)
where RIMIN is the resistor connected between the IMIN pin
and the ground. When connected to the V2P8 pin, the IMIN
is set to 1/10 of IREF, except when the IREF pin is shorted to
GND. Under this exception, IMIN is 5mA.
NTC Thermistor
The ISL6292D uses two comparators (CP2 and CP3) to form
a window comparator, as shown in Figure 7. When the TEMP
pin voltage is “out of the window,” determined by the VTMIN
and VTMAX, the ISL6292D stops charging and indicates a
fault condition. When the temperature returns to the set range,
the charger re-starts a charge cycle. The two MOSFETs, Q1
and Q2, produce hysteresis for both upper and lower
thresholds. The temperature window is shown in Figure 6.
Charge Current Thermal Foldback
3.0V
Over-heating is always a concern in a linear charger. The
maximum power dissipation usually occurs at the beginning
of a charge cycle when the battery voltage is at its minimum
but the charge current is at its maximum. The charge current
thermal foldback function in the ISL6292D frees users from
the over-heating concern.
Figure 5 shows the current signals at the summing node of
the current error amplifier CA in the Block Diagram. IR is the
reference. IT is the current from the Temperature Monitoring
block. The IT has no impact on the charge current until the
internal temperature reaches approximately 100°C; then IT
rises at a rate of 1A/°C. When IT rises, the current control
loop forces the sensed current ISEN to reduce at the same
rate. As a mirrored current, the charge current is 100,000
times that of the sensed current and reduces at a rate of
100mA/°C. For a charger with the constant charge current
set at 1A, the charge current is reduced to zero when the
internal temperature rises to 110°C. The actual charge
current settles between 100°C to 110°C.
VTMIN (1.50V)
VTMIN(1.286V)
TEMP
Pin
Voltage
VTMAX+ (0.660V)
VTMAX (0.605V)
0V
Under
Temp
Over
Temp
FIGURE 6. CRITICAL VOLTAGE LEVELS FOR TEMP PIN
2.8V
V2P8
ISL6292D
R1
IR
Battery
Removal
CP1
-
VRMV
R2
+
IT
Under
Temp
CP2
-
RU
VTMIN
R3
+
To TEMP Pin
TEMP
ISEN
Q1
100OC
Temperature
FIGURE 5. CURRENT SIGNALS AT THE AMPLIFIER CA INPUT
Over
Temp
CP3 -
+
Usually the charge current should not drop below IMIN
because of the thermal foldback. For some extreme cases if
that does happen, the charger does not indicate end-ofcharge unless the battery voltage is already above the
recharge threshold.
10
RT
R4
VTMAX
Q2
R5
GND
FIGURE 7. THE INTERNAL AND EXTERNAL CIRCUIT FOR
THE NTC INTERFACE
ISL6292D
As the TEMP pin voltage rises from low and exceeds the
1.5V threshold (when the V2P8 pin is forced with a 3V bias),
the under temperature signal rises and does not clear until
the TEMP pin voltage falls below the 1.286V falling
threshold. Similarly, the over-temperature signal is given
when the TEMP pin voltage falls below the 0.605V threshold
and does not clear until the voltage rises above 0.66V. The
actual accuracy of the 3V bias is not important because all
the thresholds and the TEMP pin voltage are ratios
determined by the resistor dividers, as shown in Figure 7.
The NTC thermistor is required to have a resistance ratio of
3.96:1 at the low and the high temperature limits, that is,
R COLD
-------------------- = 3.96
R HOT
STATUS
STAT1
Temp
Fault
TIMEOUT
Fault
STAT2
CTIME
TIME
OSC
DFF1
DFF8 DFF9
(A)
(EQ. 7)
TIME
This is because at the low temperature limit, the TEMP pin
voltage is 1.5V, which is 1/2 of the 3V bias. Thus,
R COLD = R U
(EQ. 8)
where RU is the pull-up resistor as shown in Figure 7. On the
other hand, at the high temperature limit the TEMP pin
voltage is 0.605V, 20.17% of the 3V bias. Therefore,
R HOT
0.2017
---------------- = --------------------------1 – 0.2017
RU
(EQ. 9)
OSC
Output
DFF1
Output
DFF8
Output
DFF9
Output
(B)
FIGURE 9. EQUIVALENT CIRCUIT FOR THE STAT1/STAT2
INDICATION PINS AND KEY OPERATING
WAVEFORMS
For applications that do not need to monitor the battery
temperature, the NTC thermistor can be replaced with a
regular resistor of a half value of the pull up resistor RU.
Another option is to connect the TEMP pin to the IREF pin
that has a 0.8V output. With such connection, the IREF pin
can no longer be programmed with logic inputs.
When the charger senses a TEMP pin voltage that is 2.1V or
higher, it assumes that the battery is removed. The battery
removal detection circuit is also shown in Figure 7. When a
battery is removed, the charger is stopped. When a battery
is inserted again, a new charge cycle starts.
Battery Removal Detection
Indications
The ISL6292D assumes that the thermistor is co-packed
with the battery and is removed together with the battery.
The ISL6292D has three indication pins: V2P8, STAT1, and
STAT2. The input presence is indicated by the V2P8 pin.
Figure 8 shows the V2P8 pin voltage vs. the input voltage.
The equivalent circuit for the STAT1 and STAT2 pins are
shown in Figure 9. Both pins have ESD diodes to clamp the
pin voltage between ground and the input, as shown in the
Block Diagram. The STATUS block outputs a logic HIGH
when the charger is charging and a LOW whenever the
charger is not charging. When a fault case happens, the
charger stops charging, therefore, the STATUS block outputs
LOW. Depending on fault cause, either the eighth or the
ninth D-type flip-flop output is gated to the STAT1 pin. Both
flip-flop outputs are 50% duty ratio blinking signals. The
periods of the eighth and ninth flip-flop output are calculated
by the following equations:
3.4V
2.4V
VIN
2.8V
V2P8
8
(EQ. 10)
9
(EQ. 11)
T 8th = 2  T OSC = 256  T OSC
FIGURE 8. THE V2P8 PIN OUTPUT vs THE INPUT VOLTAGE
AT THE VIN PIN. VERTICAL: 1V/DIV,
HORIZONTAL: 100ms/DIV
11
T 9th = 2  T OSC = 512  T OSC
Table 1 and 2 summarize the LED indication driven by
STAT1 and STAT2 respectively.
ISL6292D
TABLE 1. SUMMARY OF CHARGE STATUS AND LED OUTPUT
STATUS
LED OUTPUT
Charging
On
Charge Completed or Disabled
OFF
Temperature Fault
Blinks at the speed of T9th
TIMEOUT Fault
Blinks at the speed of T8th
Shutdown
The ISL6292D can be shutdown by pulling the EN pin to
ground. When shut down, the charger draws typically less
than 30A current from the input power and the 2.8V output
at the V2P8 pin is also turned off. The EN pin needs be
driven with an open-drain or open-collector logic output, so
that the EN pin is floating when the charger is enabled.
Input and Output Capacitor Selection
TABLE 2. SUMMARY OF CHARGE STATUS AND LED OUTPUT
STATUS
LED OUTPUT
Charging
On
Charge Completed or Disabled
OFF
Fault
Blinks at the speed of T8th
Typically any type of capacitors can be used for the input
and the output. A 0.47F or higher value ceramic capacitor
for the input is recommended to be placed very close to the
input pin and the ground pin. Another 10F capacitance is
required to stabilize the input voltage. When the battery is
attached to the charger, the output capacitor can be any
ceramic type with the value higher than 0.1F. However, if
there is a chance the charger will be used as an LDO linear
regulator, a 10F tantalum capacitor is recommended.
Working with Current-Limited Adapter
The ISL6292D can work with a current-limited adapter to
significantly reduce the thermal dissipation during charging.
Refer to the ISL6292 datasheet, which can be found at
http://www.intersil.com, for more details.
Board Layout Recommendations
The ISL6292D internal thermal foldback function limits the
charge current when the internal temperature reaches
approximately 100°C. In order to maximize the current
capability, it is very important that the exposed pad under the
package is properly soldered to the board and is connected
to other layers through thermal vias. More thermal vias and
more copper attached to the exposed pad will result in better
thermal performance. On the other hand, the number of vias
is limited by the size of the pad. The exposed pads for the
4x4 QFN package is able to have 5 vias. Refer to the
ISL6292 evaluation boards for layout examples.
12
ISL6292D
Quad Flat No-Lead Plastic Package (QFN)
Micro Lead Frame Plastic Package (MLFP)
L16.4x4
16 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE
(COMPLIANT TO JEDEC MO-220-VGGC ISSUE C)
MILLIMETERS
SYMBOL
MIN
NOMINAL
MAX
NOTES
A
0.80
0.90
1.00
-
A1
-
-
0.05
-
A2
-
-
1.00
9
A3
b
0.20 REF
0.23
D
0.35
5, 8
4.00 BSC
D1
D2
0.28
9
-
3.75 BSC
1.95
2.10
9
2.25
7, 8
E
4.00 BSC
-
E1
3.75 BSC
9
E2
1.95
e
2.10
2.25
7, 8
0.65 BSC
-
k
0.25
-
-
-
L
0.50
0.60
0.75
8
L1
-
-
0.15
10
N
16
2
Nd
4
3
Ne
4
3
P
-
-
0.60
9

-
-
12
9
Rev. 5 5/04
NOTES:
1. Dimensioning and tolerancing conform to ASME Y14.5-1994.
2. N is the number of terminals.
3. Nd and Ne refer to the number of terminals on each D and E.
4. All dimensions are in millimeters. Angles are in degrees.
5. Dimension b applies to the metallized terminal and is measured
between 0.15mm and 0.30mm from the terminal tip.
6. The configuration of the pin #1 identifier is optional, but must be
located within the zone indicated. The pin #1 identifier may be
either a mold or mark feature.
7. Dimensions D2 and E2 are for the exposed pads which provide
improved electrical and thermal performance.
8. Nominal dimensions are provided to assist with PCB Land Pattern
Design efforts, see Intersil Technical Brief TB389.
9. Features and dimensions A2, A3, D1, E1, P &  are present when
Anvil singulation method is used and not present for saw
singulation.
10. Depending on the method of lead termination at the edge of the
package, a maximum 0.15mm pull back (L1) maybe present. L
minus L1 to be equal to or greater than 0.3mm.
13
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