ISL6293EVAL1 Evaluation Board Application Manual ® Application Note September 7, 2005 AN1065.1 Description Features The ISL6293EVAL1 is an evaluation tool for the ISL6293 dual-input, single-cell Li-ion battery charger. The evaluation tool provides a complete evaluation platform addressing all datasheet specifications and functionalities. The jumpers on the board facilitate the programming of the charge current, different charging conditions, and can be used to make other necessary connections, such as current measurement. • A Complete Evaluation Platform for ISL6293 Charger The ISL6293 is a fully integrated single-cell Li-ion battery charger that accepts two input sources: one from a USB port and the other from a desktop cradle. Since the cradle input is rated for 28V maximum input voltage, the components associated with the cradle input on the evaluation board are good for a 28V supply. The charger’s USB input and the associated components on the evaluation board are good for a 5V input. • Convenient Jumpers for Programming the Charge Current, Charge Mode, and for Current Measurement The components assembled in the center square constitute a complete charger, suggesting the space saving advantage of the typical ISL6293 assembly in space-limited applications. ISL6293EVAL1 • Cradle Input Accepts Voltage up to 28V • Flexible Power Connectors Each with a Hook and a Solder Pad Providing Variety to Users • Exposed Solder Pads Connected to CHG, ICDL, USBP, IUSB and PPR, and EN Pins Accommodating Extra Connections to those Pins • 3.5x2.5 Square Inches Board Size Handy for Evaluation • USB Port On Board Accepts Power Directly From USB Cable • Eight Thermal Vias in the Thermal Pad Similar to Customers’ Thermally Enhanced Environment Pinout Ordering Information PART NUMBER • The Center Square Suggesting the Space Saving Advantage of the Typical Components Assembly ISL6293 (DFN) TOP VIEW DESCRIPTION Evaluation Board for ISL6293 1 CRDL 1 10 BAT USB 2 9 ICDL PPR 3 8 GND CHG 4 7 USBP EN 5 6 IUSB CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2002, 2005. All Rights Reserved All other trademarks mentioned are the property of their respective owners. Application Note 1065 What Is Needed The following instruments will be needed to perform testing: • Power supplies: 1) PS1: DC 30V/5A 2) PS2: DC 20V/5A • DC Electronic load: 20V/5A • Multimeters • Function generator • Oscilloscope • Cables and wires Quick Setup Guide (Refer to Figure 1) DO NOT APPLY POWER UNTIL STEP 5 For Cradle Input: For USB Input: Step 1: Connect a 5V supply PS1 to CRDL with the current limit set at 1.3A Step 1: Connect a 5V supply PS1 to USB with the current limit set at 0.7A Step 2: Connect a 3.7V supply PS2 to VBAT with the current limit set at 1.3A Step 2: Connect a 3.7V supply PS2 to VBAT with the current limit set at 0.7A Step 3: Connect the DC electronic load of 1.2A to BAT Step 3: Connect the DC electronic load of 0.6A to BAT Step 4: Verify that no jumper shunt is inserted Step 4: Insert a jumper to USBP = HIGH Step 5: Turn on power supplies and DC electronic load Step 5: Turn on power supplies and DC electronic load Step 6: The green LED should be on, indicating normal charging operation Step 6: The green LED should be on, indicating normal charging operation Step 7: The red LED should be on, indicating input power-on Step 7: The red LED should be on, indicating input power-on Step 8: The current meter I2 in series with PS2 should read about 0.33A as the charging current Step 8: The current meter I2 in series with PS2 should read about 0.45A as the charging current Step 9: Insert a jumper shunt on JP3 and the current meter I2 should read about 0.67A Step 10: Insert a jumper shunt on both JP3 and JP4 and the current meter I2 should read 1.1A 2 AN1065.1 September 7, 2005 Application Note 1065 I2 I1 PS1 PS2 - + + - + E-load FIGURE 1. CONNECTION OF INSTRUMENTS Detailed Description The ISL6293EVAL1 is a complete evaluation platform addressing all datasheet specifications and functionalities. The jumpers on the board facilitate the programming of the charge current, different charging conditions, and can be used to make other necessary connections, such as current measurement. Jumpers: JP1 - Connects the USB connector to the USB pin on the charger. A shunt must be installed if a real USB connector input is being used. To measure the USB input current, a current meter can replace the shunt. JP2 - Can connect the USBP to HIGH (BAT pin) or GND. If there is no shunt installed on JP2, the USBP pin is internally pulled down to logic LOW for a low-power mode USB port, where the USB charge current is maximum 100mA. If a shunt is installed across USBP = GND, USBP is driven to logic LOW, same as floating. If the shunt is installed across USBP = HIGH, with a battery of 2V or higher present on BAT pin, the USBP pin is driven to logic HIGH, which sets the USB input port in the high-power mode where the maximum USB charge current is 500mA. JP3 - Connects an additional 4.2K resistor to the ICDL pin, such that the Cradle charge current will be increased by 0.33A. 3 JP4 - Connects an additional 4.2K resistor to the ICDL pin, such that the Cradle charge current will be increased by 0.33A. JP5 - Can connect the EN pin to HIGH (BAT) or GND. If there is no shunt installed on JP2, the EN pin is internally pulled down to logic LOW, which enables the charger. If a shunt is installed across EN = GND, the EN pin is driven to logic LOW, the charger is enabled, same as floating. If the shunt is installed across EN=HIGH, with a battery of 2V or higher present on BAT pin, the EN pin is driven to logic HIGH, which disables the charger. TABLE 1. JUMPER SETTINGS JUMPER JP1 POSITION FUNCTION Shunt installed USB port connected to USB pin USB = HIGH USB high-power mode USB = GND USB low-power mode Shunt not installed USB low-power mode JP3 Shunt installed Add 0.33A to charging current JP4 Shunt installed Add 0.33A to charging current EN = HIGH Charger disabled EN = GND Charger enabled Shunt not installed Charger enabled JP2 JP5 AN1065.1 September 7, 2005 Application Note 1065 Board Layout Information Schematic of PCB Board USB GND1 CRDL GND2 J1 1 2 3 4 2 JP1 1 JUMPER USB_CONN Type B C1 4.7uF Green LED D1 C2 4.7uF D2 V_BAT R4 R5 4.5k JP3 80k JP5 R6 4.5k 2 ISL6293 10 9 8 7 6 JP4 J U M PE R CRDL BAT USB ICDL PPR GND CHG USBP EN IUSB 1 1 2 3 4 5 JP2 3 2 1 U1 C6 10uF 2 R2 499 C5 1uF J U M PE R R1 499 GND3 2.54mm Header/3 CKT C3 0.47uF C4 0.47uF 1 Red LED R7 4.5k 1 2 3 2.54mm Header/3 CKT FIGURE 2. BOARD LAYOUT INFORMATION SCHEMATIC 4 AN1065.1 September 7, 2005 Application Note 1065 TABLE 2. ISL6293EVAL1 BILL OF MATERIALS (BOM) ITEM QTY REFERENCE 1 1 U1 2 2 3 PART DESCRIPTION PCB FOOTPRINT PART NUMBER ISL6293 Charger DFN R1, R2 0805, 499Ω, 1% Resistor 0805 1 R4 0402, 4.22K, 1% Resistor 0402 P4.22KLCT-ND Digikey 4 1 R5 0402, 80K,1% Resistor 0402 P80.6KLCT-ND Digikey 5 2 R6, R7 0805, 4.22K, 1% Resistor 0805 P4.22KCCT-ND Digikey 6 1 C1 4.7µF, 6.3V, X7R Ceramic 0805 C2012X7R0J475K TDK 7 1 C2 4.7µF, 50V, X7R Ceramic 1812 C4532X7R1H475K TDK 8 1 C3 0.47µF, 50V, X7R Ceramic 0603 C1608X7R1H474K TDK 9 1 C4 0.47µF, 6.3V, X7R Ceramic 0603 C1608X7R0J474K TDK 10 1 C5 4.7µF, 6.3V, X7R Ceramic 0603 C1608X7R0J475K 11 1 C6 10µF, 6.3V, Tantalum 0805 P11337CT-ND Digikey 12 3 USB, CRDL, BAT Test point, Red 5000K-ND Digikey 13 3 GND1, GND2, GND3 Test point, Black 5001K-ND Digikey 14 3 JP1, JP3, JP4 2.54mm header, 2ckt WM6402-ND Digikey 15 2 JP2, JP5 2.54mm header, 3ckt WM6403-ND Digikey 16 1 J1 Type B, Female USB Type B 787780-1-ND Digikey 17 1 D1 Red LED 0805 67-1552-1-ND Digikey 18 1 D2 Green LED 0805 67-1553-1-ND Digikey 5 ISL6293 VENDOR Intersil Various AN1065.1 September 7, 2005 Application Note 1065 PCB Layout SILK LAYER TOP LAYER 6 AN1065.1 September 7, 2005 Application Note 1065 BOTTOM LAYER Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that the Application Note or Technical Brief is current before proceeding. For information regarding Intersil Corporation and its products, see www.intersil.com 7 AN1065.1 September 7, 2005