DATASHEET

ISL6294A
SIGNS
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December 11, 2008
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1-88
FN6821.2
High Input Voltage Charger
Features
The ISL6294A is a cost-effective, fully integrated high input
voltage single-cell Li-ion battery charger. The charger uses a
CC/CV charge profile required by Li-ion batteries. The
charger accepts an input voltage up to 28V but is disabled
when the input voltage exceeds the OVP threshold, typically
7.3V, to prevent excessive power dissipation. The 28V rating
eliminates the overvoltage protection circuit required in a low
input voltage charger.
• Complete Charger for Single-Cell Li-ion/Polymer Batteries
The charge current and the end-of-charge (EOC) current are
programmable with external resistors. When the battery
voltage is lower than typically 2.55V, the charger
preconditions the battery with typically 20% of the
programmed charge current. When the charge current
reduces to the programmable EOC current level during the
CV charge phase, an EOC indication is provided by the CHG
pin, which is an open-drain output. An internal thermal
foldback function protects the charger from any thermal
failure.
• Programmable End-of-Charge Current
Two indication pins (PPR and CHG) allow simple interface to
a microprocessor or LEDs. When no adapter is attached or
when disabled, the charger draws less than 1µA leakage
current from the battery.
• Ambient Temperature Range: -40°C to +85°C
Ordering Information
Applications
PART
NUMBER
(Note)
PART
MARKING
ISL6294AIRZ-T* 94A
TEMP.
RANGE
(°C)
-40 to +85
• No External Blocking Diode Required
• Low Component Count and Cost
• 1% Voltage Accuracy
• Programmable Charge Current
• Charge Current Thermal Foldback for Thermal
Protection
• Trickle Charge for Fully Discharged Batteries
• 28V Maximum Voltage for the Power Input
• Power Presence and Charge Indications
• Less Than 1µA Leakage Current off the Battery When No
Input Power Attached or Charger Disabled
• 8 Ld 2x3 DFN Package
• Pb-Free (RoHS Compliant)
• Mobile Phones
PACKAGE
(Pb-Free)
PKG.
DWG. #
8 Ld 2x3 DFN L8.2x3
*Please refer to TB347 for details on reel specifications.
NOTE: These Intersil Pb-free plastic packaged products employ
special Pb-free material sets, molding compounds/die attach
materials, and 100% matte tin plate plus anneal (e3 termination finish,
which is RoHS compliant and compatible with both SnPb and Pb-free
soldering operations). Intersil Pb-free products are MSL classified at
Pb-free peak reflow temperatures that meet or exceed the Pb-free
requirements of IPC/JEDEC J STD-020.
1
• Integrated Pass Element and Current Sensor
• Blue-Tooth Devices
• PDAs
• MP3 Players
• Stand-Alone Chargers
• Other Handheld Devices
Pinout
ISL6294A
(8 LD DFN)
TOP VIEW
VIN
1
8 BAT
PPR
2
7 IREF
CHG
3
6 IMIN
EN
4
5 GND
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2008. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
ISL6294A
Absolute Maximum Ratings (Reference to GND)
Thermal Information
VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 30V
IMIN, IREF, BAT, CHG, EN, PPR . . . . . . . . . . . . . . . . . . . -0.3V to 7V
Thermal Resistance
JA (°C/W)
JC (°C/W)
DFN Package (Notes 1, 2) . . . . . . . . . .
59
4.5
Maximum Junction Temperature (Plastic Package) . . . . . . . +150°C
Maximum Storage Temperature Range . . . . . . . . . .-65°C to +150°C
Pb-Free Reflow Profile. . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Recommended Operating Conditions
Ambient Temperature Range . . . . . . . . . . . . . . . . . . . .-40°C to 85°C
Maximum Supply Voltage (VIN Pin). . . . . . . . . . . . . . . . . . . . . . 28V
Operating Supply Voltage (VIN Pin). . . . . . . . . . . . . . . . 4.5V to 6.5V
Programmed Charge Current . . . . . . . . . . . . . . . . 100mA to 900mA
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTES:
1. JA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See
Tech Brief TB379.
2. For JC, the “case temp” location is the center of the exposed metal pad on the package underside.
Electrical Specifications
Typical Values Are Tested at VIN = 5V and the TA at +25°C.
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
3.3
3.9
4.3
V
2.7
3.4
3.6
V
-
90
150
mV
10
50
-
mV
6.9
7.3
7.7
V
100
240
400
mV
Charger disabled or the input is floating
VBAT = 4.2V
-
-
1.0
µA
POWER-ON RESET
Rising POR Threshold
VPOR
Falling POR Threshold
VPOR
VBAT = 3.0V, use PPR to indicate the
comparator output.
VIN-BAT OFFSET VOLTAGE
Rising Edge
VOS
Falling Edge
VOS
VBAT = 4.0V, use CHG pin to indicate the
comparator output (Note 3)
OVERVOLTAGE PROTECTION
Overvoltage Protection Threshold
VOVP
OVP Threshold Hysteresis
(Note 4)
Use PPR to indicate the comparator output
STANDBY CURRENT
BAT Pin Sink Current
ISTANDBY
VIN Pin Supply Current
IVIN
Charger disabled
-
350
600
µA
VIN Pin Supply Current
IVIN
Charger enabled
-
500
800
µA
VCH
Charge current = 20mA
4.158
4.20
4.242
V
-
0.6
-

VOLTAGE REGULATION
Output Voltage
PMOS ON-Resistance
rDS(ON)
VIN = 4.1V, charge current = 0.3A
CHARGE CURRENT (Note 5)
IREF Pin Output Voltage
IIREF
VBAT = 3.8V
1.18
1.22
1.26
V
Constant Charge Current
ICHG
VIN = 5V, RIREF = 24.3k, VBAT = 2.8V to 4.0V
450
500
550
mA
Trickle Charge Current
ITRK
VIN = 5V, RIREF = 24.3k, VBAT = 2.4V
70
95
130
mA
End-of-Charge Current
IMIN
VIN = 5V, RIMIN = 243k
33
45
57
mA
VIN = 5V, RIMIN = 243k
325
380
415
mA
VMIN
2.45
2.55
2.65
V
VMINHYS
-
250
-
mV
TFOLD
100
115
130
°C
EOC Rising Threshold
PRECONDITIONING CHARGE THRESHOLD
Preconditioning Charge Threshold Voltage
Preconditioning Voltage Hysteresis
INTERNAL TEMPERATURE MONITORING
Charge Current Foldback Threshold
(Note 6)
2
FN6821.2
December 11, 2008
ISL6294A
Electrical Specifications
Typical Values Are Tested at VIN = 5V and the TA at +25°C. (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
EN Pin Logic Input High
1.3
-
-
V
EN Pin Logic Input Low
-
-
0.5
V
100
200
400
k
10
20
-
mA
-
-
1
µA
10
20
-
mA
-
-
1
µA
LOGIC INPUT AND OUTPUTS
EN Pin Internal Pull-Down Resistance
CHG Sink Current when LOW
Pin Voltage = 1V
CHG Leakage Current when HIGH
VCHG = 6.5V
PPR Sink Current when LOW
Pin Voltage = 1V
PPR Leakage Current when HIGH
VPPR 6 = 6.5V
NOTES:
3. The 4.0V VBAT is selected so that the CHG output can be used as the indication for the offset comparator output indication. If the VBAT is lower
than the POR threshold, no output pin can be used for indication.
4. For junction temperature below +100°C.
5. The charge current can be affected by the thermal foldback function if the IC under the test setup cannot dissipate the heat.
6. Limits should be considered typical and are not production tested.
Pin Descriptions
VIN - Power input. The absolute maximum input voltage is
28V. A 0.47µF or larger value X5R ceramic capacitor is
recommended to be placed very close to the input pin for
decoupling purpose. Additional capacitance may be required
to provide a stable input voltage.
PPR - Open-drain power presence indication. The
open-drain MOSFET turns on when the input voltage is
above the POR threshold but below the OVP threshold and
off otherwise. This pin is capable to sink 10mA (minimum)
current to drive an LED. The maximum voltage rating for this
pin is 7V. This pin is independent of the EN pin input.
CHG - Open-drain charge indication pin. This pin outputs a
logic LOW when a charge cycle starts and turns to HIGH
when the end-of-charge (EOC) condition is qualified. This
pin is capable to sink 10mA minimum current to drive an
LED. When the charger is disabled, the CHG outputs high
impedance.
EN - Enable input. This is a logic input pin to disable or
enable the charger. Drive to HIGH to disable the charger.
When this pin is driven to LOW or left floating, the charger is
enabled. This pin has an internal 200k pull-down resistor.
programmed to less than 5% or 10mA, the stability is not
guaranteed.
IREF - Charge-current program and monitoring pin. Connect
a resistor between this pin and the GND pin to set the
charge current limit determined by Equation 2:
12089
I REF = ----------------R IREF
 mA 
(EQ. 2)
Where RIREF is in k. The IREF pin voltage also monitors
the actual charge current during the entire charge cycle,
including the trickle, constant-current, and constant-voltage
phases. When disabled, VIREF = 0V.
BAT - Charger output pin. Connect this pin to the battery. A
1µF or larger X5R ceramic capacitor is recommended for
decoupling and stability purposes. When the EN pin is pulled
to logic HIGH, the BAT output is disabled.
EPAD - Exposed pad. Connect as much as possible copper
to this pad either on the component layer or other layers
through thermal vias to enhance the thermal performance.
GND - System ground.
IMIN - End-of-charge (EOC) current program pin. Connect a
resistor between this pin and the GND pin to set the EOC
current. The EOC current IMIN can be programmed by
Equation 1:
11000
I MIN = ---------------R IMIN
 mA 
(EQ. 1)
Where RIMIN is in k. The programmable range covers 5%
(or 10mA, whichever is higher) to 50% of IREF. When
3
FN6821.2
December 11, 2008
ISL6294A
Typical Applications
TO BATTERY
TO INPUT
BAT
VIN
RIREF
C1
IREF
IMIN
RIMIN
R1
R2
D1
D2
C2
ISL6294A
CHG
OFF
PPR
EN
GND
ON
FIGURE 1. TYPICAL APPLICATION CIRCUIT INTERFACING TO INDICATION LEDs
TABLE 1. COMPONENT DESCRIPTION FOR FIGURE 1
PART
TABLE 2. COMPONENT DESCRIPTION FOR FIGURE 2
DESCRIPTION
PART
DESCRIPTION
C1
1µF X5R ceramic capacitor
C1
1µF X5R ceramic capacitor
C2
1µF X5R ceramic capacitor
C2
1µF X5R ceramic capacitor
RIREF
24.3k, 1%, for 500mA charge current
RIREF
24.3k, 1%, for 500mA charge current
RIMIN
243k, 1%, for 45mA EOC current
RIMIN
243k, 1%, for 45mA EOC current
R1, R2
300, 5%
R1, R2
100k, 5%
D1, D2
LEDs for indication
TO BATTERY
TO INPUT
BAT
VIN
RIREF
C1
IREF
C2
IMIN
RIMIN
VCC
ISL6294A
OFF
EN
R1
CHG
GND
PPR
R2
TO MCU
ON
FIGURE 2. TYPICAL APPLICATION CIRCUIT WITH THE INDICATION SIGNALS INTERFACING TO A MCU
4
FN6821.2
December 11, 2008
ISL6294A
BAT
VIN
VOS
VREF
PRE
REG
POR
+
+
BAT
-
VCC
+
PPR
VREF
CHARGE
CONTROL
EN
200k
VCC
EN
-
DIE
TEMP
+
GND
+115°C
IMIN
CHG
IREF
FIGURE 3. BLOCK DIAGRAM
TRICKLE
CC
CV
4.2V
IREF
CHARGE
VOLTAGE
76%I REF
CHARGE
CURRENT
2.55V
IMIN
19%IREF
CHG
CHG
INDICATION
FIGURE 4. TYPICAL CHARGE PROFILE
TIME
Description
The ISL6294A charges a Li-ion battery using a CC/CV
profile. The constant current IREF is set with the external
resistor RIREF (see Figure 1) and the constant voltage is
fixed at 4.2V. If the battery voltage is below a typical 2.55V
trickle-charge threshold, the ISL6294A charges the battery
with a trickle current of 19% of IREF until the battery voltage
rises above the trickle charge threshold. Fast charge CC
mode is maintained at the rate determined by programming
IREF until the cell voltage rises to 4.2V. When the battery
5
voltage reaches 4.2V, the charger enters a CV mode and
regulates the battery voltage at 4.2V to fully charge the
battery without the risk of over charge. Upon reaching an
end-of-charge (EOC) current, the charger indicates the
charge completion with the CHG pin, but the charger
continues to output the 4.2V voltage. Figure 4 shows the
typical charge waveforms after the power is on.
The EOC current level IMIN is programmable with the
external resistor RIMIN (see Figure 1). The CHG signal turns
FN6821.2
December 11, 2008
ISL6294A
to LOW when the trickle charge starts and rises to HIGH at
the EOC. After the EOC is reached, the charge current has
to rise to typically 76% IREF for the CHG signal to turn on
again, as shown in Figure 4. The current surge after EOC
can be caused by a load connected to the battery.
A thermal foldback function reduces the charge current
anytime when the die temperature reaches typically +115°C.
This function guarantees safe operation when the
printed-circuit board (PCB) is not capable of dissipating the
heat generated by the linear charger. The ISL6294A accepts
an input voltage up to 28V but disables charging when the
input voltage exceeds the OVP threshold, typically 7.3V, to
protect against unqualified or faulty AC adapters.
CHG Indication
The CHG is an open-drain output capable to at least 10mA
current when the charger starts to charge and turns off when
the EOC current is reached. The CHG signal is interfaced
either with a microprocessor GPIO or an LED for indication.
EN Input
EN is an active-low logic input to enable the charger. Drive
the EN pin to LOW or leave it floating to enable the charger.
This pin has a 200k internal pull-down resistor so when left
floating, the input is equivalent to logic LOW. Drive this pin to
HIGH to disable the charger. The threshold for HIGH is given
in the “Electrical Specifications” table on page 2.
IREF Pin
PPR Indication
The PPR pin is an open-drain output to indicate the
presence of the AC adapter. Whenever the input voltage is
higher than the POR threshold, the PPR pin turns on the
internal open-drain MOSFET to indicate a logic LOW signal,
independent on the EN-pin input. When the internal
open-drain FET is turned off, the PPR pin should leak less
than 1µA current. When turned on, the PPR pin should be
able to sink at least 10mA current under all operating
conditions.
The IREF pin has the two functions as described in the “Pin
Descriptions” on page 3. When setting the fast charge
current, the charge current is guaranteed to have 10%
accuracy with the charge current set at 500mA. When
monitoring the charge current, the accuracy of the IREF pin
voltage vs the actual charge current has the same accuracy
as the gain from the IREF pin current to the actual charge
current. The accuracy is 10% at 500mA and is expected to
drop to 30% of the actual current (not the set constant
charge current) when the current drops to 50mA.
The PPR pin can be used to drive an LED (see Figure 1) or
to interface with a microprocessor.
Operation Without the Battery
Power-Good Range
The power-good range is defined by the following three
conditions:
1. VIN > VPOR
2. VIN - VBAT > VOS
The ISL6294A relies on a battery for stability and is not
guaranteed to be stable if the battery is not connected. With
a battery, the charger will be stable with an output ceramic
decoupling capacitor in the range of 1µF to 200µF. The
maximum load current is limited by the dropout voltage or
the thermal foldback.
Dropout Voltage
3. VIN < VOVP
where the VOS is the offset voltage for the input and output
voltage comparator, discussed shortly, and the VOVP is the
overvoltage protection threshold given in the “Electrical
Specifications” table on page 2. All VPOR, VOS, and VOVP
have hysteresis, as given in the “Electrical Specifications”
table on page 2. The charger will not charge the battery if the
input voltage is not in the power-good range.
Input and Output Comparator
The charger will not be enabled unless the input voltage is
higher than the battery voltage by an offset voltage VOS.
The purpose of this comparator is to ensure that the charger
is turned off when the input power is removed from the
charger. Without this comparator, it is possible that the
charger will fail to power-down when the input is removed
and the current can leak through the PFET pass element to
continue biasing the POR and the Pre-Regulator blocks, as
shown in Figure 3.
6
The constant current may not be maintained due to the
rDS(ON) limit at a low input voltage. The worst case
ON-resistance of the pass FET is 1.2 the maximum
operating temperature, thus if tested with 0.5A current and
3.8V battery voltage, constant current could not be
maintained when the input voltage is below 4.4V.
Thermal Foldback
The thermal foldback function starts to reduce the charge
current when the internal temperature reaches a typical
value of +115°C.
Applications Information
Input Capacitor Selection
The input capacitor is required to suppress the power supply
transient response during transitions. Mainly this capacitor is
selected to avoid oscillation during the start-up when the
input supply is passing the POR threshold and the VIN-VBAT
comparator offset voltage. When the battery voltage is above
the POR threshold, the VIN-VBAT offset voltage dominates
FN6821.2
December 11, 2008
ISL6294A
the hysteresis value. Typically, a 1µF X5R ceramic capacitor
should be sufficient to suppress the power supply noise.
rON
LIMITED
Charge Current Limit
The actual charge current in the CC mode is limited by
several factors in addition to the set IREF. Figure 5 shows
three limits for the charge current in the CC mode. The
charge current is limited by the ON-resistance of the pass
element (power P-Channel MOSFET) if the input and the
output voltage are too close to each other. The solid curve
shows a typical case when the battery voltage is 4.0V and
the charge current is set to 700mA. The non-linearity on the
rON-limited region is due to the increased resistance at
higher die temperature. If the battery voltage increases to
higher than 4.0V, the entire curve moves towards the right
side. As the input voltage increases, the charge current may
be reduced due to the thermal foldback function. The limit
caused by the thermal limit is dependent on the thermal
impedance. As the thermal impedance increases, the
thermal-limited curve moves towards the left, as shown in
Figure 5.
CHARGE CURRENT (mA)
Output Capacitor Selection
The criteria for selecting the output capacitor is to maintain
the stability of the charger as well as to bypass any transient
load current. The minimum capacitance is a 1µF X5R
ceramic capacitor. The actual capacitance connected to the
output is dependent on the actual application requirement.
THERMAL
LIMITED
700
RIREF
INCREASES
JA OR TA
INCREASES
VBAT
INCREASES
4.0
4.5
5.0
5.5
6.0
6.5
INPUT VOLTAGE (V)
FIGURE 5. CHARGE CURRENT LIMITS IN THE CC MODE
Layout Guidance
The ISL6294A uses a thermally-enhanced DFN package
that has an exposed thermal pad at the bottom side of the
package. The layout should connect as much as possible to
copper on the exposed pad. Typically the component layer is
more effective in dissipating heat. The thermal impedance
can be further reduced by using other layers of copper
connecting to the exposed pad through a thermal via array.
Each thermal via is recommended to have 0.3mm diameter
and 1mm distance from other thermal vias.
Input Power Sources
The input power source is typically a well-regulated wall
cube with 1-meter length wire or a USB port. The input
voltage ranges from 4.25V to 6.5V under full-load and
unloaded conditions. The ISL6294A can withstand up to 28V
on the input without damaging the IC. If the input voltage is
higher than typically 7.3V, the charger stops charging.
7
FN6821.2
December 11, 2008
ISL6294A
Dual Flat No-Lead Plastic Package (DFN)
L8.2x3
2X
8 LEAD DUAL FLAT NO-LEAD PLASTIC PACKAGE
0.15 C A
A
D
2X
0.15 C B
E
MILLIMETERS
SYMBOL
MIN
A
0.80
A1
-
6
A3
INDEX
AREA
b
TOP VIEW
D2
//
0.10
A
SIDE VIEW
C
SEATING
PLANE
D2
(DATUM B)
C
0.08 C
0.20
A3
7
8
0.90
1.00
-
-
0.05
-
0.25
0.32
1
5,8
1.50
1.65
1.75
7,8
3.00 BSC
1.65
e
1.80
1.90
7,8
0.50 BSC
-
k
0.20
-
-
-
L
0.30
0.40
0.50
8
N
8
Nd
4
D2/2
6
INDEX
AREA
NOTES
2.00 BSC
E
E2
MAX
0.20 REF
D
B
NOMINAL
2
3
Rev. 0 6/04
2
NX k
NOTES:
1. Dimensioning and tolerancing conform to ASME Y14.5-1994.
2. N is the number of terminals.
3. Nd refers to the number of terminals on D.
(DATUM A)
E2
4. All dimensions are in millimeters. Angles are in degrees.
E2/2
5. Dimension b applies to the metallized terminal and is measured
between 0.25mm and 0.30mm from the terminal tip.
NX L
N N-1
NX b
e
8
6. The configuration of the pin #1 identifier is optional, but must be
located within the zone indicated. The pin #1 identifier may be
either a mold or mark feature.
5
0.10
(Nd-1)Xe
REF.
M C A B
7. Dimensions D2 and E2 are for the exposed pads which provide
improved electrical and thermal performance.
8. Nominal dimensions are provided to assist with PCB Land
Pattern Design efforts, see Intersil Technical Brief TB389.
BOTTOM VIEW
CL
(A1)
NX (b)
L
5
SECTION "C-C"
C C
e
TERMINAL TIP
FOR EVEN TERMINAL/SIDE
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9001 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
8
FN6821.2
December 11, 2008
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