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1-888-IN
InfiniBand +12V Bulk and +5V Auxiliary
Power Controller
The ISL6160 is designed to address the unique power
requirements of the InfiniBand (IB) industry initiative
providing independent power control of both the VB(bulk)
(+12V) and the VA(auxiliary) (+5V) power rails for a single
port. This device can be implemented in both IB Class I (non
isolated) and Class II (isolated) Power Topology
applications.
The ISL6160, along with an N-Channel power MOSFET and
a minimal number of passive components provides soft
starting ramps of both the VB and VA voltages for an IB
module. It also provides accurate and consistent current
regulated outputs for a determined period of time before
latch-off in the presence of overcurrent (OC) conditions.
In addition the ISL6160 provides the enable signal to the on
module DC-DC converter either upon module insertion to
chassis or from a wake event request.
See Figure 1 for typical application usage.
FN9028.1
Features
• VB Programmable Overcurrent Protection Regulation
Level for 25W and 50W Ports
• Internal Charge Pump Allows the Use of an N-Channel
MOSFET for VB Control
• VB Adjustable Turn-On Ramp
• Soft Start Overcurrent Protection During Turn-On
• Two Levels of VB Overcurrent Detection and Protection
• VA and VB Undervoltage Lock-Outs
• 0.125 Integrated Power N-Channel MOSFET VA Switch
• Accurate VA Current Sensing and Limiting (1A)
• Timed Current Regulation Period (VB Optional)
• VA Controlled Turn-On Ramp Time
• 1s Response Time to VB Secondary Rail Dead Short
• Pb-free available
• InfiniBand VB and VA Voltage Control
TEMP. RANGE
(oC)
PACKAGE
PKG. DWG.
#
• -48V and 5V Telecom
Pinout
ISL6160CB
-40 to 85
14 Ld SOIC
M14.15
ISL6160CBZA
(See Note)
-40 to 85
14 Ld SOIC
(Pb-free)
M14.15
ISL6160EVAL2
July 2004
Applications
Ordering Information
PART NUMBER
ISL6160
ISL6160
(14 LEAD SOIC)
TOP VIEW
IB Class I Power Topology Evaluation Platform
*Add “-T” suffix to part number for tape and reel packaging.
NOTE: Intersil Pb-free products employ special Pb-free material sets; molding
compounds/die attach materials and 100% matte tin plate termination finish, which
is compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free
products are MSL classified at Pb-free peak reflow temperatures that meet or
exceed the Pb-free requirements of IPC/JEDEC J Std-020B.
VB SECONDARY RAIL TO DC-DC
DC-DC EN
ISET
ISEN
GATE
CTIM
VA_FLTn
VB_IN
+
1
14 VB_ON
ISEN
2
13 DC-DC ENABLE
GATE
3
12 CTIM
VB_Ret
4
11 VB_IN
VA_Ret
5
10 VA_FLTn
VA_IN 6
TO DC-DC
VA_ENn
VBxEN_L
VB_ON
ISET
7
9
VA_OUT
8
NC
LOCAL PWR EN
(OPT.)
(OPT.)
VA_ENn
VB_Ret
VA_IN
VA_Ret
VA_Out
+ VA(ux)
VB(ulk)
FIGURE 1. TYPICAL APPLICATION USAGE
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2001, 2004. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
ISL6160
Simplified Block Diagram
VB
+
-
POR
+
ISET
-
QN
8V
R
R
Q
UV
VB_ON
S
+
+
-
VREF
ENABLE
12V
ISEN
DC-DC EN
20A
CLIM
OC
+
-
GATE
FALLING
EDGE
DELAY
10A
7.5K
-
-
+
ENABLE
VB_RET
+
1.86V
WOCLIM
18V
CTIM
+
-
20A
RISING
EDGE
PULSE
18V
VA_RET
VB_IN
VA_FLTn
Q-PUMP
POR
VA_IN
VA CURRENT AND TEMP.
MONITORING, GATE AND
OUTPUT CONTROL
LOGIC
VA_ENn
VA_OUT
NC
2
FN9028.1
July 2004
ISL6160
Pin Descriptions
PIN NO.
DESIGNATOR
FUNCTION
1
ISET
Current Set
Connect to the low side of the current sense resistor through the current limiting set resistor.
This pin functions as the current regulation level voltage programming pin.
CR Vth = RISET X 20A
2
ISEN
Current Sense
Connect to the more positive end of sense resistor to measure the voltage drop across this
resistor.
3
GATE
External FET Gate
Drive Pin
Connect to the gate of the external N-Channel MOSFET. A capacitor from this node to
ground sets the turn-on ramp. At turn-on this capacitor will be charged to VB +5V by a 10A
current source.
4
VB_Ret
VB Chip Return
Bulk voltage ground
5
VA_Ret
VA Chip Return
Auxiliary voltage ground
6
VA_IN
VA_IN provides the chip with +5V bias voltage. At VA < 2.5V, VA control functionality is
VA Bias, Controlled
disabled, FAULT latch is cleared and floating and VA_OUT is held low.
Supply Input,
Undervoltage Lock-Out
7
VA_ENn
8
NC
9
VA_OUT
Controlled Supply
Output
Upon an OC condition VA_OUT is current limited to 1A. Current limit response time is within
200s. VA_Out will remain in current limit for ~10mS before being latched off.
10
VA_ FLTn
Over Current Fault
Indicator
Over current fault indicator. VA_FLTn floats and is disabled until VA >2.5V. This output is
pulled low after the OC time-out period has expired and stays latched until module is
removed.
11
VB_IN
VB / Chip Supply
+12V Chip Supply.
12
CTIM
VB Current Regulation
Period
Connect a capacitor from this pin to ground. This capacitor determines the time delay
between an overcurrent event and chip output shutdown (current limit time-out). The
duration of current limit time-out (in seconds) = 93k x CTIM (Farads).
13
DC-DC
ENABLE
VB_In Power Good
and DC-DC Enable
Signal
Indicates that the VB voltage on ISEN pin is within specification and enables the DC-DC
converter. DC-DC ENABLE is driven by an open drain N-Channel MOSFET and is pulled
low when VB Secondary rail (VISEN) is not within specification.
14
VB_ON
VB Sequencer Enable
Control Signal
VB_ON is used to control and reset the VB supply to IB module. VB is asserted on, when
VB_ON pin is driven high or is open. After a latch-off VB is reset by a low level signal applied
to this pin. This input has 20A pull-up capability.
VA enable / disable
DESCRIPTION
Connected to VA_Ret through the IB connector, VA is asserted on module when VA_ENn
is low. Cycle to reset after latch-off. POR also resets latch.
NC
3
FN9028.1
July 2004
ISL6160
Absolute Maximum Ratings
Thermal Information
VB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +17.0V
GATE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to VB+8V
ISEN, PGOOD, VB_On, ISET . . . . . . . . . . . . . . . -0.3V to VB+ 0.3V
VA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6.0V
VA_ENn, VA_FLTn. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6V
VA_OUT. . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND-0.3V to VA+0.3V
VA_Output Current . . . . . . . . . . . . . . . . . . . . Short Circuit Protected
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3kV (HBM)
Thermal Resistance (Typical, Note 1)
JA (oC/W)
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
90
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . .150oC
Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300oC
(SOIC - Lead Tips Only)
Operating Conditions
VB Supply Voltage Range . . . . . . . . . . . . . . . . . . . . . . +10V to +14V
VA Supply Voltage Range . . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V
Temperature Range (TA) . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. NOTE #1 JA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech
Brief TB379 for details.
2. All voltages are relative to GND, unless otherwise specified.
Nominal VB = +12V, VA = +5V, TA = TJ = -40oC - 85oC, Unless Otherwise Specified
Electrical Specifications
PARAMETER
SYMBOL
TEST CONDITIONS
UNIT
S
MIN
TYP
MAX
18.5
20
21.5
A
-4
0
4
mV
+12V (VB) BULK SUPPLY CONTROL
ISET Current Source
IISET
Current Limit Amp Offset Voltage
Severe Overcurrent Threshold
VISET - VISEN
SOC_Vth
-
150
-
mV
RISET = 2.8k 1%, RSENSE = 20m1%
2.2
2.8
3.4
A
50W_ilim_ft
RISET = 2.8k 1%, RSENSE = 10m 1%
4.5
5.6
6.7
A
25W_ilim_lt
RISET = 2.8k 1%, RSENSE = 20m 1%,
TJ = 15oC - 45oC
2.6
2.8
3.0
A
50W_ilim_lt
RISET = 2.8k 1%, RSENSE = 10m 1%,
TJ = 15oC - 45oC
5.2
5.6
6.0
A
GATE Response Time to Severe Overcurrent
Tr_gate_soc
VRSENSE = (150mV + CR Vth) to VGATE to
10.8V
-
100
-
nS
GATE Response Time to Overcurrent
Tr_gate_oc
VGATE to 10.8V
-
600
-
ns
IGATE
VGATE to = 6V
8.4
10
11.6
A
Overcurrent
45
75
-
mA
-
0.8
-
A
-
V
5
mA
Full Temp 25W VB Current Regulation
25W_ilim_ft
Full Temp 50W VB Current Regulation
Limited Temp 25W VB Current Regulation
Limited Temp 50W VB Current Regulation
Above set current regulation voltage threshold
GATE PARAMETERS
GATE Turn-On Current
GATE Pull-Down Current
Igte_4v_oc
GATE Pull-Down Current
Igte_4V_soc
GATE High Voltage
Vgate_h
Severe Overcurrent
GATE Voltage
VB+4.5V VB+5V
VB PARAMETERS
IC Supply Current
IVB
-
3
VB POR Rising Threshold
VBPOR_L2H
VB Low to High
7.8
8.4
9
V
VB POR Falling Threshold
VBPOR_H2L
VB High to Low
7.5
8.1
8.7
V
0.1
0.3
0.6
V
VB POR Threshold Hysteresis
DC-DC Enable Undervoltage Threshold
VBPOR_HYS VBPOR_L2H - VBPOR_H2L
DCenUV_VTH
9.2
9.6
10
V
VB_On Rising Threshold
PWR_Vth
1.4
1.7
2.0
V
VB_On Hysteresis
PWR_hys
-
170
-
mV
VB_On Pull-Up Voltage
PWRN_V
2.7
3.2
-
V
VB_On Pull-Up Current
PWRN_I
9
17
25
A
4
VB_On Pin Open
FN9028.1
July 2004
ISL6160
Nominal VB = +12V, VA = +5V, TA = TJ = -40oC - 85oC, Unless Otherwise Specified (Continued)
Electrical Specifications
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNIT
S
CTIM PARAMETERS
CTIM Charging Current
CTIM_ichg0
VCTIM = 0V
16
20
23
A
CTIM Fault Pull-Up Current
CTIM_ichg6
VCTIM = 6V
5
8
11
mA
1.3
1.8
2.3
V

Current Limit Time-Out Threshold Voltage
CTIM_Vth
CTIM Voltage
+5V AUXILIARY SUPPLY CONTROL
VA Integrated Switch On Resistance
rDS(ON)
VIN = 5V, IOUT = 0.4A, TA = TJ = 25oC
-
0.125
0.150
TA = TJ = 85oC
-
0.160
0.200

VIN = 5V, Switch Disabled, No Load
-
300
450
mV
t_vout_rt
RL = 10CL = 0.1F, 10%-90%
-
8
-
V/mS
Slow VOUT turn-off rate
Toff_svout
RL = 10CL = 0.1F, 90%-10%
-
8
-
V/mS
Fast VOUT turn-off rate
Toff_fvout
RL = 10CL = 0.1F, 90%-10%
-
4
-
V/uS
Disabled Output Voltage
VOUT_DIS
VOUT Rising Rate
CURRENT CONTROL
Current Limit
0.75
1
1.25
A
OC Regulation Settling Time
Tsett_ocr
Ilim
RL= 5CL= 0.1F to Within 10% of CR
-
1.5
-
ms
Severe OC Regulation Settling Time
Tsett_socr
RL< 1CL= 0.1F to Within 10% of CR
-
100
-
-
12
-
-
0.3
V
2.0
-
-
V
Over Current Latch-off Time
tOC_loff
s
ms
I/O PARAMETERS
Fault Output Voltage
Vfault_hi
IOUT = 10mA
ENABLE High Threshold
Ven_vih
VIN = 5.5V
ENABLE Low Threshold
Ven_vil
ENABLE Input Current
Ien_i
VIN = 4.5V
ENABLE = 0V to 5V, VIN = 5V, TJ > 25oC
-
-
0.8
V
-0.5
-
0.5
A
BIAS PARAMETERS
Enabled VA_Iin Current
Ien_VA
Switches Closed, VA_Out = OPEN, TJ >0oC
-
120
200
A
Disabled VA_Iin Current
Idis_VA
Switches Open, VA_Out = OPEN
-
1
5
A
Undervoltage Lockout Threshold
VUVLO
VIN Rising, Switch Enabled
1.7
2.25
2.5
V
UV Hysteresis
UVHYS
50
100
-
mV
ISL6160 Description and Operation
The ISL6160 is the first power supply sequencer for the
emerging InfiniBand module (IM) hot swap application. This IC
controls both the +12V VB(ulk) and +5V VA(ux) supplies
providing soft start during hot insertion and overcurrent (OC)
protection during operation.
For VB control and protection, the ISL6160 features include an
accurate current detecting comparator, current limiting for the
range of both 25W and 50W capable power ports, a current
regulated time delay to latch off and soft start turn-on ramp.
These features are all programmable with a minimum of
external passive components. The ISL6160 also includes
severe overcurrent protection that immediately shuts down the
MOSFET switch should there be a shorted IM load.
The VB_ON pin provides on-off control of the external VB
switch once VB_IN > 9V. Driving this pin high causes the gate
pin to charge the external gate capacitor with a 10uA current
setting the soft start ramp rate. Large capacitive loads can thus
be safely turned on with no inrush current spiking nor disruption
of the voltage supply rail.
5
The VB load current passes through an external current sense
resistor. When the voltage across the sense resistor exceeds
the user programmed ISET voltage threshold, the controller
enters current regulation (CR). The regulated current level is
fixed by the RISET and RSENSE resistors. See Table 1 for
RISET programming resistor value and the resulting nominal
CR threshold voltage.
TABLE 1.
NOMINAL REGULATION LEVEL
(RSENSE = 0.020)
RISET
RESISTOR
NOMINAL
OC Vth
CURRENT (A)
1.0k
20mV
1
12
2.8k
56mV
2.8
33.6
3.48k
70mV
3.5
42
5.6k
112mV
5.6
67.2
POWER (W)
NOTE: Nominal Vth = RISET x 20A.
During CR, the CTIM pin starts charging the time-out capacitor
with a 20A current source and the controller enters the delay
time to latch-off period. This feature allows transient currents
that exceed the designed limit to pass without immediately
FN9028.1
July 2004
ISL6160
shutting down the VB supply. The length of this period is set by
the value of a capacitor between CTIM and VB_RET. See table
2 for CTIM value and resulting l current regulation period.
TABLE 2.
CTIM CAPACITOR
NOMINAL CURRENT REGULATION
PERIOD
0.001F
93s
0.01F
930s
0.022F
2ms
0.047F
4.4ms
0.1F
9.3ms
NOTE: Nominal time-out period in seconds = CTIM x 93k.
The programmed current level is held until either the OC event
passes or the time out period expires. If the former is the case
then the N-Channel MOSFET is fully enhanced and the CTIM
capacitor is discharged. Once CTIM charges to 1.87V, signaling
that the time out period has expired an internal latch is set
whereby the FET gate is quickly pulled to 0V turning off the NChannel MOSFET switch, isolating the faulty load. Monitor the
CTIM pin for an OC latch off indication. This pin will rise rapidly
from 1.9V to VB once the time out period expires. If no CTIM
capacitor is implemented the VB Secondary Rail will
immediately latch-off in an OC event.
The ISL6160 responds to a severe overcurrent load (defined as
a voltage across the sense resistor >150mV over the CR Vth
set point) by immediately, driving the N-Channel MOSFET gate
to 0V in ~1s. The controlled gate voltage is then ramped up
turning on the N-Channel MOSFET to the programmed current
limit level. This is the start of the time out period.
The VB control circuitry is reset after an OC latch-off
condition by a low level on the VB _ON pin and is turned on
again by the VB_ON pin being driven high.
The DC-DC_EN pin is used to enable an accompanying DCDC converter on the IM when the VB Secondary Rail is within
specification. This pin pulls up to VB through a pull-up resistor
when the VISEN is > 10V. This pin can also be used as an
undervoltage (UV) signal as it will pull low once the VISEN falls
below 9.2V. This signal can also be passed to a system
controller chip or used to drive an LED for observation. The
state of this signal does not impact the VB current control
function.
For the VA supply the ISL6160 features fully integrated current
monitoring and regulation, an integrated 125m N-channel
MOSFET power switch (Figure 13.) and a current limited delay
to latch-off for system protection. The current sense and limiting
circuitry sets the CR limit to a nominal 1A, making this device
well suited for the VA requirements. See Figure 14. for current
regulation performance. The ISL6160 provides VA OC fault
notification if needed, accurate current regulation and a
consistent timed latch-off thus isolating and protecting the
voltage bus in the presence of an OC event or short circuit. The
OC event to CR time is inversely related to the OC magnitude,
6
see Figure 15 and the 12mS time (Figure 16) to latch-off is
independent of thermal condition .
The ISL6160 VA_ENn pin provides on-off control over the
VA_IN supply when VA is greater than 2.5V. The switch is
asserted on and starts the soft start ramp once VA_ENn < 0.8V.
Once the VA is latched off due to an OC condition the
VA_Fltn pin will go low indicating the faulted state to a
control chip, indicator display or alarm.
The ISL6160 VB and VA control circuitries are isolated from
each other, thus there are no sequencing restrictions to be
considered.
Description of ISL6160 Operation in an
InfiniBand Module (IM)
On the IM the ISL6160 is necessarily paired with a DC-DC
converter to convert 12V to a lower usable voltage for the
application circuitry. Figure 2 shows a block diagram of a
complete IM power sequencer and power supply using the
ISL6160 and a HIP6006, single output PWM DC-DC converter.
Upon insertion, the InfiniBand (IB) backplane secondary side
connector sequences connections between the backplane
and the inserted module in the following order:
1. VA_Ret and VB_Ret
2. VA_In and VB_In
3. the 6 InfiniBand Module (IM) control signals and
4. VBx_En_L and IMxPRst due to the staggered lead lengths.
The ISL6160 VA undervoltage lockout feature prevents turn-on
of VA until VA_In > 2.5V. It then enables the VA soft start and
power up. The VA rising voltage output is a current limited ramp
so that both the inrush current and voltage slew rate are limited,
(Figure 18) independent of load. This reduces supply droop
due to surge and eliminates the need for additional external
EMI filters. During operation, once a VA OC condition is
detected the output current is limited to 1A for 12mS to allow
transient conditions to pass. If the IC is still in current limit mode
after the current limit period has elapsed, the output is then
latched off. The VA to the IM circuitry is latched off until reset by
the disconnection and reconnection of the IM from the chassis
backplane.
Once VB_In is connected, it is held off from the VB Secondary
Rail until the ISL6160 VB_On pin is signaled high. This is
accomplished through the exclusive OR of both the VBx_En_L
and the Local_Power_Enable being asserted. At that time the
ISL6160 turns on the VB in a soft start mode protecting the
primary supply rail from sudden in-rush current. During turn-on,
the external gate capacitor of the N-Channel MOSFET (VB
switch) is charged with a 20A current source resulting in a
programmable ramp (soft start turn-on). An internal charge
pump supplies the gate drive for the 12V VB supply switch
driving the MOSFET gate to VB +5V. Once the VB Secondary
Rail ramps to 10V the DC-DC_En pin is pulled high thus
FN9028.1
July 2004
ISL6160
enabling the accompanying voltage converter. The DC-DC
converter then provides a well regulated output voltage to
the IM circuitry.
Available from Intersil is the ISL6160EVAL2. The
ISL6160EVAL2 is a complete InfiniBand Class I (non isolated)
power topology evaluation platform consisting of the ISL6160
and the HIP6006 single output PWM controller. See Figure 2
for a simplified block diagram of the ISL6160EVAL2 platform.
This evaluation platform allows the Infiniband Module (IM)
power supply designer to evaluate the concept of this design
and apply it to a specific IM power requirement. The evaluation
platform is configured for 5V Vout and 3A Iout capability and
exhibits a 92% total efficiency. See Figures 19 and 20 for
ISL6160EVAL2 turn-on and turn-off waveforms.
Additional information for the ISL6160EVAL2 can be found in
application note AN9959.
VB_IN
DC-DC_ON
VB_ON
VB CONTROL
EN
ISL6160
VA_IN
VA CONTROL
LCL_POWER_EN
VBX_EN_L
HI GATE
HIP6006
Vout
LO_GATE
VAout
FIGURE 2. SIMPLIFIED ISL6160EVAL2 BLOCK DIAGRAM
Using the ISL6160 beyond IM Applications
-48V, +5V Control Circuit
The ISL6160 can also be used for -48V and +5V telecom
power control. The VB portion of the ISL6160 configured as a
low side switch controller as shown in Figure 3. is capable of
controlling several hundreds of volts, positive or negative and at
the same time provide control and protection for the +5V supply
with its 1A integrated current regulating function.
Biased by an external 12V reference in the low side switch
configuration the ISL6160 retains all of its features except for
the DC-DC_EN feature. This is nonfunctional in the low side
configuration as VISEN is always near 0V and will not pull high
to indicate that voltage is good.
When controlling a negative voltage the VB_ON control can
be implemented through an optocoupler for on-off control or
left open for an always on hot pluggable adaptor card
application .
-48V
14
1
-48V
LOAD
2
13
3
12
ISL6160
4
11
5
10
6
9
7
8
12V
REG
+
+5V
LOAD
-
+5V
0V +
FIGURE 3. -48V/+5V APPLICATION CIRCUIT
Application Considerations
The manufacturers’ MOSFET safe operating area (SOA) data
should be consulted, as during the soft start ramp and current
regulation times, the VGS of the external N-Channel MOSFETs
is reduced driving the N-Channel MOSFET switch into the
(linear region) high rDS(ON) state. Thus avoid extended soft
start and time out periods as the external N-Channel MOSFETs
may be damaged or destroyed due to excessive internal power
dissipation. Refer to the MOSFET manufacturers’ data sheets
for SOA information.
With the high levels of inrush current e.g., highly capacitive
loads and HDD motor start up currents, choosing the ramp up
rate and regulation level of the load current is crucial to provide
both protection and still allow for this inrush current without
latching off. Consider this in addition to the time out delay when
choosing MOSFETs for your design.
Correct physical layout of RSENSE resistor is critical to the
accuracy of sensing the VB current. Ideally trace routing
between the RSENSE resistors and the ISL6160 is direct and
as short as possible with zero current in the sense lines. (See
Figure 4.)
CORRECT
INCORRECT
TO ISEN AND
RISET
CURRENT
SENSE RESISTOR
FIGURE 4. SENSE RESISTOR PCB LAYOUT
7
FN9028.1
July 2004
ISL6160
5.0
20.2
4.5
20.0
ISET CURRENT (A)
VB BIAS CURRENT (mA)
Typical Performance Curves
4.0
3.5
3.0
19.8
19.6
19.4
19.2
2.5
19.0
0
2.0
10
0
20
40
30
50
60
70
90
80
100
10
20
30
TEMPERATURE (oC)
70
80
90
100
90
100
1.89
CTIM OC VOLTAGE THRESHOLD (V)
20.32
CTIM - 0V
20.16
20.0
19.82
19.66
1.88
1.87
1.86
1.85
1.84
1.83
0
10
20
30
40
50
60
70
80
90
100
0
10
20
30
TEMPERATURE (oC)
40
50
60
70
80
TEMPERATURE (oC)
FIGURE 7. CTIM CURRENT SOURCE
FIGURE 8. CTIM OC VOLTAGE THRESHOLD
9.67
10.2
GATE CHARGE CURRENT (A)
VB UV THRESHOLD (V)
60
FIGURE 6. ISET SOURCE CURRENT
20.5
CTIM = 0V, CURRENT SOURCE (A)
50
TEMPERATURE (oC)
FIGURE 5. VB BIAS CURRENT
19.5
40
9.66
9.65
0
10
20
30
40
50
60
70
80
TEMPERATURE (oC)
FIGURE 9. VB UV THRESHOLD
8
90
100
10.1
10.0
9.9
9.8
9.7
9.6
0
10
20
30
40
50
60
70
80
90
100
TEMPERATURE (oC)
FIGURE 10. GATE CHARGE CURRENT
FN9028.1
July 2004
ISL6160
Typical Performance Curves
(Continued)
8.5
17.200
VB POWER ON RESET (V)
17.183
GATE DRIVE (V)
17.166
17.150
17.133
17.116
17.100
0
10
20
30
40
50
60
70
80
8.3
8.2
VB HI TO LO
8.1
8.0
90 100
VB LO TO HI
8.4
0
10
20
TEMPERATURE (oC)
50
60
70
80
90
100
FIGURE 12. VB POWER ON RESET VOLTAGE THRESHOLD
260
1200
VA CURRENT REGULATED IOUT (mA)
SWITCH ON RESISTANCE (m)
40
TEMPERATURE (oC)
FIGURE 11. GATE DRIVE VOLTAGE, VB = 12V
240
220
200
180
160
140
120
100
30
0
10
20
30
40
50
60
70
80
90
100
-40oC
1100
25oC
1000
85oC
900
800
1.3 1.5
TEMPERATURE (oC)
2.0
2.5
3.0
3.5
4.0
4.5 4.8
VA OUT (V)
FIGURE 13. VA = 5V SWITCH ON RESISTANCE AT 0.4A
FIGURE 14. VA CURRENT REGULATION vs. VA OUT
TIME TO CURRENT REGULATION (ms)
1.6
1.4
1.2
FLTN
1.0
0.8
0.6
12MS VA LATCH OFF DELAY
0.4
VA OUT
0.2
0
1
2
3
4
5
6
7
8
FAULT CURRENT (A)
FIGURE 15. CR SETTLING TIME vs. VA IOUT
9
9
10
VOUT (1V/DIV.)
TIME (2ms /DIV.)
FIGURE 16. -VA TURN-ON INTO 1.5A FAULT
FN9028.1
July 2004
ISL6160
Typical Performance Curves
VB_ON 5V/DIV.
(Continued)
VGATE 5V/DIV.
VB VOUT 5V/DIV.
VA_In 1V/DIV.
VA VOUT 1V/DIV.
DCenUV_VTH, 9.8V
VA IOUT 0.1A/DIV.
VB IOUT 2A/DIV.
DC-DC_EN 5V/DIV
1ms/DIV.
20ms/DIV.
FIGURE 17. VB TURN-ON Cload = 680F
FIGURE 18. VA HOT SWAP TURN-ON
LCL_PWR_EN (TP6)
LCL_PWR_EN (TP6)
VGATE (TP4)
VB SECONDARY RAIL (TP1)
VB SECONDARY RAIL (TP1)
VGATE (TP4)
DC-DC_EN (TP2)
DC-DC_EN (TP2)
Vout (TP3)
Vout (TP3)
Iout 2A / DIV
5V / DIV
20ms / DIV
FIGURE 19. ISL6160EVAL2 Vout TURN-ON
10
5V / DIV
2ms / DIV
FIGURE 20. ISL6160EVAL2 Vout TURN-OFF
FN9028.1
July 2004
ISL6160
Small Outline Plastic Packages (SOIC)
M14.15 (JEDEC MS-012-AB ISSUE C)
N
INDEX
AREA
H
0.25(0.010) M
14 LEAD NARROW BODY SMALL OUTLINE PLASTIC
PACKAGE
B M
E
INCHES
-B-
1
2
3
L
SEATING PLANE
-A-
h x 45o
A
D
-C-
e

A1
B
0.25(0.010) M
C A M
SYMBOL
MIN
MAX
MIN
MAX
NOTES
A
0.0532
0.0688
1.35
1.75
-
A1
0.0040
0.0098
0.10
0.25
-
B
0.013
0.020
0.33
0.51
9
C
0.0075
0.0098
0.19
0.25
-
D
0.3367
0.3444
8.55
8.75
3
E
0.1497
0.1574
3.80
4.00
4
e
C
0.10(0.004)
B S
0.050 BSC
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
1.27 BSC
-
H
0.2284
0.2440
5.80
6.20
-
h
0.0099
0.0196
0.25
0.50
5
L
0.016
0.050
0.40
1.27
6
N
NOTES:
MILLIMETERS

14
0o
14
8o
0o
7
8o
Rev. 0 12/93
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Interlead
flash and protrusions shall not exceed 0.25mm (0.010 inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater
above the seating plane, shall not exceed a maximum value of
0.61mm (0.024 inch).
10. Controlling dimension: MILLIMETER. Converted inch dimensions
are not necessarily exact.
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9001 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
11
FN9028.1
July 2004
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