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5
4
3
AFE_x_LATCH_OUTPUT_nENABLE
P2
P2
P2
P2
D
P2
AFE_x_LATCH_GPIO_[0:15]
AFE_TO_RTS
AFE_TO_TX
AFE_TO_CTS
AFE_TO_RX
AFE_x_LATCH_GPIO_1
AFE_x_LATCH_GPIO_3
AFE_x_LATCH_GPIO_5
AFE_x_LATCH_GPIO_7
AFE_x_LATCH_GPIO_9
AFE_x_LATCH_GPIO_11
AFE_x_LATCH_GPIO_13
AFE_x_LATCH_GPIO_15
AFE_x_UART_TX
AFE_x_UART_RX
AFE_x_CAN_TX
AFE_x_CAN_RX
2
1
DIFFERENTIAL PAIR OPTIONS
P2
DVDD_3_3V
D
AFE_x_I2S_SCK
AFE_x_I2S_WS_LRCLK
AFE_x_I2S_SDIN
AFE_x_I2S_SDIN_AUX
AFE/SCI_x_I2C_SDA
P2
P2
P2
P2
P2
AFE/SCI_x_I2C_SCL
AFE_x_SPI_CS
AFE_x_SPI_CLK
AFE_x_SPI_MOSI
AFE_x_SPI_MISO
P2
54
56
1
R2
1K
D1
GRN
DVDD_3_3V
2
AFE_x_LATCH_GPIO_14
AFE_x_LATCH_GPIO_12
AFE_x_LATCH_GPIO_10
AFE_x_LATCH_GPIO_8
AFE_x_LATCH_GPIO_6
AFE_x_LATCH_GPIO_4
AFE_x_LATCH_GPIO_2
AFE_x_LATCH_GPIO_0
200K
200K
MAVRK_AFE_x_MOD_SEL
MAVRK_SCI_x_MOD_SEL
MAVRK_AFE_x_MOD_IRQ
MAVRK_SCI_x_MOD_IRQ
SCI_x_GPIO_[0:3]
C3
10uF
10V
C
MCU/AFE_x_ANLG_CH_[0:7]
R3
R4
P2
P2
C2
10uF
10V
53
55
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
C
P2
P2
P2
P2
P2
DVDD_3_3V
TP1
C1
10uF
10V
GND
GND
AFEX_CON_1
QRM8-026-02.0-L-D-A
2x26
AFE_x_LATCH_ENABLE
AFE_x_READ_ENABLE
AFE_x_WRITE_ENABLE
R1
0.10
1/4W
GND
GND
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
AFE_DVDD_3_3V
MCU/AFE_x_ANLG_CH_0
MCU/AFE_x_ANLG_CH_1
MCU/AFE_x_ANLG_CH_2
MCU/AFE_x_ANLG_CH_3
MCU/AFE_x_ANLG_CH_4
MCU/AFE_x_ANLG_CH_5
MCU/AFE_x_ANLG_CH_6
MCU/AFE_x_ANLG_CH_7
SCI_x_GPIO_0
SCI_x_GPIO_1
SCI_x_GPIO_2
SCI_x_GPIO_3
AFEx/SCIx_REF_VDD
AFEx/SCIx_REF_VSS
P3
P3
AFEx/SCIx_ANLG_VSS
AFEx/SCIx_ANLG_VDD
P3
P3
AVDD_5_5V
Sense Return
AFE_x_MCLK
AVDD_5_5V
R5
0.10
1/4W
AFE_AVDD_5_5V
TP2
B
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
B
Current Sense
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
R6
2.2K
P2
P2
P2
P2
P2
P2
P2
P2
C4
10uF
10V
C5
10uF
10V
AFE/SCI_COM_3
AFE/SCI_COM_2
AFE/SCI_COM_1
AFE/SCI_COM_0
SCI_x_ANLG_CH_[0:15]
SCI_x_ANLG_CH_15
SCI_x_ANLG_CH_14
SCI_x_ANLG_CH_13
SCI_x_ANLG_CH_12
SCI_x_ANLG_CH_11
SCI_x_ANLG_CH_10
SCI_x_ANLG_CH_9
SCI_x_ANLG_CH_8
SCI_x_ANLG_CH_7
SCI_x_ANLG_CH_6
SCI_x_ANLG_CH_5
SCI_x_ANLG_CH_4
SCI_x_ANLG_CH_3
SCI_x_ANLG_CH_2
SCI_x_ANLG_CH_1
SCI_x_ANLG_CH_0
SCI_x_SPI_CS
SCI_x_SPI_CLK
SCI_x_SPI_MOSI
SCI_x_SPI_MISO
A
TP3
GND
TP4
GND
Black
D2
YEL-GRN
AVDD_5_5V
2
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
AFE_SCI_REFERENCE
1
AFEX_CON_2
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
2x30
ERM5-30-02.0-L-DV-K
Black
5
4
AFE to MB INTERFACE
A
Title
Approval
LB1
PART NUMBER-MVK
3
Designer
XXXX XXXX
Drawn By
XXXX XXXX
Layout
XXXX XXXX
AFE-TEMPLATE-MVK
Size B
EDGE No xxxxxxx
Date Wednesday, December 21, 2011
2
Rev
1.9
Page 1 of 5
1
5
4
3
2
1
TYPICAL GPIO USE
AFE_DVDD_3_3V
C6
0.1uF
10V
U1
P1
AFE_x_LATCH_GPIO_[0:15]
VCC
2
3
4
5
6
7
8
9
AFE_x_LATCH_GPIO_0
AFE_x_LATCH_GPIO_1
AFE_x_LATCH_GPIO_2
AFE_x_LATCH_GPIO_3
AFE_x_LATCH_GPIO_4
AFE_x_LATCH_GPIO_5
AFE_x_LATCH_GPIO_6
AFE_x_LATCH_GPIO_7
D
P1
11
1
AFE_x_LATCH_OUTPUT_nENABLE
D1
D2
D3
D4
D5
D6
D7
D8
Q1
Q2
Q3
Q4
Q5
Q6
Q7
Q8
LE
OE
GND
TPAD
20
19
18
17
16
15
14
13
12
AFE_GPIO_0
AFE_GPIO_1
AFE_GPIO_2
AFE_GPIO_3
AFE_GPIO_4
AFE_GPIO_5
AFE_GPIO_6
AFE_GPIO_7
D
R37
R38
0 OHM CLK_ENABLE
0 OHM AFE_REF_EN
P4
P5
10
21
SN74LVC573ARGY
AFE_DVDD_3_3V
C23
0.1uF
10V
P2
U11
VCC
AFE_x_LATCH_GPIO_0
AFE_x_LATCH_GPIO_1
AFE_x_LATCH_GPIO_2
AFE_x_LATCH_GPIO_3
AFE_x_LATCH_GPIO_4
AFE_x_LATCH_GPIO_5
AFE_x_LATCH_GPIO_6
AFE_x_LATCH_GPIO_7
AFE_DVDD_3_3V
C7
0.1uF
10V
U2
C
VCC
2
3
4
5
6
7
8
9
AFE_x_LATCH_GPIO_8
AFE_x_LATCH_GPIO_9
AFE_x_LATCH_GPIO_10
AFE_x_LATCH_GPIO_11
AFE_x_LATCH_GPIO_12
AFE_x_LATCH_GPIO_13
AFE_x_LATCH_GPIO_14
AFE_x_LATCH_GPIO_15
11
1
D1
D2
D3
D4
D5
D6
D7
D8
Q1
Q2
Q3
Q4
Q5
Q6
Q7
Q8
LE
OE
GND
TPAD
20
19
18
17
16
15
14
13
12
AFE_GPIO_8
AFE_GPIO_9
AFE_GPIO_10
AFE_GPIO_11
AFE_GPIO_12
AFE_GPIO_13
AFE_GPIO_14
AFE_GPIO_15
2
3
4
5
6
7
8
9
MAVRK_SCI_x_MOD_SEL 11
1
P1
D1
D2
D3
D4
D5
D6
D7
D8
Q1
Q2
Q3
Q4
Q5
Q6
Q7
Q8
LE
OE
GND
TPAD
SCI_x_GPIO_[0:3]
20
19
18
17
16
15
14
13
12
SCI_x_GPIO_0
SCI_x_GPIO_1
SCI_x_GPIO_2
SCI_x_GPIO_3
SCI_GPIO_4
SCI_GPIO_5
SCI_GPIO_6
SCI_GPIO_7
C
10
21
SN74LVC573ARGY
10
21
SN74LVC573ARGY
Optional: Incorporate if AFE or Companion SCI module require more
than 8 GPIOs or a Parallel Data Bus
P1
P1
AFE_x_I2S_SCK
AFE_x_UART_TX
R17
R12
0 OHM
0 OHM
AFE/SCI_COM_0
P1
P1
P1
AFE_x_I2S_WS_LRCLK
AFE_x_UART_RX
R18
R11
0 OHM
0 OHM
AFE/SCI_COM_1
P1
P1
P1
AFE_x_I2S_SDIN
AFE_x_CAN_TX
R19
R13
0 OHM
0 OHM
AFE/SCI_COM_2
P1
P1
P1
AFE_x_I2S_SDIN_AUX
AFE_x_CAN_RX
R21
R14
0 OHM
0 OHM
AFE/SCI_COM_3
P1
AFE_DVDD_3_3V
B
R15
100K
C8
U3
P1
P1
AFE_x_SPI_CS
MAVRK_AFE_x_MOD_SEL
2
7
P1
MAVRK_SCI_x_MOD_SEL
6
3
V+
NO1
COM1
IN1
COM2
IN2
NO2
GND
8
1
Option 1: If the Companion SCI does not require I2S or the AFE module does not reqiure
a Companion SCI, these lines should be utlized to pass the UART and CAN signals.
R16
100K
0.1uF
B
Option 2: If the Companion SCI does require I2S these lines should be utlized to pass
the I2S lines to the SCI module
10V
SEL_AFE_x_SPI_CS
5
4
P1
P1
P1
TS5A2066DCU
SEL_SCI_x_SPI_CS
AFE_x_SPI_CLK
AFE_x_SPI_MOSI
AFE_x_SPI_MISO
R20
R23
R22
R24
0 OHM
0 OHM
0 OHM
0 OHM
SCI_x_SPI_CS
SCI_x_SPI_CLK
SCI_x_SPI_MOSI
SCI_x_SPI_MISO
P1
P1
P1
P1
AFE_DVDD_3_3V
AFE_DVDD_3_3V
C9
0.1uF
10V
R39
10K
1/16W
U4
A
P1
P1
AFE/SCI_x_I2C_SCL
AFE/SCI_x_I2C_SDA
2
7
6
3
COM1
IN1
COM2
IN2
V+
NO1
NO2
GND
TS5A2066DCU
R40
10K
1/16W
8
1
5
4
C10
0.1uF
10V
AFE_I2C_SDA
P4
AFE_I2C_SCL
P4
U5
8
7
6
5
VCC
WP
SCL
SDA
A0
A1
A2
VSS
AFE INTERFACE LOGIC
1
2
3
4
A
Title
128K I2C EEPROM
ADDR is 0x52
Size B
Recommended: I2C EEprom for traceability
5
4
3
AFE-TEMPLATE-MVK
EDGE No
XXXXXXX
Rev
Date Wednesday, August 17, 2011
2
1.9
Page 2 of 5
1
5
4
To power something like a data converter:
D
The SCI module may provide +/-2.5V, or
+5/0V on the AFEx_TO_SCIx_ANLG_VDD/VSS.
3
2
To power something like a reference generator:
AFEx/SCIx_ANLG_VDD
D
The SCI module may provide +/-3V, or
+5.35/0V on the AFEx_TO_SCIx_REF_VDD/VSS.
AFE_AVDD
P1
1
AFE_REF_VDD
R27 0 OHM
P1
AFEx/SCIx_REF_VDD
R28 0 OHM
DNI
P1
P1
AFEx/SCIx_ANLG_VSS
AFEx/SCIx_REF_VSS
DNI
R29 0 OHM
R30 0 OHM
AFE_REF_VSS
AFE_AVSS
C
C
AFE_REF_VDD/VSS Selection
AFE_AVDD/AVSS Selection
B
B
ANALOG POWER SUPPLY
A
A
Title
Size B
AFE-TEMPLATE-MVK
EDGE No
XXXXXXX
Rev
Date Wednesday, August 17, 2011
5
4
3
2
1.9
Page 3 of 5
1
5
3
2
1
AFE_DVDD_3_3V
D
CLK_ENABLE
P2
IN OUT
EN
GND NR
5
(1.8 V)
OSC1
4
4
2
TPS73018DBV
C12
1.0uF
16V
C13
C11
0.01uF
16V
2.2uF
6.3V
G
G
1
3
2
AFE_DVDD_3_3V
CLK_VDD
U6
3
1
U7
1
2
3
4
5
6
7
12MHz
C14
0.1uF
10V
Xin/CLK
Xout
S0
S1/SDA
VDD
S2/SCL
Vctr
Y1
GND
GND
VDD_OUT
Y2
VDD_OUT
Y3
CDCE913PW
I2C Address
= 0x65
14
13
12
11
10
9
8
AFE_I2C_SDA
AFE_I2C_SCL
R31
22
R32
P2
P2
AFE_CLK
3
2
1
D
4
Clock_2
TP5
J1
Ext Clock Source Select
HMTSW-103-07-G-S-230
22
R33
Clock_3
TP6
C
C
22
B
B
A
A
Title
XJ1
Size B
AFE-TEMPLATE-MVK
EDGE No
XXXXXXX
Rev
1.9
240
Shunt_100
5
4
3
Date Wednesday, August 17, 2011
2
Page 4 of 5
1
5
4
3
2
AFE_AVDD_5_5V
AFE_AVDD_5_5V
U9
U8
D
C15
2.2uF
10V
2
3
4
1
Vin
Vout
TEMP TRIM
GND
REF50XXAIDGK
Connect if buffer is not used
6
5
C16
2.2uF
10V
B1
C17
2.2uF
10V
C2
R34
100K
1/10W
AFE_AVDD_5_5V
V+
NO
COM
IN
GND
A2
A1
AFE_VREF+
C1
D
C18
Place as close to Data
2.2uF Converter reference pin
10V
as possible
TS5A3166YZP
R35
C19
0.01uF
16V
C20
0.1uF
50V
10K
C21 51pF
4
50V
-
3
+
Single Rail Reference
U10
V+
V-
5
1
2
R36
10 Ohm
OPA320AIDBV
C22
220pF
50V
Optional Reference Buffer
C
C
P2
AFE_REF_EN
B
B
AFE INTERFACE LOGIC
A
A
Title
Size B
AFE-TEMPLATE-MVK
EDGE No
XXXXXXX
Rev
Date Wednesday, August 17, 2011
5
4
3
2
1.9
Page 5 of 5
1
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