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RUBBER FEET
4
SCI2_EN
SCI2_VSENSE
SCI_2_PWR_GOOD
VDD_FROM_SCI_2
SCI_2_TO_PMU_V
BOARD RUBBER FEET
LB1
LB2
BOM C
LOGO
AFE/SCI_L_I2C_0
AFE/SCI_L_I2C_1
AFE/SCI_L_I2C_SCL
AFE/SCI_L_I2C_SDA
MAVRK_SCI_2_MOD_IRQ
MAVRK_SCI_2_MOD_SEL
SCI_2_TO_PMU_V
A
SCI2_EN
SCI2_VSENSE
SCI_2_PWR_GOOD
SCI_ 4 _ TO_ PM U_ V
SCI4 _ EN
SCI4 _ VSENSE
SCI_ 4 _ PWR_ GOOD
SCI_4_TO_PMU_V
SCI4_EN
SCI4_VSENSE
SCI_4_PWR_GOOD
3
MAVRK_PMU
SCI1_EN
SCI1_VSENSE
SCI_1_PWR_GOOD
SCI_3_TO_PMU_V
SCI3_EN
SCI3_VSENSE
SCI_3_PWR_GOOD
SCI_ 2 _ TO_ PM U_ V
SCI2 _ EN
SCI2 _ VSENSE
SCI_ 2 _ PWR_ GOOD
MAVRK_SCI2
AFE/SCI_R_I2C_SCL
AFE/SCI_R_I2C_SDA
SCI_ 1 _ TO_ PM U_ V
SCI_1_TO_PMU_V
SCI1_EN
SCI1_VSENSE
SCI_1_PWR_GOOD
M AVRK_ AFE_ 3 _ M OD_ SEL
M AVRK_ AFE_ 3 _ M OD_ IRQ
AFE/SCI_R_I2C_0
AFE/SCI_R_I2C_1
M AVRK_ SCI_ 3 _ M OD_ SEL
M AVRK_ SCI_ 3 _ M OD_ IRQ
AFE_SCI_1_REFERENCE
MAVRK_SCI_1_MOD_IRQ
MAVRK_SCI_1_MOD_SEL
MAVRK_SCI1
Designer
BRIAN SHAFFER
Approval
Drawn By
BRIAN SHAFFER
Layout
DAWN RITZ
2
AFE_SCI_1_REFERENCE
SCI_1_I2S_SDIN_AUX
SCI_1_I2S_SDIN
SCI_1_I2S_SCK
SCI_1_I2S_WS_LRCLK
Date
AFE1 _ CTS_ TO_ AFE3 _ RTS
AFE1 _ RTS_ TO_ AFE3 _ CTS
Title
AFE1_CTS_TO_AFE3_RTS
AFE1_RTS_TO_AFE3_CTS
MAVRK_AFE_3_MOD_SEL
MAVRK_AFE_3_MOD_IRQ
MAVRK_SCI_3_MOD_SEL
MAVRK_SCI_3_MOD_IRQ
MAVRK_SCI_3_MOD_IRQ
MAVRK_SCI_3_MOD_SEL
SCI_3_TO_PMU_V
SCI3_EN
SCI3_VSENSE
SCI_3_PWR_GOOD
VDD_FROM_SCI_3
AFE/SCI_R_I2C_[0:1]
Size C
EDGE No 6517814
Date Monday, August 15, 2011
1
AFE1_RX_TO_AFE3_TX
AFE1_TX_TO_AFE3_RX
MAVRK_SCI3
AFE_SCI_3_REFERENCE
SCI_3_I2S_SDIN_AUX
SCI_3_I2S_SDIN
SCI_3_I2S_SCK
SCI_3_I2S_WS_LRCLK
SCI_3_ANLG_CH_[0:15]
SCI_3_GPIO_[0:3]
SCI_3_SPI_CLK
SCI_3_SPI_MOSI
SCI_3_SPI_MISO
SCI_3_SPI_CS
AFE1 _ TX_ TO_ AFE3 _ RX
AFE_ R_ ENABL E_ 0
AFE_ R_ ENABL E_ 1
AFE_ R_ ENABL E_ 2
AFE_ R_ SPI_ 0
AFE_ R_ SPI_ 1
AFE_ R_ SPI_ 2
AFE_ R_ SPI_ 3
AFE_ R_ UART_ 0
AFE_ R_ UART_ 1
AFE_ R_ CAN_ 0
AFE_ R_ CAN_ 1
AFE_ R_ I2 S_ 3
AFE_ R_ I2 S_ 2
AFE_ R_ I2 S_ 1
AFE_ R_ I2 S_ 0
AFE_ R_ ENABL E_ 0
AFE_ R_ ENABL E_ 1
AFE_ R_ ENABL E_ 2
AFE_ R_ I2 S_ 3
AFE_ R_ I2 S_ 2
AFE_ R_ I2 S_ 0
AFE_ R_ I2 S_ 3
AFE_ R_ I2 S_ 2
AFE_ R_ I2 S_ 1
AFE_ R_ I2 S_ 1
AFE_R_MCLK
RF_ UART_ 1
RF_1_SHUTD_1
RF_1_SHUTD_0
AFE_R_MCLK
RF_SPI_MISO
RF_SPI_MOSI
RF_SPI_CS
RF_SPI_CLK
RF_UART_CTS
RF_UART_RTS
RF_UART_RX
RF_UART_TX
RF_I2C_SDA
RF_I2C_SCL
RF_SDIO_D[0-3]
AFE_R_I2S_SCK
AFE_R_I2S_SDIN
AFE_R_I2S_SDIN_AUX
AFE_R_I2S_WS_LRCLK
RF_SDIO_CLK
RF_SDIO_CMD
RF_LOW_SPEED_CLK
RF_3_SHUTD_1
RF_3_SHUTD_0
RF_3_GPIO_3
RF_3_GPIO_2
RF_SPI_MISO
RF_SPI_MOSI
RF_SPI_CS
RF_SPI_CLK
RF_UART_CTS
RF_UART_RTS
RF_UART_RX
RF_UART_TX
RF_I2C_SDA
RF_I2C_SCL
RF_SDIO_D[0-3]
RF_SDIO_CLK
RF_SDIO_CMD
RF_LOW_SPEED_CLK
RF_ 1 2 C_ 0
RF_ 1 2 C_ 1
RF_ SDIO_ 0
RF_ SDIO_ 1
RF_ SPI_ 3
RF_ SPI_ 2
RF_ SPI_ 1
RF_ SPI_ 0
RF_ UART_ 0
RF_ UART_ 1
RF_ UART_ 2
RF_ UART_ 3
RF_ SPI_ 3
RF_ SPI_ 2
RF_ SPI_ 1
RF_ SPI_ 0
RF_ UART_ 0
RF_ UART_ 1
RF_ UART_ 2
RF_ UART_ 3
RF_ 1 2 C_ 0
RF_ 1 2 C_ 1
RF_ SDIO_ 0
RF_ SDIO_ 1
MB_USB_TO_SER_TX
MB_USB_TO_SER_RX
RF_1_GPIO_3
RF_1_GPIO_2
RF_ 1 2 C_ 0
RF_ 1 2 C_ 1
RF_ UART_ 3
RF_ UART_ 2
RF_ UART_ 0
RF_ SPI_ 0
RF_ SPI_ 1
RF_ SPI_ 2
AFE_R_I2S_SCK
AFE_R_I2S_SDIN
AFE_R_I2S_SDIN_AUX
AFE_R_I2S_WS_LRCLK
MAVRK_RF3
AFE_R_MCLK
AFE_R_WRITE_ENABLE
AFE_R_READ_ENABLE
AFE_R_LATCH_ENABLE
AFE_R_SPI_MISO
AFE_R_SPI_MOSI
AFE_R_SPI_CLK
AFE_R_SPI_CS
AFE_R_UART_RX
AFE_R_UART_TX
AFE_R_CAN_RX
AFE_R_CAN_TX
AFE_R_I2S_SCK
AFE_R_I2S_SDIN
AFE_R_I2S_SDIN_AUX
AFE_R_I2S_WS_LRCLK
AFE_R_LATCH_GPIO_[0:15]
AFE_R_ANLG_CH_[0:7]
AFE_R_LATCH_OUTPUT_nENABLE
AFE1 _ RX_ TO_ AFE3 _ TX
AFE/SCI_R_I2C_SCL
AFE/SCI_R_I2C_SDA
AFE_R_MCLK
AFE_R_WRITE_ENABLE
AFE_R_READ_ENABLE
AFE_R_LATCH_ENABLE
AFE1_RX_TO_AFE3_TX
AFE1_TX_TO_AFE3_RX
AFE_ SCI_ 3 _ REFERENCE
MAVRK_SCI_1_MOD_SEL
MAVRK_SCI_1_MOD_IRQ
SCI_1_ANLG_CH_[0:15]
MAVRK_AFE1AFE1_CTS_TO_AFE3_RTS
AFE1_RTS_TO_AFE3_CTS
SCI_3_ANLG_CH_[0:15]
M AVRK_ SCI_ 1 _ M OD_ IRQ
AFE_ R_ SPI_ 0
AFE_R_LATCH_GPIO_[0-15]
SCI_3_GPIO_[0:3]
MAVRK_AFE_1_MOD_SEL
MAVRK_AFE_1_MOD_IRQ
AFE_ R_ SPI_ 1
AFE_R_CAN_[0:1]
AFE/SCI_ R_ I2 C_ 1
M AVRK_ AFE_ 1 _ M OD_ IRQ
AFE_ R_ SPI_ 2
AFE_R_ANLG_CH_[0:7]
AFE/SCI_ R_ I2 C_ 0
M AVRK_ AFE_ 1 _ M OD_ SEL
AFE_R_SPI_MISO
AFE_R_SPI_MOSI
AFE_R_SPI_CLK
AFE_R_SPI_CS
AFE_R_UART_[0:1]
AFE_R_CAN_0
AFE_R_CAN_1
AFE_SCI_3_REFERENCE
MAVRK_SCI_3_MOD_SEL
MAVRK_SCI_3_MOD_IRQ
AFE_R_UART_0
AFE_R_UART_1
SCI_3_I2S_SDIN_AUX
SCI_3_I2S_SDIN
SCI_3_I2S_SCK
SCI_3_I2S_WS_LRCLK
MAVRK_AFE_3_MOD_SEL
MAVRK_AFE_3_MOD_IRQ
MAVRK_SCI_4_MOD_SEL
MAVRK_SCI_4_MOD_IRQ
AFE_R_SPI_0
AFE_R_SPI_1
AFE_R_SPI_2
AFE_R_SPI_3
MAVRK_RF_3_GPIO
MAVRK_RF_3_IRQ
MAVRK_RF_3_MOD_SEL
SCI_3_ANLG_CH_[0:15]
MAVRK_AFE_4_MOD_SEL
MAVRK_AFE_4_MOD_IRQ
AFE_R_ENABLE_0
AFE_R_ENABLE_1
AFE_R_ENABLE_2
AFE/SCI_ R_ I2 C_ 1
MAVRK_SCI_1_MOD_SEL
MAVRK_SCI_1_MOD_IRQ
M AVRK_ SCI_ 1 _ M OD_ SEL
AFE_ R_ I2 S_ 0
RF_I2C_SDA
RF_I2C_SCL
RF_UART_TX
RF_UART_RX
RF_UART_RTS
RF_UART_CTS
RF_SPI_CLK
RF_SPI_CS
RF_SPI_MOSI
RF_SPI_MISO
RF_ SPI_ 3
MCU_USB_DATAMCU_USB_DATA+
RF_ 1 2 C_ 0
RF_ 1 2 C_ 1
RF_I2C_SDA
RF_I2C_SCL
2
SCI_3_GPIO_[0:3]
M AVRK_ SCI_ 4 _ M OD_ IRQ
MAVRK_AFE_1_MOD_SEL
MAVRK_AFE_1_MOD_IRQ
M AVRK_ RF_ 3 _ CTRL _ 2
AFE/SCI_ R_ I2 C_ 0
MAVRK_SCI_2_MOD_SEL
MAVRK_SCI_2_MOD_IRQ
AFE_ SCI_ 1 _ REFERENCE
MAVRK_AFE_2_MOD_SEL
MAVRK_AFE_2_MOD_IRQ
SCI_1_GPIO_[0:3]
MAVRK_MCU
M AVRK_ RF_ 3 _ CTRL _ 1
SCI_3_SPI_CLK
SCI_3_SPI_MOSI
SCI_3_SPI_MISO
SCI_3_SPI_CS
M AVRK_ SCI_ 4 _ M OD_ SEL
AFE_R_LATCH_OUTPUT_nENABLE
M AVRK_ RF_ 3 _ CTRL _ 0
AFE/SCI_R_I2C_SCL
AFE/SCI_R_I2C_SDA
M AVRK_ AFE_ 4 _ M OD_ IRQ
AFE_L_LATCH_OUTPUT_nENABLE
MAVRK_RF_3_CTRL_0
MAVRK_RF_3_CTRL_1
MAVRK_RF_3_CTRL_2
AFE_SCI_1_REFERENCE
M AVRK_ AFE_ 4 _ M OD_ SEL
AFE_R_MCLK
AFE_ R_ SPI_ 3
AFE_L_MCLK
SCI_1_SPI_CLK
SCI_1_SPI_MOSI
SCI_1_SPI_MISO
SCI_1_SPI_CS
AFE_L_LATCH_GPIO_[0-15]
AFE_ R_ CAN_ 0
AFE_L_ANLG_CH_[0:7]
SCI_1_I2S_SDIN_AUX
SCI_1_I2S_SDIN
SCI_1_I2S_SCK
SCI_1_I2S_WS_LRCLK
M AVRK_ SCI_ 2 _ M OD_ IRQ
AFE_R_CAN_TX
AFE_R_CAN_RX
AFE_ R_ CAN_ 1
AFE_L_CAN_TX
AFE_L_CAN_RX
AFE_R_I2S_0
AFE_R_I2S_1
AFE_R_I2S_2
AFE_R_I2S_3
SCI_1_ANLG_CH_[0:15]
M AVRK_ AFE_ 2 _ M OD_ IRQ
AFE_R_UART_TX
AFE_R_UART_RX
MAVRK_RF_1_GPIO
MAVRK_RF_1_IRQ
MAVRK_RF_1_MOD_SEL
SCI_1_ANLG_CH_[0:15]
M AVRK_ AFE_ 2 _ M OD_ SEL
AFE_L_UART_TX
AFE_L_UART_RX
SCI_1_GPIO_[0:3]
M AVRK_ SCI_ 2 _ M OD_ SEL
M B_ USB_ TO_ SER_ RX
3
SCI_1_GPIO_[0:3]
MAVRK_SCI_2_MOD_SEL
MAVRK_SCI_2_MOD_IRQ
AFE_R_SPI_CS
AFE_R_SPI_CLK
AFE_R_SPI_MOSI
AFE_R_SPI_MISO
M AVRK_ RF_ 1 _ M OD_ SEL
SCI_1_SPI_CLK
SCI_1_SPI_MOSI
SCI_1_SPI_MISO
SCI_1_SPI_CS
MAVRK_AFE_2_MOD_SEL
MAVRK_AFE_2_MOD_IRQ
AFE_L_SPI_CS
AFE_L_SPI_CLK
AFE_L_SPI_MOSI
AFE_L_SPI_MISO
M AVRK_ RF_ 1 _ IRQ
AFE_ R_ UART_ 0
AFE_ L _ L ATCH_ OUPUT_ n ENABL E
AFE_R_LATCH_ENABLE
AFE_R_READ_ENABLE
AFE_R_WRITE_ENABLE
M AVRK_ RF_ 1 _ GPIO
AFE_ R_ UART_ 1
AFE_L_MCLK
AFE_R_I2S_SCK
AFE_R_I2S_SDIN
AFE_R_I2S_SDIN_AUX
AFE_R_I2S_WS_LRCLK
MAVRK_RF1
AFE_R_UART_RX
AFE_R_UART_TX
AFE_L_LATCH_GPIO_[0:15]
AFE_L_LATCH_ENABLE
AFE_L_READ_ENABLE
AFE_L_WRITE_ENABLE
RF_ SDIO_ 0
AFE_ R_ I2 S_ 3
AFE_L_ANLG_CH_[0:7]
MAVRK_RF_1_GPIO
MAVRK_RF_1_IRQ
MAVRK_RF_1_MOD_SEL
AFE/SCI_R_I2C_SCL
AFE/SCI_R_I2C_SDA
AFE_L_CAN_0
AFE_L_CAN_1
MAVRK_RF_3_GPIO
MAVRK_RF_3_IRQ
MAVRK_RF_3_MOD_SEL
RF_ L OW_ SPEED_ CL K
AFE/SCI_ R_ I2 C_ 1
AFE_L_CAN_[0:1]
MAVRK_RF_4_GPIO
MAVRK_RF_4_IRQ
MAVRK_RF_4_MOD_SEL
RF_ SDIO_ 1
AFE/SCI_ R_ I2 C_ 1
AFE_L_UART_0
AFE_L_UART_1
RF_SDIO_CMD
RF_SDIO_CLK
AFE_ R_ I2 S_ 2
AFE_L_SPI_0
AFE_L_SPI_1
AFE_L_SPI_2
AFE_L_SPI_3
RF_LOW_SPEED_CLK
AFE_R_CAN_RX
AFE_R_CAN_TX
AFE_L_ENABLE_0
AFE_L_ENABLE_1
AFE_L_ENABLE_2
RF_SDIO_D[0:3]
AFE/SCI_R_I2C_SCL
AFE/SCI_R_I2C_SDA
AFE/SCI_ R_ I2 C_ 0
MAVRK_RF_4_CTRL_0
MAVRK_RF_4_CTRL_1
MAVRK_RF_4_CTRL_2
AFE/SCI_ R_ I2 C_ 0
AFE_L_UART_[0:1]
AFE_L_I2S_SCK
AFE_L_I2S_SDIN
AFE_L_I2S_SDIN_AUX
AFE_L_I2S_WS_LRCLK
RF_ 1 _ SHUTD_ 0
AFE_ R_ I2 S_ 1
AFE_L_I2S_0
AFE_L_I2S_1
AFE_L_I2S_2
AFE_L_I2S_3
RF_1_SHUTD_0
RF_1_SHUTD_1
RF_1_GPIO_2
RF_1_GPIO_3
AFE_R_I2S_SCK
AFE_R_I2S_SDIN
AFE_R_I2S_SDIN_AUX
AFE_R_I2S_WS_LRCLK
AFE_ R_ I2 S_ 0
AFE_L_SPI_[0:3]
MAVRK_RF_2_GPIO
MAVRK_RF_2_IRQ
MAVRK_RF_2_MOD_SEL
M B_ USB_ TO_ SER_ TX
D
RF_ 3 _ SHUTD_ 0
AFE_R_ANLG_CH_[0:7]
AFE_L_ENABLE_[0:2]
M AVRK_ RF_ 2 _ M OD_ SEL
PORT_EXP
RF_3_SHUTD_0
RF_3_SHUTD_1
RF_3_GPIO_2
RF_3_GPIO_3
AFE_R_LATCH_GPIO_[0:15]
C
M AVRK_ RF_ 2 _ IRQ
RF_4_SHUTD_0
RF_4_SHUTD_1
RF_4_GPIO_2
RF_4_GPIO_3
AFE_R_LATCH_OUTPUT_nENABLE
AFE_L_I2S_[0:3]
M AVRK_ RF_ 2 _ GPIO
M B_ USB_ DATA+
MAVRK_USB
PMU_EN
PMU_IRQ
MAVRK_RF_4_CTRL_[0:2]
M B_ USB_ DATA-
RF_ 2 _ GPIO_ 3
MCU_USB_DATAMCU_USB_DATA+
RF_ 2 _ GPIO_ 2
MB_USB_TO_SER_TX
MB_USB_TO_SER_RX
RF_2_GPIO_2
RF_2_GPIO_3
RF_2_SHUTD_0
RF_2_SHUTD_1
RF_ SDIO_ 1
RF_ SDIO_ 0
RF_ 1 2 C_ 1
RF_ 1 2 C_ 0
RF_ UART_ 3
RF_ UART_ 2
RF_ UART_ 1
RF_ UART_ 0
RF_ SPI_ 0
RF_ SPI_ 1
RF_ SPI_ 2
RF_ SPI_ 3
RF_ 2 _ SHUTD_ 1
RF_2_SHUTD_0
RF_2_SHUTD_1
RF_2_GPIO_2
RF_2_GPIO_3
PM U_ IRQ
AFE_L_LATCH_OUTPUT_nENABLE
MAVRK_RF_2_GPIO
MAVRK_RF_2_IRQ
MAVRK_RF_2_MOD_SEL
RF_LOW_SPEED_CLK
AFE_L_I2S_WS_LRCLK
AFE_L_I2S_SDIN_AUX
AFE_L_I2S_SDIN
AFE_L_I2S_SCK
RF_SDIO_CMD
RF_SDIO_CLK
RF_SDIO_D[0-3]
RF_I2C_SCL
RF_I2C_SDA
RF_UART_TX
RF_UART_RX
RF_UART_RTS
RF_UART_CTS
RF_SPI_CLK
RF_SPI_CS
RF_SPI_MOSI
RF_SPI_MISO
RF_ SDIO_ 1
RF_ SDIO_ 0
RF_ 1 2 C_ 1
RF_ 1 2 C_ 0
RF_ UART_ 3
RF_ UART_ 2
RF_ UART_ 1
RF_ UART_ 0
RF_ SPI_ 0
RF_ SPI_ 1
RF_ SPI_ 2
RF_ SPI_ 3
RF_ 2 _ SHUTD_ 0
PMU_EN
PMU_IRQ
MAVRK_AFE2
AFE_L_LATCH_GPIO_[0:15]
AFE_L_ANLG_CH_[0:7]
AFE_L_I2S_WS_LRCLK
AFE_L_I2S_SDIN_AUX
AFE_L_I2S_SDIN
AFE_L_I2S_SCK
AFE_L_CAN_TX
AFE_L_CAN_RX
AFE_L_UART_TX
AFE_L_UART_RX
AFE_L_SPI_CS
AFE_L_SPI_CLK
AFE_L_SPI_MOSI
AFE_L_SPI_MISO
AFE_L_MCLK
RF_4_GPIO_2
RF_4_GPIO_3
RF_4_SHUTD_0
RF_4_SHUTD_1
RF_LOW_SPEED_CLK
AFE_L_I2S_WS_LRCLK
AFE_L_I2S_SDIN_AUX
AFE_L_I2S_SDIN
AFE_L_I2S_SCK
RF_SDIO_CMD
RF_SDIO_CLK
RF_SDIO_D[0-3]
RF_I2C_SCL
RF_I2C_SDA
RF_UART_TX
RF_UART_RX
RF_UART_RTS
RF_UART_CTS
RF_SPI_CLK
RF_SPI_CS
RF_SPI_MOSI
RF_SPI_MISO
4
PM U_ EN
AFE/SCI_L_I2C_SDA
AFE/SCI_L_I2C_SCL
AFE_L_MCLK
AFE_L_LATCH_ENABLE
AFE_L_READ_ENABLE
AFE_L_WRITE_ENABLE
AFE_ L _ CAN_ 1
AFE_ L _ CAN_ 0
AFE_ L _ UART_ 1
AFE_ L _ UART_ 0
AFE_ L _ SPI_ 3
AFE_ L _ SPI_ 2
AFE_ L _ SPI_ 1
AFE_ L _ SPI_ 0
AFE_L_MCLK
RF_ 4 _ GPIO_ 3
PMU_I2C_SDA
PMU_I2C_SCL
PMU_MOD_SEL
AFE/SCI_ L _ I2 C_ 0
AFE/SCI_ L _ I2 C_ 1
SCI_2_SPI_CS
SCI_2_SPI_MISO
SCI_2_SPI_MOSI
SCI_2_SPI_CLK
SCI_2_GPIO_[0:3]
SCI_2_ANLG_CH_[0:15]
SCI_2_I2S_WS_LRCLK
SCI_2_I2S_SCK
SCI_2_I2S_SDIN
SCI_2_I2S_SDIN_AUX
AFE_SCI_2_REFERENCE
AFE_L_LATCH_OUTPUT_nENABLE
AFE_L_LATCH_GPIO_[0:15]
AFE_L_ANLG_CH_[0:7]
AFE_L_I2S_WS_LRCLK
AFE_L_I2S_SDIN_AUX
AFE_L_I2S_SDIN
AFE_L_I2S_SCK
AFE_L_CAN_TX
AFE_L_CAN_RX
AFE_L_UART_TX
AFE_L_UART_RX
AFE_L_SPI_CS
AFE_L_SPI_CLK
AFE_L_SPI_MOSI
AFE_L_SPI_MISO
AFE_ L _ ENABL E_ 2
AFE_ L _ ENABL E_ 1
AFE_ L _ ENABL E_ 0
RF_ 4 _ GPIO_ 2
PM U_ M OD_ SEL
SCI_2_GPIO_[0:3]
SCI_2_ANLG_CH_[0:15]
AFE_ SCI_ 2 _ REFERENCE
AFE/SCI_L_I2C_SDA
AFE/SCI_L_I2C_SCL
SCI_4_SPI_CS
SCI_4_SPI_MISO
SCI_4_SPI_MOSI
SCI_4_SPI_CLK
SCI_4_GPIO_[0:3]
SCI_4_ANLG_CH_[0:15]
AFE_L_MCLK
AFE_L_LATCH_ENABLE
AFE_L_READ_ENABLE
AFE_L_WRITE_ENABLE
RF_ 4 _ SHUTD_ 1
PM U_ I2 C_ SCL
PM U_ I2 C_ SDA
AFE/SCI_L_I2C_SDA
AFE/SCI_L_I2C_SCL
SCI_2_SPI_CS
SCI_2_SPI_MISO
SCI_2_SPI_MOSI
SCI_2_SPI_CLK
SCI_2_GPIO_[0:3]
SCI_2_ANLG_CH_[0:15]
SCI_2_I2S_WS_LRCLK
SCI_2_I2S_SCK
SCI_2_I2S_SDIN
SCI_2_I2S_SDIN_AUX
AFE_SCI_2_REFERENCE
SCI_4_GPIO_[0:3]
SCI_4_I2S_WS_LRCLK
SCI_4_I2S_SCK
SCI_4_I2S_SDIN
SCI_4_I2S_SDIN_AUX
AFE_SCI_4_REFERENCE
RF_ 4 _ SHUTD_ 0
PMU_I2C_SDA
PMU_I2C_SCL
PMU_MOD_SEL
AFE/SCI_L_I2C_SDA
AFE/SCI_L_I2C_SCL
SCI_4_SPI_CS
SCI_4_SPI_MISO
SCI_4_SPI_MOSI
SCI_4_SPI_CLK
SCI_4_GPIO_[0:3]
SCI_4_ANLG_CH_[0:15]
SCI_4_ANLG_CH_[0:15]
AFE/SCI_ L _ I2 C_ 0
SO8
AFE/SCI_ L _ I2 C_ 1
RUBBER FEET
SO7
AFE_ L _ I2 S_ 0
RUBBER FEET
SO6
AFE_ L _ I2 S_ 1
RUBBER FEET
SO5
AFE_ L _ I2 S_ 2
RUBBER FEET
AFE_ L _ I2 S_ 3
SO4
AFE_ L _ I2 S_ 0
SO3
MAVRK_RF2
AFE_ L _ I2 S_ 1
SO2
M AVRK_ RF_ 4 _ CTRL _ 0
AFE_ L _ I2 S_ 2
SO1
AFE2_CTS_TO_AFE4_RTS
AFE2_RTS_TO_AFE4_CTS
AFE2_TX_TO_AFE4_RX
AFE2_RX_TO_AFE4_TX
AFE_ L _ CAN_ 1
MAVRK_SCI4
AFE_ L _ CAN_ 0
AFE/SCI_L_I2C_[0:1]
AFE_ L _ UART_ 1
SCI_4_TO_PMU_V
AFE2 _ RX_ TO_ AFE4 _ TX
AFE_ L _ UART_ 0
SCI4_EN
SCI4_VSENSE
SCI_4_PWR_GOOD
VDD_FROM_SCI_4
AFE2 _ TX_ TO_ AFE4 _ RX
AFE_ L _ SPI_ 3
MAVRK_SCI_4_MOD_IRQ
MAVRK_SCI_4_MOD_SEL
AFE2 _ RTS_ TO_ AFE4 _ CTS
AFE_ L _ SPI_ 2
MAVRK_SCI_4_MOD_SEL
MAVRK_SCI_4_MOD_IRQ
AFE2 _ CTS_ TO_ AFE4 _ RTS
AFE_ L _ SPI_ 1
MAVRK_AFE_4_MOD_SEL
MAVRK_AFE_4_MOD_IRQ
M AVRK_ RF_ 4 _ CTRL _ 2
AFE_ L _ SPI_ 0
AFE2_CTS_TO_AFE4_RTS
AFE2_RTS_TO_AFE4_CTS
AFE2_TX_TO_AFE4_RX
AFE2_RX_TO_AFE4_TX
M AVRK_ RF_ 4 _ CTRL _ 1
AFE_ L _ ENABL E_ 2
AFE_ SCI_ 4 _ REFERENCE
MAVRK_RF_4_GPIO
MAVRK_RF_4_IRQ
MAVRK_RF_4_MOD_SEL
AFE_ L _ ENABL E_ 1
RUBBER FEET
AFE_ L _ ENABL E_ 0
AFE_ L _ I2 S_ 0
AFE_ L _ I2 S_ 1
AFE_ L _ I2 S_ 2
MAVRK_AFE4
AFE_ L _ I2 S_ 3
AFE_ L _ I2 S_ 0
5
AFE_ L _ I2 S_ 1
AFE/SCI_ L _ I2 C_ 0
RUBBER FEET
AFE_ L _ I2 S_ 3
AFE/SCI_ L _ I2 C_ 1
RUBBER FEET
AFE/SCI_ L _ I2 C_ 0
SCI_4_I2S_WS_LRCLK
SCI_4_I2S_SCK
SCI_4_I2S_SDIN
SCI_4_I2S_SDIN_AUX
MAVRK_RF4
AFE_ L _ I2 S_ 2
AFE_ L _ I2 S_ 3
B
AFE/SCI_ L _ I2 C_ 1
AFE_SCI_4_REFERENCE
5
RF_ 3 _ SHUTD_ 1
1
RF_ 3 _ GPIO_ 2
RF_ 3 _ GPIO_ 3
RF_ 1 _ SHUTD_ 1
RF_ 1 _ GPIO_ 2
RF_ 1 _ GPIO_ 3
RF_SPI_[0:3]
RF_UART_[0:3]
RF_I2C_[0:1]
RF_SDIO_D[0:3]
RF_SDIO_[0:1]
RF_LOW_SPEED_CLK
D
AFE_R_I2S_[0:3]
MAVRK_RF_3_CTRL_[0:2]
AFE_R_ENABLE_[0:2]
C
AFE_R_SPI_[0:3]
AFE_R_MCLK
AFE_R_ANLG_CH_[0:7]
AFE_ R_ L ATCH_ OUPUT_ n ENABL E
AFE_R_LATCH_GPIO_[0:15]
MAVRK_AFE3
SCI_ 3 _ TO_ PM U_ V
SCI3 _ EN
SCI3 _ VSENSE
SCI_ 3 _ PWR_ GOOD
MB-PRO-MVK
Rev F
Sheet 1 of 19
B
SCI_1_TO_PMU_V
SCI1 _ EN
SCI1 _ VSENSE
SCI_ 1 _ PWR_ GOOD
A
5
4
3
2
1
JTAG INTERFACE
DVDD_3_3V
PG_USB_SERIAL_IRQ
J1
JTAG
DVDD_3_3V
R223
10K
1
3
5
7
9
11
13
MCU_CON_1
D
RF_I2C_SCL
RF_I2C_SDA
RF_UART_TX
RF_UART_RX
RF_UART_CTS
RF_UART_RTS
1..14,19,1^
1..14,19,1^
P11..14,1^
P11..14,1^
P11..14,1^
P11..14,1^
RF_LOW_SPEED_CLK
MAVRK_RF_4_MOD_SEL
MAVRK_RF_4_IRQ
MAVRK_RF_4_GPIO
P11..14,1^
P14,1^
P14,1^
P14,1^
P1^,4
P1^,4,8
P1^,6
C
P10,1^,6
P1^,4,6
P1^,4,6
P1^,4,6
P1^,4,6
MAVRK_AFE_2_MOD_SEL
MAVRK_SCI_2_MOD_SEL
MAVRK_AFE_4_MOD_SEL
MAVRK_SCI_4_MOD_SEL
AFE_L_LATCH_ENABLE
AFE_L_READ_ENABLE
AFE_L_WRITE_ENABLE
AFE_L_LATCH_OUTPUT_nENABLE
*
12,14,1^,4,6
12,14,1^,4,6
12,14,1^,4,6
2,14,1^,4,6
P10,1^,4,6,8
P1^,4,6
B
AFE_L_I2S_SCK
AFE_L_I2S_WS_LRCLK
AFE_L_I2S_SDIN
AFE_L_I2S_SDIN_AUX
AFE/SCI_L_I2C_SDA
AFE_L_LATCH_GPIO_1
AFE_L_LATCH_GPIO_3
AFE_L_LATCH_GPIO_5
AFE_L_LATCH_GPIO_7
AFE_L_LATCH_GPIO_9
AFE_L_LATCH_GPIO_11
AFE_L_LATCH_GPIO_13
AFE_L_LATCH_GPIO_15
AFE_L_LATCH_GPIO_[0-15]
AFE_L_ANLG_CH_[0:7]
P1^,4,6
AFE1_TO_SCI1_REF-
AFE_L_MCLK
P12,14,1^,4,6
AFE_L_ANLG_CH_1
AFE_L_ANLG_CH_3
AFE_L_ANLG_CH_5
AFE_L_ANLG_CH_7
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
105
107
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
109
111
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
GND
GND
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
GND
GND
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
GND
GND
GND
GND
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
106
108
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
R2
47K
1/10W
DNI
JTAG_TEST
JTAG_TDO
JTAG_TDI
JTAG_TMS
JTAG_TCK
JTAG_RESET
MCU_MON_2
P18,1^
P18,1^
P18,1^
P18,1^
A0
A1
A2
VSS
VCC
WP
SCL
SDA
8
7
6
5
P11..14,1^
P11..14,1^
C2 0.1uF
P11..14,1^
10V
P11..14,1^
R1
R3
33
33
P11,1^
P11,1^
P11,1^
P15,1^
128K I2C EEPROM
M24128-BWMN6TP
ADDR is 1010000x
P15,1^
P15,1^
N/C
MAVRK_AFE_2_MOD_IRQ
MAVRK_SCI_2_MOD_IRQ
MAVRK_AFE_4_MOD_IRQ
MAVRK_SCI_4_MOD_IRQ
AFE_L_UART_TX
AFE_L_UART_RX
AFE_L_CAN_TX
AFE_L_CAN_RX
AFE1_TO_SCI1_REF+
EEPROM
1
2
3
4
P1^,4
P1^,4,8
P1^,6
P10,1^,6
P1^,4,6
P1^,4,6
P1^,4,6
P1^,4,6
P1^,3
P1^,3,7
P1^,5
P1^,5,9
P1^,3,5
P1^,3,5
P1^,3,5
P1^,3,5
MCU_USB_DATA+
MCU_USB_DATARF_SPI_CS
RF_SPI_CLK
RF_SPI_MOSI
RF_SPI_MISO
MAVRK_RF_1_MOD_SEL
MAVRK_RF_1_IRQ
MAVRK_RF_1_GPIO
PMU_I2C_SCL
PMU_I2C_SDA
PMU_EN
N/C MCU_MON_1
MAVRK_AFE_1_MOD_SEL
MAVRK_SCI_1_MOD_SEL
MAVRK_AFE_3_MOD_SEL
MAVRK_SCI_3_MOD_SEL
AFE_R_LATCH_ENABLE
AFE_R_READ_ENABLE
AFE_R_WRITE_ENABLE
AFE_R_LATCH_OUTPUT_nENABLE
105
107
P1^,4,6
P1^,4,6
P1^,4,6
P1^,4,6
P10,1^,4,6,8
AFE_L_LATCH_GPIO_0
AFE_L_LATCH_GPIO_2
AFE_L_LATCH_GPIO_4
AFE_L_LATCH_GPIO_6
AFE_L_LATCH_GPIO_8
AFE_L_LATCH_GPIO_10
AFE_L_LATCH_GPIO_12
AFE_L_LATCH_GPIO_14
P11,13,1^,3,5
P11,13,1^,3,5
P11,13,1^,3,5
P11,13,1^,3,5
P1^,3,5,7,9
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
AFE_R_I2S_SCK
AFE_R_I2S_WS_LRCLK
AFE_R_I2S_SDIN
AFE_R_I2S_SDIN_AUX
AFE/SCI_R_I2C_SDA
AFE_R_LATCH_GPIO_1
AFE_R_LATCH_GPIO_3
AFE_R_LATCH_GPIO_5
AFE_R_LATCH_GPIO_7
AFE_R_LATCH_GPIO_9
AFE_R_LATCH_GPIO_11
AFE_R_LATCH_GPIO_13
AFE_R_LATCH_GPIO_15
P1^,3,5
AFE_R_LATCH_GPIO_[0-15]
AFE_L_ANLG_CH_0
AFE_L_ANLG_CH_2
AFE_L_ANLG_CH_4
AFE_L_ANLG_CH_6
AFE_SCI_1_REFERENCE
MCU_CON_2
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
*
AFE_L_SPI_CS
AFE_L_SPI_CLK
AFE_L_SPI_MOSI
AFE_L_SPI_MISO
AFE/SCI_L_I2C_SCL
VDD_CORE
D
DVDD_3_3V
P12,1^
P12,1^
P12,1^
MB_USB_TO_SER_TX
MB_USB_TO_SER_RX
R224
10K
C1
2200pF
16V
DNI
U1
MAVRK_RF_2_MOD_SEL
MAVRK_RF_2_IRQ
MAVRK_RF_2_GPIO
DVDD_3_3V
2
4
6
8
10
12
14
P1^,3,5
AFE_R_ANLG_CH_[0:7]
AFE_R_ANLG_CH_1
AFE_R_ANLG_CH_3
AFE_R_ANLG_CH_5
AFE_R_ANLG_CH_7
N/C MCU_MON_3
P1^,3,7
110
112
109
111
2x52
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
GND
GND
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
GND
GND
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
GND
GND
GND
GND
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
106
108
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
RF_SDIO_D0
RF_SDIO_D1
RF_SDIO_D2
RF_SDIO_D3
RF_SDIO_D[0:3]
P11..14,1^
RF_SDIO_CLK
RF_SDIO_CMD
P11..14,1^
P11..14,1^
MAVRK_RF_3_MOD_SEL
MAVRK_RF_3_IRQ
MAVRK_RF_3_GPIO
P13,1^
P13,1^
P13,1^
PMU_MOD_SEL
PMU_IRQ
MAVRK_AFE_1_MOD_IRQ
MAVRK_SCI_1_MOD_IRQ
MAVRK_AFE_3_MOD_IRQ
MAVRK_SCI_3_MOD_IRQ
AFE_R_UART_TX
AFE_R_UART_RX
AFE_R_CAN_TX
AFE_R_CAN_RX
P15,1^
P15,1^
P1^,3
P1^,3,7
P1^,5
P1^,5,9
P1^,3,5
P1^,3,5
P1^,3,5
P1^,3,5
C
AVDD_5_5V
AFE_R_SPI_CS
AFE_R_SPI_CLK
AFE_R_SPI_MOSI
AFE_R_SPI_MISO
AFE/SCI_R_I2C_SCL
P1^,3,5
P1^,3,5
P1^,3,5
P1^,3,5
P1^,3,5,7,9
AFE_R_LATCH_GPIO_0
AFE_R_LATCH_GPIO_2
AFE_R_LATCH_GPIO_4
AFE_R_LATCH_GPIO_6
AFE_R_LATCH_GPIO_8
AFE_R_LATCH_GPIO_10
AFE_R_LATCH_GPIO_12
AFE_R_LATCH_GPIO_14
B
AFE_R_MCLK
P11,13,1^,3,5
AFE_R_ANLG_CH_0
AFE_R_ANLG_CH_2
AFE_R_ANLG_CH_4
AFE_R_ANLG_CH_6
110
112
MCU SLOT
(PG 1 of 1)
2x52
A
A
Title
* AFE TO SCI REFERENCE (+/-) IS ONLY AVAILABLE IN SLOT 1
Size B
MB-PRO-MVK
EDGE No
6517814
Rev
Date Monday, August 15, 2011
5
4
3
2
F
Sheet 2 of 19
1
5
4
3
AFE_R_LATCH_OUTPUT_nENABLE
2
1
P1^,2,5
AFE_R_LATCH_GPIO_[0:15]
P1^,2,5
AFE1_CTS_TO_AFE3_RTS
AFE1_RX_TO_AFE3_TX
AFE1_RTS_TO_AFE3_CTS
AFE1_TX_TO_AFE3_RX
P1^,5
P1^,5
P1^,5
P1^,5
AFE_R_UART_TX
AFE_R_UART_RX
AFE_R_CAN_TX
AFE_R_CAN_RX
P1^,2,5
P1^,2,5
P1^,2,5
P1^,2,5
D
AFE_R_LATCH_GPIO_1
AFE_R_LATCH_GPIO_3
AFE_R_LATCH_GPIO_5
AFE_R_LATCH_GPIO_7
AFE_R_LATCH_GPIO_9
AFE_R_LATCH_GPIO_11
AFE_R_LATCH_GPIO_13
AFE_R_LATCH_GPIO_15
R4
R5
R6
R7
R8
R9
R10
R11
200K
200K
200K
200K
200K
200K
200K
200K
D
AFE_R_LATCH_ENABLE
AFE_R_READ_ENABLE
AFE_R_WRITE_ENABLE
P1^,2,5
P1^,2,5
P1^,2,5
C
GREEN
D1
P1^,2
SCI_1_GPIO_[0:3]
B
54
56
GND
GND
AFE_R_ANLG_CH_0
AFE_R_ANLG_CH_1
AFE_R_ANLG_CH_2
AFE_R_ANLG_CH_3
AFE_R_ANLG_CH_4
AFE_R_ANLG_CH_5
AFE_R_ANLG_CH_6
AFE_R_ANLG_CH_7
MAVRK_AFE_1_MOD_IRQ
P1^,2
MAVRK_SCI_1_MOD_IRQ
P1^,2,7
P1^,7
R20
1/16W
MAVRK_AFE_1_MOD_SEL
R12
R13
R14
R15
R16
R17
R18
R19
200K
200K
200K
200K
200K
200K
200K
200K
C
2.2K
MAVRK_SCI_1_MOD_SEL
P1^,2,7
N/C
AFE_R_LATCH_GPIO_14
AFE_R_LATCH_GPIO_12
AFE_R_LATCH_GPIO_10
AFE_R_LATCH_GPIO_8
AFE_R_LATCH_GPIO_6
AFE_R_LATCH_GPIO_4
AFE_R_LATCH_GPIO_2
AFE_R_LATCH_GPIO_0
AFE/SCI_R_I2C_SCL
AFE_R_SPI_CS
AFE_R_SPI_CLK
AFE_R_SPI_MOSI
AFE_R_SPI_MISO
P1^,2,5,7,9
P1^,2,5
P1^,2,5
P1^,2,5
P1^,2,5
AFE1_SEL
AFE_1_MON_2
AFE_R_I2S_SCK
AFE_R_I2S_WS_LRCLK
AFE_R_I2S_SDIN
AFE_R_I2S_SDIN_AUX
AFE/SCI_R_I2C_SDA
P11,13,1^,2,5
P11,13,1^,2,5
P11,13,1^,2,5
P11,13,1^,2,5
P1^,2,5,7,9
53
55
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
AFE1_CON_1
2x26
QRF8-026-05.0-L-D-A
GND
GND
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
DVDD_3_3V
AFE_R_ANLG_CH_[0:7]
P1^,2,5
AVDD_5_5V
AFE1_TO_SCI1_REF+
AFE1_TO_SCI1_REF-
SCI_1_GPIO_0
SCI_1_GPIO_1
SCI_1_GPIO_2
SCI_1_GPIO_3
N/C
AFE1_TO_SCI1_ANLG_VSS
AFE1_TO_SCI1_ANLG_VDD
AFE_1_MON_1
B
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
AFE_R_MCLK
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
P11,13,1^,2,5
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
AFE1_CON_2
2x30
ERF5-30-05.0-L-DV-K
AFE_SCI_1_REFERENCE
P1^,2,7
P1^,7
P1^,7
P1^,7
P1^,7
A
P1^,7
P1^,7
P1^,7
P1^,7
SCI_1_ANLG_CH_15
SCI_1_ANLG_CH_14
SCI_1_ANLG_CH_13
SCI_1_ANLG_CH_12
SCI_1_ANLG_CH_11
SCI_1_ANLG_CH_10
SCI_1_ANLG_CH_9
SCI_1_ANLG_CH_8
SCI_1_ANLG_CH_7
SCI_1_ANLG_CH_6
SCI_1_ANLG_CH_5
SCI_1_ANLG_CH_4
SCI_1_ANLG_CH_3
SCI_1_ANLG_CH_2
SCI_1_ANLG_CH_1
SCI_1_ANLG_CH_0
SCI_1_I2S_SDIN_AUX
SCI_1_I2S_SDIN
SCI_1_I2S_WS_LRCLK
SCI_1_I2S_SCK
SCI_1_SPI_CS
SCI_1_SPI_CLK
SCI_1_SPI_MOSI
SCI_1_SPI_MISO
AFE SLOT 1
(PG 1 of 1)
A
Title
SCI_1_ANLG_CH_[0:15]
Size B
P1^,7
MB-PRO-MVK
EDGE No
6517814
Rev
Date Monday, August 15, 2011
5
4
3
2
F
Sheet 3 of 19
1
5
4
3
AFE_L_LATCH_OUTPUT_nENABLE
AFE2_CTS_TO_AFE4_RTS
AFE2_RX_TO_AFE4_TX
AFE2_RTS_TO_AFE4_CTS
AFE2_TX_TO_AFE4_RX
P1^,6
P1^,6
P1^,6
P1^,6
1
P1^,2,6
AFE_L_LATCH_GPIO_[0:15]
AFE_L_LATCH_GPIO_1
AFE_L_LATCH_GPIO_3
AFE_L_LATCH_GPIO_5
AFE_L_LATCH_GPIO_7
AFE_L_LATCH_GPIO_9
AFE_L_LATCH_GPIO_11
AFE_L_LATCH_GPIO_13
AFE_L_LATCH_GPIO_15
AFE_L_UART_TX
AFE_L_UART_RX
AFE_L_CAN_TX
AFE_L_CAN_RX
P1^,2,6
P1^,2,6
P1^,2,6
P1^,2,6
D
2
R21
R22
R23
R24
R25
R26
R27
R28
P1^,2,6
200K
200K
200K
200K
200K
200K
200K
200K
D
AFE_L_LATCH_ENABLE
AFE_L_READ_ENABLE
AFE_L_WRITE_ENABLE
P1^,2,6
P1^,2,6
P1^,2,6
C
GREEN
AFE2_SEL
D2
2.2K
54
56
MAVRK_AFE_2_MOD_IRQ
P1^,2
MAVRK_SCI_2_MOD_IRQ
P1^,2,8
B
R29
R30
R31
R32
R33
R34
R35
R36
AFE_L_ANLG_CH_0
AFE_L_ANLG_CH_1
AFE_L_ANLG_CH_2
AFE_L_ANLG_CH_3
AFE_L_ANLG_CH_4
AFE_L_ANLG_CH_5
AFE_L_ANLG_CH_6
AFE_L_ANLG_CH_7
MAVRK_AFE_2_MOD_SEL
MAVRK_SCI_2_MOD_SEL
P1^,2,8
SCI_2_GPIO_[0:3]
GND
GND
R37
1/16W
P1^,2
N/C
AFE_L_LATCH_GPIO_14
AFE_L_LATCH_GPIO_12
AFE_L_LATCH_GPIO_10
AFE_L_LATCH_GPIO_8
AFE_L_LATCH_GPIO_6
AFE_L_LATCH_GPIO_4
AFE_L_LATCH_GPIO_2
AFE_L_LATCH_GPIO_0
AFE/SCI_L_I2C_SCL
AFE_L_SPI_CS
AFE_L_SPI_CLK
AFE_L_SPI_MOSI
AFE_L_SPI_MISO
P10,1^,2,6,8
P1^,2,6
P1^,2,6
P1^,2,6
P1^,2,6
P1^,8
AFE_2_MON_2
AFE_L_I2S_SCK
AFE_L_I2S_WS_LRCLK
AFE_L_I2S_SDIN
AFE_L_I2S_SDIN_AUX
AFE/SCI_L_I2C_SDA
P12,14,1^,2,6
P12,14,1^,2,6
P12,14,1^,2,6
P12,14,1^,2,6
P10,1^,2,6,8
53
55
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
AFE2_CON_1
2x26
QRF8-026-05.0-L-D-A
GND
GND
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
DVDD_3_3V
200K
200K
200K
200K
200K
200K
200K
200K
C
AFE_L_ANLG_CH_[0:7]
P1^,2,6
AVDD_5_5V
AFE2_TO_SCI2_REF+
AFE2_TO_SCI2_REF-
SCI_2_GPIO_0
SCI_2_GPIO_1
SCI_2_GPIO_2
SCI_2_GPIO_3
B
N/C
AFE2_TO_SCI2_ANLG_VSS
AFE2_TO_SCI2_ANLG_VDD
AFE_2_MON_1
AFE_L_MCLK
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
P12,14,1^,2,6
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
AFE2_CON_2
2x30
ERF5-30-05.0-L-DV-K
AFE_SCI_2_REFERENCE
P1^,8
A
P1^,8
P1^,8
P1^,8
P1^,8
P1^,8
P1^,8
P1^,8
P1^,8
SCI_2_ANLG_CH_15
SCI_2_ANLG_CH_14
SCI_2_ANLG_CH_13
SCI_2_ANLG_CH_12
SCI_2_ANLG_CH_11
SCI_2_ANLG_CH_10
SCI_2_ANLG_CH_9
SCI_2_ANLG_CH_8
SCI_2_ANLG_CH_7
SCI_2_ANLG_CH_6
SCI_2_ANLG_CH_5
SCI_2_ANLG_CH_4
SCI_2_ANLG_CH_3
SCI_2_ANLG_CH_2
SCI_2_ANLG_CH_1
SCI_2_ANLG_CH_0
SCI_2_I2S_SDIN_AUX
SCI_2_I2S_SDIN
SCI_2_I2S_WS_LRCLK
SCI_2_I2S_SCK
SCI_2_SPI_CS
SCI_2_SPI_CLK
SCI_2_SPI_MOSI
SCI_2_SPI_MISO
AFE SLOT 2
(PG 1 of 1)
A
Title
SCI_2_ANLG_CH_[0:15]
Size B
MB-PRO-MVK
EDGE No
6517814
Rev
Date Monday, August 15, 2011
5
4
3
F
P1^,8
2
Sheet 4 of 19
1
5
4
3
AFE_R_LATCH_OUTPUT_nENABLE
AFE1_CTS_TO_AFE3_RTS
AFE1_RX_TO_AFE3_TX
AFE1_RTS_TO_AFE3_CTS
AFE1_TX_TO_AFE3_RX
P1^,3
P1^,3
P1^,3
P1^,3
P1..3
AFE_R_LATCH_GPIO_[0:15]
1
P1..3
AFE_R_LATCH_GPIO_1
AFE_R_LATCH_GPIO_3
AFE_R_LATCH_GPIO_5
AFE_R_LATCH_GPIO_7
AFE_R_LATCH_GPIO_9
AFE_R_LATCH_GPIO_11
AFE_R_LATCH_GPIO_13
AFE_R_LATCH_GPIO_15
AFE_R_UART_TX
AFE_R_UART_RX
AFE_R_CAN_TX
AFE_R_CAN_RX
P1..3
P1..3
P1..3
P1..3
D
2
D
AFE_R_LATCH_ENABLE
AFE_R_READ_ENABLE
AFE_R_WRITE_ENABLE
P1..3
P1..3
P1..3
C
P1..3
P1..3
P1..3
P1..3
D3
2.2K
AFE3_SEL
P1^,2
54
56
GND
GND
R38
1/16W
MAVRK_SCI_3_MOD_SEL
MAVRK_AFE_3_MOD_IRQ
P1^,2
MAVRK_SCI_3_MOD_IRQ
P1^,2,9
SCI_3_GPIO_[0:3]
B
P1..3
N/C
AFE3_TO_SCI3_ANLG_VSS
AFE3_TO_SCI3_ANLG_VDD
AFE_3_MON_1
B
AFE_R_MCLK
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
P11,13,1..3
AFE_R_ANLG_CH_[0:7]
AVDD_5_5V
AFE3_TO_SCI3_REF+
AFE3_TO_SCI3_REF-
SCI_3_GPIO_0
SCI_3_GPIO_1
SCI_3_GPIO_2
SCI_3_GPIO_3
P1^,9
C
AFE_R_ANLG_CH_0
AFE_R_ANLG_CH_1
AFE_R_ANLG_CH_2
AFE_R_ANLG_CH_3
AFE_R_ANLG_CH_4
AFE_R_ANLG_CH_5
AFE_R_ANLG_CH_6
AFE_R_ANLG_CH_7
MAVRK_AFE_3_MOD_SEL
P1^,2,9
N/C
AFE_R_LATCH_GPIO_14
AFE_R_LATCH_GPIO_12
AFE_R_LATCH_GPIO_10
AFE_R_LATCH_GPIO_8
AFE_R_LATCH_GPIO_6
AFE_R_LATCH_GPIO_4
AFE_R_LATCH_GPIO_2
AFE_R_LATCH_GPIO_0
AFE/SCI_R_I2C_SCL
AFE_R_SPI_CS
AFE_R_SPI_CLK
AFE_R_SPI_MOSI
AFE_R_SPI_MISO
P1..3,7,9
GREEN
AFE_3_MON_2
AFE_R_I2S_SCK
AFE_R_I2S_WS_LRCLK
AFE_R_I2S_SDIN
AFE_R_I2S_SDIN_AUX
AFE/SCI_R_I2C_SDA
P11,13,1..3
P11,13,1..3
P11,13,1..3
P11,13,1..3
P1..3,7,9
53
55
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
AFE3_CON_1
2x26
QRF8-026-05.0-L-D-A
GND
GND
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
DVDD_3_3V
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
AFE3_CON_2
2x30
ERF5-30-05.0-L-DV-K
AFE_SCI_3_REFERENCE
P1^,9
P1^,9
P1^,9
P1^,9
P1^,9
A
P1^,9
P1^,9
P1^,9
P1^,9
SCI_3_ANLG_CH_15
SCI_3_ANLG_CH_14
SCI_3_ANLG_CH_13
SCI_3_ANLG_CH_12
SCI_3_ANLG_CH_11
SCI_3_ANLG_CH_10
SCI_3_ANLG_CH_9
SCI_3_ANLG_CH_8
SCI_3_ANLG_CH_7
SCI_3_ANLG_CH_6
SCI_3_ANLG_CH_5
SCI_3_ANLG_CH_4
SCI_3_ANLG_CH_3
SCI_3_ANLG_CH_2
SCI_3_ANLG_CH_1
SCI_3_ANLG_CH_0
SCI_3_I2S_SDIN_AUX
SCI_3_I2S_SDIN
SCI_3_I2S_WS_LRCLK
SCI_3_I2S_SCK
SCI_3_SPI_CS
SCI_3_SPI_CLK
SCI_3_SPI_MOSI
SCI_3_SPI_MISO
AFE SLOT 3
(PG 1 of 1)
A
Title
SCI_3_ANLG_CH_[0:15]
Size B
P1^,9
MB-PRO-MVK
EDGE No
6517814
Rev
Date Monday, August 15, 2011
5
4
3
2
F
Sheet 5 of 19
1
5
4
3
AFE_L_LATCH_OUTPUT_nENABLE
AFE2_CTS_TO_AFE4_RTS
AFE2_RX_TO_AFE4_TX
AFE2_RTS_TO_AFE4_CTS
AFE2_TX_TO_AFE4_RX
P1^,4
P1^,4
P1^,4
P1^,4
1
P1^,2,4
AFE_L_LATCH_GPIO_[0:15]
P1^,2,4
AFE_L_LATCH_GPIO_1
AFE_L_LATCH_GPIO_3
AFE_L_LATCH_GPIO_5
AFE_L_LATCH_GPIO_7
AFE_L_LATCH_GPIO_9
AFE_L_LATCH_GPIO_11
AFE_L_LATCH_GPIO_13
AFE_L_LATCH_GPIO_15
AFE_L_UART_TX
AFE_L_UART_RX
AFE_L_CAN_TX
AFE_L_CAN_RX
P1^,2,4
P1^,2,4
P1^,2,4
P1^,2,4
D
2
D
AFE_L_LATCH_ENABLE
AFE_L_READ_ENABLE
AFE_L_WRITE_ENABLE
P1^,2,4
P1^,2,4
P1^,2,4
C
GREEN
AFE4_SEL
D4
2.2K
54
56
MAVRK_AFE_4_MOD_SEL
MAVRK_SCI_4_MOD_SEL
P10,1^,2
MAVRK_AFE_4_MOD_IRQ
P1^,2
MAVRK_SCI_4_MOD_IRQ
P10,1^,2
SCI_4_GPIO_[0:3]
B
AFE_L_ANLG_CH_[0:7]
P1^,2,4
AVDD_5_5V
AFE4_TO_SCI4_REF+
AFE4_TO_SCI4_REFN/C
AFE_4_MON_1
AFE4_TO_SCI4_ANLG_VSS
AFE4_TO_SCI4_ANLG_VDD
SCI_4_GPIO_0
SCI_4_GPIO_1
SCI_4_GPIO_2
SCI_4_GPIO_3
P10,1^
C
AFE_L_ANLG_CH_0
AFE_L_ANLG_CH_1
AFE_L_ANLG_CH_2
AFE_L_ANLG_CH_3
AFE_L_ANLG_CH_4
AFE_L_ANLG_CH_5
AFE_L_ANLG_CH_6
AFE_L_ANLG_CH_7
R39
1/16W
P1^,2
N/C
AFE_L_LATCH_GPIO_14
AFE_L_LATCH_GPIO_12
AFE_L_LATCH_GPIO_10
AFE_L_LATCH_GPIO_8
AFE_L_LATCH_GPIO_6
AFE_L_LATCH_GPIO_4
AFE_L_LATCH_GPIO_2
AFE_L_LATCH_GPIO_0
AFE/SCI_L_I2C_SCL
AFE_L_SPI_CS
AFE_L_SPI_CLK
AFE_L_SPI_MOSI
AFE_L_SPI_MISO
P10,1^,2,4,8
P1^,2,4
P1^,2,4
P1^,2,4
P1^,2,4
GND
GND
AFE_4_MON_2
AFE_L_I2S_SCK
AFE_L_I2S_WS_LRCLK
AFE_L_I2S_SDIN
AFE_L_I2S_SDIN_AUX
AFE/SCI_L_I2C_SDA
P12,14,1^,2,4
P12,14,1^,2,4
P12,14,1^,2,4
P12,14,1^,2,4
P10,1^,2,4,8
53
55
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
AFE4_CON_1
2x26
QRF8-026-05.0-L-D-A
GND
GND
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
DVDD_3_3V
B
AFE_L_MCLK
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
P12,14,1^,2,4
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
AFE4_CON_2
2x30
ERF5-30-05.0-L-DV-K
P10,1^
AFE_SCI_4_REFERENCE
P10,1^
P10,1^
P10,1^
P10,1^
A
P10,1^
P10,1^
P10,1^
P10,1^
SCI_4_ANLG_CH_15
SCI_4_ANLG_CH_14
SCI_4_ANLG_CH_13
SCI_4_ANLG_CH_12
SCI_4_ANLG_CH_11
SCI_4_ANLG_CH_10
SCI_4_ANLG_CH_9
SCI_4_ANLG_CH_8
SCI_4_ANLG_CH_7
SCI_4_ANLG_CH_6
SCI_4_ANLG_CH_5
SCI_4_ANLG_CH_4
SCI_4_ANLG_CH_3
SCI_4_ANLG_CH_2
SCI_4_ANLG_CH_1
SCI_4_ANLG_CH_0
SCI_4_I2S_SDIN_AUX
SCI_4_I2S_SDIN
SCI_4_I2S_WS_LRCLK
SCI_4_I2S_SCK
SCI_4_SPI_CS
SCI_4_SPI_CLK
SCI_4_SPI_MOSI
SCI_4_SPI_MISO
AFE SLOT 4
(PG 1 of 1)
A
Title
MB-PRO-MVK
SCI_4_ANLG_CH_[0:15]
Size B
P10,1^
EDGE No
6517814
Rev F
Date Monday, August 15, 2011
5
4
3
2
Sheet 6 of 19
1
5
4
3
2
1
SCI_1_ANLG_CH_[0:15]
VDD_AUX_1A
VDD_AUX_1B
D
AUX/GND/VSS/VDD
1A
1B
VDD_AUX_1C
2A
2B
SCI_1_SPI_MISO
SCI_1_SPI_MOSI
SCI_1_SPI_CLK
SCI_1_SPI_CS
P1^,3
P1^,3
P1^,3
P1^,3
3A
3B
4A
4B
SCI_1_I2S_SCK
SCI_1_I2S_WS_LRCLK
SCI_1_I2S_SDIN
SCI_1_I2S_SDIN_AUX
P1^,3
P1^,3
P1^,3
P1^,3
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
1x4 TERM BLK
1770908
OVER VOLTAGE PROTECTION
2
5
1
2
5
VDD_AUX_1B
GND
GND
SCI_1_TO_PMU_VIN
(TO OVER VOLTAGE PROTECTION)
6D
6E
6F
6
6
6
SCI1_CON_2
1x6 PWR
POWER
UPS-06-04.0-02-L-V
B
6A
6B
6C
6
6
6
5D
5E
5F
5
5
5
5A
5B
5C
5
5
5
4D
4E
4F
4
4
4
4
4
4
3A 3D
3B 3E
3C 3F
4A
4B
4C
1A
1B
1C
3A
3B
3C
1D
1E
1F
1
1
1
Q3
3D
3E
3F
VDD_AUX_1A
4
7
1
1
1
C4
0.1uF
10V
D9
6.2V
VDD_AUX_1C
1
2
3
TLVH431ACDBZ
U2
1
G
2
D
B
3
S-pad
S
R47
4.75K
1/10W
VDD_FROM_SCI_1
8
6
N/C
DVDD_3_3V
SCI_1_AVDD_5_5_MON
2D
2E
2F
D
2
TRIPS AT 6V
AFE1_TO_SCI1_REF+
SCI_1_DVDD_3_3_MON
2
2
2
1
1
CSD17313Q2
P1..3
AFE1_TO_SCI1_REF-
AVDD_5_5V
D
C3
22uF
25V
R45
10K
R46
1/16W
MAVRK_SCI_1_MOD_SEL
MAVRK_SCI_1_MOD_IRQ
N/C
15K
R44
18.2K
1/16W
P1..3
P1..3
P15,1^
AFE_SCI_1_REFERENCE
2.2K
6.2V
D
D-pad
R43
OVER VOLTAGE
PROTECTION D60
R42
20K
1/10W
D8
2
2
2
G
R41
2.2K
1/16W
SCI_1_PWR_GOOD
Q2
GREEN
SCI1_SEL
REVERSE POLARITY
PROTECTION
AFE1_TO_SCI1_ANLG_VSS
AFE/SCI_R_I2C_SDA
AFE/SCI_R_I2C_SCL
P1..3,5,9
P1..3,5,9
4
C
AFE1_TO_SCI1_ANLG_VDD
2A
2B
2C
D
S
Q1
C80
0.1uF
10V
S
R40
100K
1/10W
G
D
S
D6
6.2V
S
5
SCI1_CON_1
2x26
QRF8-026-05.0-L-D-A
SCI_1_GPIO_3
SCI_1_GPIO_2
SCI_1_GPIO_1
SCI_1_GPIO_0
3
D
D
4
SCI_1_GPIO_[0:3]
P1^,3
2
S
PWR REVERSED
6
S
2
6
1
S
1
7
S
3
D7
RED
7
D
2
C
8
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
CSD25401Q3
8
D
CSD25401Q3
1
D
53
55
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
(FROM SCI CONNECTOR)
SCI_1_TO_PMU_VIN
P1^,3
54
56
ST1
SCI_1_ANLG_CH_0
SCI_1_ANLG_CH_1
SCI_1_ANLG_CH_2
SCI_1_ANLG_CH_3
SCI_1_ANLG_CH_4
SCI_1_ANLG_CH_5
SCI_1_ANLG_CH_6
SCI_1_ANLG_CH_7
SCI_1_ANLG_CH_8
SCI_1_ANLG_CH_9
SCI_1_ANLG_CH_10
SCI_1_ANLG_CH_11
SCI_1_ANLG_CH_12
SCI_1_ANLG_CH_13
SCI_1_ANLG_CH_14
SCI_1_ANLG_CH_15
SCI Connectors
(Fixed locations)
GND
GND
SCI Terminal Block
(TO OVER VOLTAGE PROTECTION)
<IREF>
TP1
SCI_1_TO_PMU_V
White
SCI_1_TO_PMU_V
R49
100K
1/10W
15,1^
2
SCI1_VSENSE
SCI1_EN
C7
0.1uF
10V
R52
100K
1/10W
P15,1^
R54
100K
1/10W
D11
B350A-13-F
U3
D10
2
3
RED
SCI_1_TO_PMU_V
R50
100K
1/10W
A
SCI_1_TO_PMU_VIN
Fault protection and Enable control for SCI's, when enabled it becomes PWR_IN
R48
412
1/10W
1
C5
0.1uF
10V
P15,1^
VDD_FROM_SCI_1
8
4
IN
IN
OUT
OUT
ILIM
FAULT GND
EN
PWRP
TPS2557DRB
7
6
5
1
9
1
R51
22.1K
1/10W
Set for 5.0A
(4.602 - 5.331A)
C6
1uF
10V
2
SCI SLOT 1
(PG 1 of 1)
PWR_IN
(4.5-6V)
A
Title
SEE PMU SLOT (PG 1 of 2)
POWER SUPPLY for UCD9081
(PAGE 15)
Size B
MB-PRO-MVK
EDGE No
6517814
Rev
Date Monday, August 15, 2011
5
4
3
2
F
Sheet 7 of 19
1
4
3
SCI Terminal Block
VDD_AUX_2
VDD_AUX_2B
D
VDD_AUX_2C
2A
2B
SCI_2_SPI_MISO
SCI_2_SPI_MOSI
SCI_2_SPI_CLK
SCI_2_SPI_CS
P1^,4
P1^,4
P1^,4
P1^,4
3A
3B
SCI_2_I2S_SCK
SCI_2_I2S_WS_LRCLK
SCI_2_I2S_SDIN
SCI_2_I2S_SDIN_AUX
P1^,4
P1^,4
P1^,4
P1^,4
4A
4B
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
1x4 TERM BLK
1770908
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
OVER VOLTAGE PROTECTION
P10,1^,2,4,6
P10,1^,2,4,6
Q6
(TO OVER VOLTAGE PROTECTION)
2
VDD_AUX_2B
4
7
6D
6E
6F
6
6
6
6
6
6
SCI2_CON_2
1x6 PWR
POWER
UPS-06-04.0-02-L-V
B
6A
6B
6C
5D
5E
5F
5A
5B
5C
5
5
5
5
5
5
4D
4E
4F
4
4
4
4
4
4
1
1
1
1A
1B
1C
4A
4B
4C
1
1
1
Q7
3D
3E
3F
VDD_AUX_2A
1
2
3
TLVH431ACDBZ
U4
G
2
D
1
B
3
C9
0.1uF
10V
D16
6.2V
SCI_2_TO_PMU_VIN
5
S-pad
S
R62
4.75K
1/10W
VDD_FROM_SCI_2
VDD_AUX_2C
3A 3D
3B 3E
3C 3F
D
2
TRIPS AT 6V
8
6
N/C
DVDD_3_3V
3A
3B
3C
1
AFE2_TO_SCI2_REF+
SCI_2_DVDD_3_3_MON
SCI_2_AVDD_5_5_MON
N/C
1
CSD17313Q2
P1^,4
AFE2_TO_SCI2_REF-
AVDD_5_5V
D
C8
22uF
25V
R60
10K
R61
1/16W
MAVRK_SCI_2_MOD_SEL
MAVRK_SCI_2_MOD_IRQ
P1^,2,4
P1^,2,4
P15,1^
AFE_SCI_2_REFERENCE
2.2K
1D
1E
1F
R59
18.2K
1/16W
D15
6.2V
15K
C
AFE2_TO_SCI2_ANLG_VSS
SCI_2_PWR_GOOD
GREEN
SCI2_SEL
1
R58
R57
20K
1/10W
D
D-pad
R56
2.2K
1/16W
OVER VOLTAGE
PROTECTION D61
AFE2_TO_SCI2_ANLG_VDD
2
2
2
G
REVERSE POLARITY
PROTECTION
SCI2_CON_1
2x26
QRF8-026-05.0-L-D-A
AFE/SCI_L_I2C_SDA
AFE/SCI_L_I2C_SCL
2A
2B
2C
D
S
Q5
4
S
R55
100K
1/10W
5
C81
0.1uF
10V
G
D
S
D13
6.2V
2D
2E
2F
2
S
5
D
D
S
4
SCI_2_GPIO_3
SCI_2_GPIO_2
SCI_2_GPIO_1
SCI_2_GPIO_0
3
2
2
2
S
PWR REVERSED
6
SCI_2_GPIO_[0:3]
P1^,4
2
S
2
6
1
S
1
7
D
3
D14
RED
7
D
2
C
8
D
53
55
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
CSD25401Q3
8
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
CSD25401Q3
1
GND
GND
(FROM SCI CONNECTOR)
SCI_2_TO_PMU_VIN
SCI_2_ANLG_CH_[0:15]
54
56
AUX/GND/VSS/VDD
1A
1B
1
SCI_2_ANLG_CH_0
P1^,4
SCI_2_ANLG_CH_1
SCI_2_ANLG_CH_2
SCI_2_ANLG_CH_3
SCI_2_ANLG_CH_4
SCI_2_ANLG_CH_5
SCI_2_ANLG_CH_6
SCI_2_ANLG_CH_7
SCI_2_ANLG_CH_8
SCI_2_ANLG_CH_9
SCI_2_ANLG_CH_10
SCI_2_ANLG_CH_11
SCI_2_ANLG_CH_12
SCI_2_ANLG_CH_13
SCI_2_ANLG_CH_14
SCI_2_ANLG_CH_15
SCI Connectors
(Fixed locations)
VDD_AUX_2A
ST2
2
GND
GND
5
(TO OVER VOLTAGE PROTECTION)
<IREF>
TP2
SCI_2_TO_PMU_V
White
SCI_2_TO_PMU_V
P15,1^
VDD_FROM_SCI_2
SCI_2_TO_PMU_VIN
Fault protection and Enable control for SCI's, when enabled it becomes PWR_IN
C10
0.1uF
10V
R63
100K
1/10W
R65
412
1/10W
2
D17
3 IN
RED
SCI_2_TO_PMU_V IN
A
2
SCI2_VSENSE
SCI2_EN
P15,1^
C12
0.1uF
10V
R67
100K
1/10W
P15,1^
R68
100K
1/10W
D12
B350A-13-F
U5
1
R64
100K
1/10W
8
4
OUT
OUT
ILIM
FAULT GND
EN
PWRP
TPS2557DRB
7
6
1
5
1
9
C11
1uF
10V
R66
22.1K
1/10W
Set for 5.0A
(4.602 - 5.331A)
2
SCI SLOT 2
(PG 1 of 1)
PWR_IN
(4.5-6V)
A
Title
SEE PMU SLOT (PG 1 of 2)
POWER SUPPLY for UCD9081
(PAGE 15)
Size B
MB-PRO-MVK
EDGE No
6517814
Rev
Date Monday, August 15, 2011
5
4
3
2
F
Sheet 8 of 19
1
3
SCI Terminal Block
AUX/GND/VSS/VDD
D
SCI_3_ANLG_CH_0
SCI_3_ANLG_CH_1
SCI_3_ANLG_CH_2
SCI_3_ANLG_CH_3
SCI_3_ANLG_CH_4
SCI_3_ANLG_CH_5
SCI_3_ANLG_CH_6
SCI_3_ANLG_CH_7
SCI_3_ANLG_CH_8
SCI_3_ANLG_CH_9
SCI_3_ANLG_CH_10
SCI_3_ANLG_CH_11
SCI_3_ANLG_CH_12
SCI_3_ANLG_CH_13
SCI_3_ANLG_CH_14
SCI_3_ANLG_CH_15
VDD_AUX_3C
2A
2B
SCI_3_SPI_MISO
SCI_3_SPI_MOSI
SCI_3_SPI_CLK
SCI_3_SPI_CS
P1^,5
P1^,5
P1^,5
P1^,5
3A
3B
SCI_3_I2S_SCK
SCI_3_I2S_WS_LRCLK
SCI_3_I2S_SDIN
SCI_3_I2S_SDIN_AUX
P1^,5
P1^,5
P1^,5
P1^,5
4A
4B
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
1x4 TERM BLK
1770908
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
SCI_3_TO_PMU_VIN
CSD25401Q3
4
(TO OVER VOLTAGE PROTECTION)
6D
6E
6F
6
6
6
6
6
6
5D
5E
5F
5
5
5
5
5
5
4D
4E
4F
4
4
4
SCI3_CON_2
1x6 PWR
POWER
UPS-06-04.0-02-L-V
B
6A
6B
6C
1A
1B
1C
5A
5B
5C
Q11
4
4
4
1
1
1
4
7
1
1
1
2
VDD_AUX_3A
SCI_3_TO_PMU_VIN
VDD_AUX_3B
1
2
3
G
TLVH431ACDBZ
U6
5
N/C
DVDD_3_3V
4A
4B
4C
D
1
S-pad
S
B
C14
0.1uF
10V
D23
6.2V
VDD_AUX_3C
D
3
SCI_3_DVDD_3_3_MON
1D
1E
1F
D
2
TRIPS AT 6V
R77
4.75K
1/10W
2
1
D
D-pad
C13
22uF
25V
1
AFE3_TO_SCI3_REF+
VDD_FROM_SCI_3
8
6
P1^,5
AFE3_TO_SCI3_REF-
SCI_3_AVDD_5_5_MON
N/C
P15,1^
AFE_SCI_3_REFERENCE
AVDD_5_5V
6.2V
CSD17313Q2
R75
10K
R76
1/16W
MAVRK_SCI_3_MOD_SEL
MAVRK_SCI_3_MOD_IRQ
3D
3E
3F
2
1
SCI3_SEL
P1^,2,5
P1^,2,5
2.2K
3A 3D
3B 3E
3C 3F
G
15K
R74
18.2K
1/16W
D22
3A
3B
3C
D
S
R73
OVER VOLTAGE
D62
PROTECTION
R72
20K
1/10W
C
AFE3_TO_SCI3_ANLG_VSS
SCI_3_PWR_GOOD
GREEN
Q10
SCI3_CON_1
2x26
QRF8-026-05.0-L-D-A
AFE3_TO_SCI3_ANLG_VDD
2D
2E
2F
S
D
S
REVERSE POLARITY
PROTECTION
R71
2.2K
1/16W
SCI_3_GPIO_3
SCI_3_GPIO_2
SCI_3_GPIO_1
SCI_3_GPIO_0
2
2
2
5
D
AFE/SCI_R_I2C_SDA
AFE/SCI_R_I2C_SCL
P1..3,5,7
P1..3,5,7
G
C82
0.1uF
10V
R70
100K
1/10W
S
D20
6.2V
5
Q9
3
D
D
S
4
SCI_3_GPIO_[0:3]
2
2
2
2
6
S
PWR REVERSED
6
P1^,5
1
S
2
7
S
1
7
D
3
D21
RED
8
D
2
C
8
2A
2B
2C
CSD25401Q3
1
P1^,5
53
55
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
OVER VOLTAGE PROTECTION
(FROM SCI CONNECTOR)
SCI_3_ANLG_CH_[0:15]
54
56
VDD_AUX_3B
1A
1B
1
SCI Connectors
(Fixed locations)
VDD_AUX_3A
ST3
2
GND
GND
4
GND
GND
5
(TO OVER VOLTAGE PROTECTION)
<IREF>
VDD_FROM_SCI_3
SCI_3_TO_PMU_VIN
TP3
SCI_3_TO_PMU_V
White
Fault protection and Enable control for SCI's, when enabled it becomes PWR_IN
R78
100K
1/10W
R79
100K
1/10W
R80
412
1/10W
2
D24
3
RED
SCI_3_TO_PMU_V
2
A
SCI3_VSENSE
P15,1^
SCI3_EN
C17
0.1uF
10V
P15,1^
R82
100K
1/10W
R83
100K
1/10W
D18
B350A-13-F
U7
1
SCI_3_TO_PMU_V
C15
P15,1^
0.1uF
10V
8
4
IN
IN
OUT
OUT
ILIM
FAULT GND
EN
PWRP
7
6
1
5
1
9
C16
1uF
10V
TPS2557DRB
R81
22.1K
1/10W
Set for 5.0A
(4.602 - 5.331A)
2
SCI SLOT 3
(PG 1 of 1)
PWR_IN
(4.5-6V)
A
Title
SEE PMU SLOT (PG 1 of 2)
POWER SUPPLY for UCD9081
(PAGE 15)
Size B
MB-PRO-MVK
EDGE No
6517814
Rev
Date Monday, August 15, 2011
5
4
3
2
F
Sheet 9 of 19
1
3
SCI Terminal Block
AUX/GND/VSS/VDD
D
SCI_4_ANLG_CH_0
SCI_4_ANLG_CH_1
SCI_4_ANLG_CH_2
SCI_4_ANLG_CH_3
SCI_4_ANLG_CH_4
SCI_4_ANLG_CH_5
SCI_4_ANLG_CH_6
SCI_4_ANLG_CH_7
SCI_4_ANLG_CH_8
SCI_4_ANLG_CH_9
SCI_4_ANLG_CH_10
SCI_4_ANLG_CH_11
SCI_4_ANLG_CH_12
SCI_4_ANLG_CH_13
SCI_4_ANLG_CH_14
SCI_4_ANLG_CH_15
VDD_AUX_4C
2A
2B
SCI_4_SPI_MISO
SCI_4_SPI_MOSI
SCI_4_SPI_CLK
SCI_4_SPI_CS
P1^,6
P1^,6
P1^,6
P1^,6
3A
3B
SCI_4_I2S_SCK
SCI_4_I2S_WS_LRCLK
SCI_4_I2S_SDIN
SCI_4_I2S_SDIN_AUX
P1^,6
P1^,6
P1^,6
P1^,6
4A
4B
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
1x4 TERM BLK
1770908
OVER VOLTAGE PROTECTION
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
(FROM SCI CONNECTOR)
SCI_4_ANLG_CH_[0:15]
P1^,6
D
54
56
VDD_AUX_4B
1A
1B
1
SCI Connectors
(Fixed locations)
VDD_AUX_4A
ST4
2
GND
GND
4
GND
GND
5
SCI4_CON_1
2x26
QRF8-026-05.0-L-D-A
5
4
S
1
4
7
6D
6E
6F
6
6
6
6
6
6
SCI4_CON_2
1x6 PWR
POWER
UPS-06-04.0-02-L-V
B
6A
6B
6C
5D
5E
5F
5
5
5
5
5
5
4
4
4
5A
5B
5C
1
1
1
1A
1B
1C
4
4
4
1
1
1
Q15
4D
4E
4F
VDD_AUX_4A
1D
1E
1F
2
SCI_4_TO_PMU_VIN
(TO OVER VOLTAGE PROTECTION)
VDD_AUX_4B
1
2
3
TLVH431ACDBZ
U8
G
1
VDD_FROM_SCI_4
4A
4B
4C
D
3
S-pad
S
B
N/C
DVDD_3_3V
VDD_AUX_4C
5
C19
0.1uF
10V
D30
6.2V
SCI_4_DVDD_3_3_MON
1
2
D
R92
4.75K
1/10W
AFE4_TO_SCI4_REF+
3D
3E
3F
D
TRIPS AT 6V
8
6
D
D-pad
C18
22uF
25V
1
P1^,6
AFE4_TO_SCI4_REF-
SCI_4_AVDD_5_5_MON
N/C
P15,1^
AFE_SCI_4_REFERENCE
AVDD_5_5V
D63
6.2V
CSD17313Q2
R90
10K
2.2K
3A 3D
3B 3E
3C 3F
15K
R91
1/16W
MAVRK_SCI_4_MOD_SEL
MAVRK_SCI_4_MOD_IRQ
P1^,2,6
P1^,2,6
2
R87
20K
1/10W
R88
R89
18.2K
1/16W
OVER VOLTAGE
PROTECTION
D29
2
2
2
G
R86
2.2K
1/16W
SCI_4_PWR_GOOD
GREEN
SCI4_SEL
2A
2B
2C
D
S
REVERSE POLARITY
PROTECTION
C
AFE4_TO_SCI4_ANLG_VSS
AFE/SCI_L_I2C_SDA
AFE/SCI_L_I2C_SCL
P1^,2,4,6,8
P1^,2,4,6,8
Q14
AFE4_TO_SCI4_ANLG_VDD
3A
3B
3C
2
C83
0.1uF
10V
G
D
S
Q13
S
5
R85
100K
1/10W
D
D
S
4
D27
6.2V
3
2D
2E
2F
6
S
PWR REVERSED
6
SCI_4_GPIO_3
SCI_4_GPIO_2
SCI_4_GPIO_1
SCI_4_GPIO_0
P1^,6
2
S
2
7
S
1
7
SCI_4_GPIO_[0:3]
1
D
3
D28
RED
8
D
2
C
8
53
55
CSD25401Q3
1
2
2
2
CSD25401Q3
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
SCI_4_TO_PMU_VIN
(TO OVER VOLTAGE PROTECTION)
TP4
SCI_4_TO_PMU_V
White
R93
100K
1/10W
R95
412
1/10W
SCI4_VSENSE
SCI4_EN
15,1^
C22
0.1uF
10V
R97
100K
1/10W
P15,1^
D19
B350A-13-F
U9
2
D31
3
RED
SCI_4_TO_PMU_V
2
A
VDD_FROM_SCI_4
SCI_4_TO_PMU_VIN
Fault protection and Enable control for SCI's, when enabled it becomes PWR_IN
R94
100K
1/10W
1
P15,1^
SCI_4_TO_PMU_V
C20
0.1uF
10V
<IREF>
R98
100K
1/10W
8
4
IN
IN
7
6
OUT
OUT
5
1
9
ILIM
FAULT GND
EN
PWRP
TPS2557DRB
1
R96
22.1K
1/10W
Set for 5.0A
(4.602 - 5.331A)
C21
1uF
10V
2
SCI SLOT 4
(PG 1 of 1)
PWR_IN
(4.5-6V)
A
Title
SEE PMU SLOT (PG 1 of 2)
POWER SUPPLY for UCD9081
(PAGE 15)
Size B
MB-PRO-MVK
EDGE No
6517814
Rev
Date Monday, August 15, 2011
5
4
3
2
F
Sheet10 of 19
1
5
4
3
2
1
D
D
DVDD_3_3V
RF1_CON_1
C
RF_UART_CTS
RF_LOW_SPEED_CLK
RF_UART_RX
RF_UART_TX
RF_I2C_SDA
RF_I2C_SCL
RF_SDIO_CLK
RF_SDIO_CMD
P12..14,1^,2
P12..14,1^,2
P12..14,1^,2
P12..14,1^,2
P12..14,19,1^,2
P12..14,19,1^,2
P12..14,1^,2
P12..14,1^,2
1
3
5
7
9
11
13
15
17
19
2
4
6
8
10
12
14
16
18
20
RF1_CON_2
RF_SDIO_D[0-3]
RF_SDIO_D0
RF_SDIO_D1
RF_SDIO_D2
RF_SDIO_D3
MAVRK_RF_1_IRQ
MAVRK_RF_1_GPIO
MAVRK_RF_1_MOD_SEL
2x10
TFM-110-02-L-D-K-A
P12..14,1^,2
P13,1..3,5
P1^,2
P1^,2
P1^,2
R100
RF_SPI_CLK
RF_SPI_MOSI
RF_SPI_MISO
P13,1..3,5
P19,1^
P19,1^
P13,1..3,5
P19,1^
D33
2.2K 1
2
1/16W
P12..14,1^,2
P12..14,1^,2
P12..14,1^,2
BLUE
RF1_CS
1
3
AFE_R_MCLK
5
7
RF_1_MON_1
N/C
9
AFE_R_I2S_WS_LRCLK 11
13
RF_1_GPIO_2
15
RF_1_SHUTD_0
AFE_R_I2S_SCK
17
19
RF_1_SHUTD_1
2
4
6
8
10
12
14
16
18
20
J2
AUD_1
1
2
RF_1_AUD_ANA_L
RF_1_AUD_ANA_R
AFE_R_I2S_SDIN_AUX
AFE_R_I2S_SDIN
RF_SPI_CS
RF_UART_RTS
RF_1_GPIO_3
P13,1..3,5
P13,1..3,5
1x2
P12..14,1^,2
P12..14,1^,2
P19,1^
C
2x10
TFM-110-02-L-D-K-A
B
B
RF SLOT 1
(PG 1 of 1)
A
A
Title
Size B
MB-PRO-MVK
EDGE No
6517814
Rev
Date Monday, August 15, 2011
5
4
3
2
F
Sheet11 of 19
1
5
4
3
2
1
D
D
DVDD_3_3V
RF2_CON_2
RF2_CON_1
RF_UART_CTS
RF_LOW_SPEED_CLK
RF_UART_RX
RF_UART_TX
RF_I2C_SDA
RF_I2C_SCL
RF_SDIO_CLK
RF_SDIO_CMD
P11,13,14,1^,2
P11,13,14,1^,2
P11,13,14,1^,2
P11,13,14,1^,2
C P11,13,14,19,1^,2
P11,13,14,19,1^,2
P11,13,14,1^,2
P11,13,14,1^,2
1
3
5
7
9
11
13
15
17
19
2
4
6
8
10
12
14
16
18
20
RF_SDIO_D[0-3]
RF_SDIO_D0
RF_SDIO_D1
RF_SDIO_D2
RF_SDIO_D3
MAVRK_RF_2_IRQ
MAVRK_RF_2_GPIO
MAVRK_RF_2_MOD_SEL
2x10
TFM-110-02-L-D-K-A
RF_SPI_CLK
RF_SPI_MOSI
RF_SPI_MISO
P11,13,14,1^,2
P14,1^,2,4,6
N/C
P1^,2
P1^,2
P1^,2
R101
P14,1^,2,4,6
P19,1^
P19,1^
P14,1^,2,4,6
P19,1^
D34
2.2K 1
2
1/16W
P11,13,14,1^,2
P11,13,14,1^,2
P11,13,14,1^,2
BLUE
RF2_CS
1
3
AFE_L_MCLK
5
7
RF_2_MON_1
9
AFE_L_I2S_WS_LRCLK 11
13
RF_2_GPIO_2
15
RF_2_SHUTD_0
17
AFE_L_I2S_SCK
19
RF_2_SHUTD_1
2
4
6
8
10
12
14
16
18
20
RF_2_AUD_ANA_L
RF_2_AUD_ANA_R
AFE_L_I2S_SDIN_AUX
AFE_L_I2S_SDIN
J3
AUD_2
1
2
P14,1^,2,4,6
P14,1^,2,4,6
1x2
C
RF_SPI_CS
RF_UART_RTS
RF_2_GPIO_3
P11,13,14,1^,2
P11,13,14,1^,2
P19,1^
2x10
TFM-110-02-L-D-K-A
B
B
RF SLOT 2
(PG 1 of 1)
A
A
Title
Size B
MB-PRO-MVK
EDGE No
6517814
Rev
Date Monday, August 15, 2011
5
4
3
2
F
Sheet12 of 19
1
5
4
3
2
1
D
D
DVDD_3_3V
RF3_CON_1
C
RF_UART_CTS
RF_LOW_SPEED_CLK
RF_UART_RX
RF_UART_TX
RF_I2C_SDA
RF_I2C_SCL
RF_SDIO_CLK
RF_SDIO_CMD
P11,12,14,1^,2
P11,12,14,1^,2
P11,12,14,1^,2
P11,12,14,1^,2
P11,12,14,19,1^,2
P11,12,14,19,1^,2
P11,12,14,1^,2
P11,12,14,1^,2
1
3
5
7
9
11
13
15
17
19
2
4
6
8
10
12
14
16
18
20
RF3_CON_2
RF_SDIO_D[0-3]
RF_SDIO_D0
RF_SDIO_D1
RF_SDIO_D2
RF_SDIO_D3
MAVRK_RF_3_IRQ
MAVRK_RF_3_GPIO
MAVRK_RF_3_MOD_SEL
2x10
TFM-110-02-L-D-K-A
RF_SPI_CLK
RF_SPI_MOSI
RF_SPI_MISO
P11,12,14,1^,2
P11,1..3,5
N/C
P1^,2
P1^,2
P1^,2
R102
D35
2.2K 1
2
1/16W
P11,12,14,1^,2
P11,12,14,1^,2
P11,12,14,1^,2
BLUE
RF3_CS
P11,1..3,5
P19,1^
P19,1^
P11,1..3,5
P19,1^
1
3
AFE_R_MCLK
5
7
RF_3_MON_1
9
AFE_R_I2S_WS_LRCLK 11
RF_3_GPIO_2
13
15
RF_3_SHUTD_0
17
AFE_R_I2S_SCK
19
RF_3_SHUTD_1
2
4
6
8
10
12
14
16
18
20
J4
AUD_3
1
2
RF_3_AUD_ANA_L
RF_3_AUD_ANA_R
AFE_R_I2S_SDIN_AUX
AFE_R_I2S_SDIN
RF_SPI_CS
RF_UART_RTS
RF_3_GPIO_3
P11,1..3,5
P11,1..3,5
1x2
C
P11,12,14,1^,2
P11,12,14,1^,2
P19,1^
2x10
TFM-110-02-L-D-K-A
B
B
RF SLOT 3
(PG 1 of 1)
A
A
Title
Size B
MB-PRO-MVK
EDGE No
6517814
Rev
Date Monday, August 15, 2011
5
4
3
2
F
Sheet13 of 19
1
5
4
3
2
1
D
D
DVDD_3_3V
RF4_CON_2
RF4_CON_1
C
RF_UART_CTS
RF_LOW_SPEED_CLK
RF_UART_RX
RF_UART_TX
RF_I2C_SDA
RF_I2C_SCL
RF_SDIO_CLK
RF_SDIO_CMD
P11..13,1^,2
P11..13,1^,2
P11..13,1^,2
P11..13,1^,2
P11..13,19,1^,2
P11..13,19,1^,2
P11..13,1^,2
P11..13,1^,2
1
3
5
7
9
11
13
15
17
19
2
4
6
8
10
12
14
16
18
20
RF_SDIO_D[0-3]
RF_SDIO_D0
RF_SDIO_D1
RF_SDIO_D2
RF_SDIO_D3
MAVRK_RF_4_IRQ
MAVRK_RF_4_GPIO
MAVRK_RF_4_MOD_SEL
2x10
TFM-110-02-L-D-K-A
RF_SPI_CLK
RF_SPI_MOSI
RF_SPI_MISO
P11..13,1^,2
P12,1^,2,4,6
N/C
P1^,2
P1^,2
P1^,2
R103
P12,1^,2,4,6
P19,1^
P19,1^
P12,1^,2,4,6
P19,1^
D36
2.2K 1
2
1/16W
P11..13,1^,2
P11..13,1^,2
P11..13,1^,2
BLUE
RF4_CS
1
3
AFE_L_MCLK
5
7
RF_4_MON_1
9
AFE_L_I2S_WS_LRCLK 11
RF_4_GPIO_2
13
15
RF_4_SHUTD_0
17
AFE_L_I2S_SCK
19
RF_4_SHUTD_1
2
4
6
8
10
12
14
16
18
20
RF_4_AUD_ANA_L
RF_4_AUD_ANA_R
AFE_L_I2S_SDIN_AUX
AFE_L_I2S_SDIN
RF_SPI_CS
RF_UART_RTS
RF_4_GPIO_3
J5
AUD_4
1
2
P12,1^,2,4,6
P12,1^,2,4,6
1x2
C
P11..13,1^,2
P11..13,1^,2
P19,1^
2x10
TFM-110-02-L-D-K-A
B
B
RF SLOT 4
(PG 1 of 1)
A
A
Title
Size B
MB-PRO-MVK
EDGE No
6517814
Rev
Date Monday, August 15, 2011
5
4
3
2
F
Sheet14 of 19
1
5
4
USB_TO_SERIAL_3_3V
x_VDD_EN
PWR_WALL_EN
SCI2_EN
SCI4_EN
D
10,1^
P1^,8
1/10W
1/10W
33
33
R104
R105
1/10W
1/10W
33
33
R107
R109
3
2
UCD_3p3V
UCD_EN
SCI_4_PWR_GOOD
33
R112 1/10W
SCI_2_PWR_GOOD
33
R115 1/10W
1/10W R106
1/10W R108
33
MCU_USB_5V_EN
33 USB_TO_SERIAL_5V_EN
1/10W R110
1/10W R111
33
33
1/10W R113
33 SCI_3_PWR_GOOD
1/10W R114
33 SCI_1_PWR_GOOD
Fault detection and enable signal generation
(UCD9081) UCD_3p3V
SCI1_EN
SCI3_EN
1/10W
47.0K
R116
P1^,9
P1^,7
SKRKAEE010
54
56
GND
GND
C26
2200pF
P1^,7
16V
P10,1^
P1^,8
P1^,9
1
PWR_WALL_MON
USB_TO_SERIAL_5V_MON
SCI1_VSENSE
SCI4_VSENSE
SCI2_VSENSE
SCI3_VSENSE
x_VDD_MON
MCU_USB_5V_MON
P16
P17
GND
GND
P16
P17
PMU_I2C_SCL
R127
9
7
5
3
1
29
J6
1
C
2
D40
YELLOW
PMU_CNTL
PMU_UCD
2.2K 1/16W
PMU_I2C_SDA
PMU_EN
PMU_IRQ
P1^,2
P1^,2
MCU_USB_5V
MCU_USB_5V
(4.5-6V)
23
24
11
10
12
13
14
25
26
27
28
1K
1K
1K
1K
1K
1K
1K
1K
R118 1/16W
R119 1/16W
R120 1/16W
R121 1/16W
R122 1/16W
R123 1/16W
R124 1/16W
R125 1/16W
R126
R128
R129
PWR_WALL_EN
USB_TO_SERIAL_5V_EN
SCI1_EN
SCI4_EN
SCI2_EN
SCI3_EN
x_VDD_EN
MCU_USB_5V_EN
2.2K 1/16W
2.2K 1/16W
2.2K 1/16W
1
33
20
31
TEST
VSS
PPAD
NC1
NC3
NC2 UCD9081RHB NC4
D37
GREEN
AD4
P16
P17
P1^,7
P10,1^
P1^,8
P1^,9
P16
P17
D38
GREEN
AD3
D39
GREEN
AD2
3
D71
8D
8E
8F
8
8
8
8
8
8
TP5
UCD_3.3V
Orange
2
UCD_3p3V
BAT54CW
PMU_CON_2
1x8 PWR
POWER
SCI_1_TO_PMU_V
1
SCI_3_TO_PMU_V
2
BAT54CW
3
D67
SCI_4_TO_PMU_V
SCI_3_TO_PMU_V
SCI_2_TO_PMU_V
SCI_1_TO_PMU_V
P1^,9
PWR_IN
PMU_UCD
PWR_WALL
1
SCI_2_TO_PMU_V
2
SCI_4_TO_PMU_V
3
1/10W
1
IN OUT
EN
FB
GND NR
6
5
4
TPS73001DBVT
D42
GREEN
2
SDM20U30LP
1/10W
51.1K
R133
U11
1
3
2
D69
C29
10nF
25V
C30
15pF
50V
6.3V
2.2uF
C28
1/10W
30.1K
R134
B
R135
PMU_LDO_VIN
D43
(4.5-6V)
C27
1uF
10V
R132
10K
D41
1
P1^,7
PWR_WALL
AVDD_5_5V
POWER SUPPLY for UCD9081
1
8A
8B
8C
7D
7E
7F
7
7
7
7
7
7
7A
7B
7C
6D
6E
6F
6
6
6
6
6
6
6A
6B
6C
5D
5E
5F
5
5
5
5
5
5
5A
5B
5C
4D
4E
4F
4
4
4
4
4
4
4A
4B
4C
3
3
3
3A
3B
3C
3
3
3
2
2
2
2
2
2
2A
2B
2C
1
1
1
3D
3E
3F
SCI_3_TO_PMU_V
2D
2E
2F
SCI_1_TO_PMU_V
SCI_4_TO_PMU_V
1D
1E
1F
SCI_2_TO_PMU_V
1
1
1
SCL
SDA
VCC
XIN
USB_TO_SERIAL_5V
PWR_WALL
1A
1B
1C
EN1
EN2
EN3
EN4
EN5
EN6
EN7
EN8/AD1/GPO1
AD2/GPO2
AD3/GPO3
AD4/GPO4
D
30
3
C
BAT54CW
AVDD_5_5V
P1^,8
MON1
MON2
MON3
MON4
MON5
MON6
MON7
MON8
C25
1uF
10V
DVDD_3_3V
PWR_IN
B
0
ROSC
RST
U10
C24
1uF
10V
DNI
WHEN ON, PMU MODULE
HAS CONTROL OF POWER.
P10,1^
R131
4
17
C23
0.1uF
10V
USB_TO_SERIAL_5V
PMU_I2C_SCL
PMU_I2C_SDA
P1^,2
P1^,2
I2C DEBUG HDR
10
8
6
4
2
R130
VDD_CORE
PMU_MOD_SEL
6
7
8
18
19
9
15
16
22
21
0
DNI
53
55
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
PMU_CON_1
2x26
SW1
RST
UCD_3p3V
1/10W
47.0K
R117
32
5
2
P1^,2
1
2.2K
1/16W
2
UCD_EN
SDM20U30LP
TP6
GND
TP7
GND
Black
A
TP8
GND
Black
TP9
GND
Black
Black
TP10
GND
Black
PMU SLOT
(PG 1 of 3)
TP11
TP12
TP13
TP14
TP15
GND
GND
GND
GND
GND
Black
Black
Black
Black
Black
A
Title
MB-PRO-MVK
TP16
TP17
TP18
GND
GND
GND
Black
Black
Black
Size B
EDGE No
6517814
Rev
Date Monday, August 15, 2011
5
4
3
2
F
Sheet15 of 19
1
5
4
3
2
1
OVER VOLTAGE PROTECTION
S
2
2
1
1
D
2
D
2
R147
100K
1/10W
5
1
9
C34
1uF
10V
R143
22.1K
1/10W
TPS2557DRB
PWR_IN
D47
GREEN
5
CSD25401Q3
D49
1
2
Set for 5.0A
R144
665
6.2V
R149
10K
4
7
Q20
1
C
L1
+5.5V ANALOG SUPPLY
3.3uH
R151
0 PG_AVDD_2
U14
8
9
PWR_IN
R153
0
C38
10uF
C39
10uF
L1A
L1B
10
11
12
13
C40
0.1uF
10V
VIN1
VOUT1
VIN2
VOUT2
EN
PS/SSYNC
PG
VINA
FB
1
C46
0.1uF
10V
L2A
L2B
2
GND
PPAD
PG_AVDD_1
4
5
1/10W
1.0M
R156
PGMOD
TP22 Green
C41
0.1uF
10V
R155
2.00M
1/16W
C42
10uF
R154
100K
1/10W
C43
10uF
14
3
TP21
AVDD_5_5V
Orange
R152
412
1/10W
6
7
15
2
D51
3
RED
AVDD_5_5V
TPS63020DSJ
IN
IN
7
6
OUT
OUT
5
1
9
ILIM
FAULT GND
EN
PWRP
8
4
x_VDD_EN
P15,16
R157
200K
1/16W
AVDD_5_5V
U15
1
(4.5-5V)
2
2
3
TLVH431ACDBZ
U13
G
C
S-pad
S
1
R148
100K
1/10W
ILIM
FAULT GND
EN
PWRP
6
4
D
R150
4.75K
1/10W
C35
0.1uF
10V
5
3
C37
0.1uF
10V
D50
6.2V
8
6
PWR_WALL_EN P15
PWR_WALL_MON P15
2
1
TRIPS AT 6V
1
1
R146
10K
D
D-pad
C36
22uF
25V
C85
330uF +
10V
CSD17313Q2
8
4
2
G
S
R145
18.2K
1/16W
1
2
D
PWR REVERSED
S
15K
7
6
S
R142
OUT
OUT
D
PWR_IN
7
3
U12
IN
IN
TP20
PWR_IN
Red
8
2
2
D48
3
RED
PWR_WALL
+ C33
100uF
16V
OVER VOLTAGE D64
6.2V
PROTECTION
R141
20K
1/10W
1
R139
412
1/10W
G
REVERSE POLARITY
PROTECTION
R138
100K
1/10W
S
C32
0.1uF
10V
Q18
R137
100K
1/10W
C31
0.1uF
10V
G
D
S
2
S
4
S
Q17
D45
6.2V
5
R136
100K
1/10W
Q19
D
D
S
C84
0.1uF
10V
5
PWR_WALL
3
S
4
6
PWR
D
1
S
6
TP19
PWR_WALL
Brown
2
D
R140
2.2K
1/16W
7
S
3
D46
RED
7
1
D
D
8
D
2
1
3
2
WALL PLUG INPUT (3.7-6.0V) when enabled becomes PWR_IN
CSD25401Q3
8
D
CSD25401Q3
1
P1
DC_IN
PJ-012A
TPS2557DRB
R159
100K
1/10W
R158
24.9K
1/10W
C44
1uF
10V
AVDD_5_5V
D52
GREEN
C45
10uF
R160
665
Set for 4.45A
(4.050- 4.761A)
B
B
L2
(4.5-5V)
+3.3V DIGITAL SUPPLY
1.5uH
R161
0
PG_DVDD_2
U16
0
C50
10uF
C51
10uF
10
11
12
13
C52
0.1uF
10V
1
C54
0.1uF
10V
2
L2A
L2B
VIN1
VOUT1
VIN2
VOUT2
EN
PS/SSYNC
PG
VINA
FB
GND
PPAD
PG_DVDD_1
4
5
TP24
Green
PGVD1
TP23
DVDD_3_3V
Violet
R162
165
1/10W
6
7
1/10W
1.0M
R164
R165
1.13M
1/16W
C47
0.1uF
10V
C48
10uF
R166
100K
1/10W
C49
10uF
14
3
15
R168
200K
1/16W
TPS63020DSJ
C56
0.1uF
10V
A
x_VDD_MON
P15
x_VDD_EN
P15,16
R170
100K
1/10W
DVDD_3_3V
U17
1
R163
L1A
L1B
2
D53
RED
3
DVDD_3_3V
R167
100K
1/10W
8
4
2
8
9
PWR_IN
R171
100K
1/10W
IN
IN
OUT
OUT
ILIM
FAULT GND
EN
PWRP
TPS2557DRB
7
6
5
1
9
R169
88.7K
1/10W
C53
1uF
10V
DVDD_3_3V
D54
GREEN
PMU SLOT
(PG 2 of 3)
C55
10uF
R172
221
Set for 1.244A
(1.039 - 1.430A)
A
Title
Size B
MB-PRO-MVK
EDGE No
6517814
Rev
Date Monday, August 15, 2011
5
4
3
2
F
Sheet16 of 19
1
5
4
3
2
1
Fault protection and enable for USB. When enabled it becomes PWR_IN
TP25
USB_SER_5V
Blue
USB_TO_SERIAL_5V
D
C57
0.1uF
10V
D
R174
100K
1/10W
R175
412
1/10W
U18
1
R173
100K
1/10W
2
D55
3
RED
USB_SER
2
8
4
P15
USB_TO_SERIAL_5V_MON
C59
0.1uF
10V
C
P15
USB_TO_SERIAL_5V_EN
IN
IN
ILIM
FAULT GND
EN
PWRP
7
6
1
10BQ015PBF
5
1
9
R176
110K
xxx
TPS2557DRB
R177
100K
1/10W
PWR_IN
2
C58
1uF
10V
Set for 1.0A
(0.825- 1.166A)
R178
100K
1/10W
C
TP26
MCU_USB_5V
Blue
MCU_USB_5V
C60
0.1uF
10V
R181
100K
1/10W
R182
412
1/10W
1
R180
100K
1/10W
U19
2
2
D57
RED
3
MCU_USB
P15
D66
OUT
OUT
MCU_USB_5V_MON
C62
0.1uF
10V
P15
R184
100K
1/10W
MCU_USB_5V_EN
R185
100K
1/10W
8
4
IN
IN
D65
OUT
OUT
ILIM
FAULT GND
EN
PWRP
7
6
1
PWR_IN
2
10BQ015PBF
5
1
9
R183
110K
xxx
TPS2557DRB
C61
1uF
10V
Set for 1.0A
(0.825- 1.166A)
B
B
PMU SLOT
(PG 3 of 3)
A
A
Title
Size B
MB-PRO-MVK
EDGE No
6517814
Rev
Date Monday, August 15, 2011
5
4
3
2
F
Sheet17 of 19
1
5
4
3
2
1
USB TO SERIAL (UART) INTERFACE
U20
2
8
6
2
4
BK1608HS600-T
D
USB_TO_SERIAL_3_3V
1
3
5
7
GND
GND
GND
GND
R191
R194
33 1/10W
33 1/10W
C63
10nF
C66
22pF
R192
1/10W
5
6
7
1.5K
DPa0
DMa0
C67
22pF
R195
15K
R196
15K
R200
15K
13
14
15
16
20
21
USB_TO_SERIAL_3_3V
23
24
Leave USB ID
floating to
indicate to host
device that this
is a slave device
only
R203
90.9K
C69
1uF
10V
C70
10nF
25V
3
25
4
VCC1V8
C71
1uF
10V
C72
10nF
25V
8
18
28
33
R205
100K
1/10W
R187
15K
U21
TUSB3410RHBR
PUR
DP0
DM0
VREGEN
RESET
WAKEUP
SUSP
CLKOUT
CTS
DSR
DCD
RICP/
RTS
DTR
SIN/IR_SIN
SOUT/IR_SOUT
TEST0
TEST1
VCC
VCC
VDD1V8
GND
GND
GND
HS
SCL
SDA
P3_0
P3_1
P3_3
P3_4
X1/CLKI
X2
1
9
12
2
22
3
2
R188
15K
17
19
R198
R201
11
10
1
2
100
C64 1/10W SKRKAEE010
1uF
10V
C65
1uF
10V
1
D59
MMBD4148
SW2
USB RESET
R189
15K
R190
1/10W
R193
33K
ENn
RSTIn
C68
10nF
25V
330 MB_USB_TO_SER_TX
330 MB_USB_TO_SER_RX
TUSB_SCL
TUSB_SDA
R199
1.5K
1/10W
P1^,2
P1^,2
R202
0
32
31
30
29
R197
1.5K
1/10W 8
7
6
5
U22
VCC
WP
SCL
SDA
A0
A1
A2
VSS
1
2
3
4
128K I2C EEPROM
C
R204
15K
xxx
C73
27
26
33pF
Y1
12.000MHz 18pF
1
C
USB_TO_SERIAL_3_3V
D
SN75240PWR
7
6
GND2
GND1
USB TO SER
USB_MINI_B_54819
J7
1
VBUS 2 DaD- 3 Da+
D+ 4
ID 5
GND
USB_TO_SERIAL_3_3V
A
B
C
D
2
USB_TO_SERIAL_5V
FB1
1
C74
33pF
USB INTERFACE direct to MCU CARD
B
POWER SUPPLY for TUSB3410
FB2
1
U23
2
8
6
2
4
BK1608HS600-T
A
B
C
D
GND
GND
GND
GND
1
3
5
7
USB_TO_SERIAL_5V
PG_USB_SERIAL_IRQ
SN75240PWR
R206
R208
C79
10nF
7
6
GND2
GND1
MCU TO USB
USB_MINI_B_54819
J8
1
VBUS 2
DD- 3
D+
D+ 4
ID 5
GND
A
B
MCU_USB_5V
33 1/10W
33 1/10W
C77
22pF
USB_TO_SERIAL_3_3V
U24
MCU_USB_DATAMCU_USB_DATA+
P1^,2
P1^,2
C75
1uF
10V
C76
0.1uF
10V
4
2
3
IN
PG
GND
NC OUT
TPS79733DCK
1
5
R207
100K
1/10W
C78
22pF
USB SLOT
(PG 1 of 1)
Leave USB ID floating to
indicate to host device that
this is a slave device only
A
Title
Size B
MB-PRO-MVK
EDGE No
6517814
Rev
Date Monday, August 15, 2011
5
4
3
2
F
Sheet18 of 19
1
5
4
3
2
1
D
D
I2C PORT EXPANDER - AFFECTS ALL 4 RF SLOTS
DVDD_3_3V
DVDD_3_3V
C
R209
10K
xxx
R210
10K
xxx
R213 R214
10K 10K
xxx xxx
R211 R212
10K 10K
xxx xxx
RF_I2C_SDA 15
RF_I2C_SCL 14
P11..14,1^,2
P11..14,1^,2
10K
10K
10K
R218
R219
R221
1
2
3
8
Vcc
SDA
SCL
A0
A1
A2
GND
P0
P1
P2
P3
P4
P5
P6
P7
INT
4
5
6
7
9
10
11
12
RF_1_GPIO_3
RF_1_GPIO_2
RF_1_SHUTD_0
RF_1_SHUTD_1
RF_3_GPIO_3
RF_3_GPIO_2
RF_3_SHUTD_0
RF_3_SHUTD_1
16
P11,1^
P11,1^
P11,1^
P11,1^
P13,1^
P13,1^
P13,1^
P13,1^
10K
10K
10K
PCA9534ADGV
RF_I2C_SDA
RF_I2C_SCL
15
14
R217
R220
R222
1
2
3
8
TP27
Orange
INT_1_3
13
C
U26
U25
16
R216
R215
10K
10K xxx
xxx
Vcc
SDA
SCL
A0
A1
A2
GND
P0
P1
P2
P3
P4
P5
P6
P7
INT
4
5
6
7
9
10
11
12
13
PCA9534ADGV
RF_2_GPIO_3
RF_2_GPIO_2
RF_2_SHUTD_0
RF_2_SHUTD_1
RF_4_GPIO_3
RF_4_GPIO_2
RF_4_SHUTD_0
RF_4_SHUTD_1
P12,1^
P12,1^
P12,1^
P12,1^
P14,1^
P14,1^
P14,1^
P14,1^
TP28
Orange
INT_2_4
B
B
PORT EXPANDER
(PG 1 OF 1)
A
A
Title
Size B
MB-PRO-MVK
EDGE No
6517814
Rev
Date Monday, August 15, 2011
5
4
3
2
F
Sheet19 of 19
1
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