E LE T BSO O SS , O C E IR 2 1 1 0 R P , E N E t S RAW IGNS, 13 ter a D n e H S C T 1 I E /t s c TW , IR2 port WD PAR NO NE IR2112 cal Sup rsil.com i c hn .inte r Te r w w w u o o ct RSIL onta or c 8-INTE Description 1- 88 ® July 1998 Features • Maximum Rating . . . . . . . . . . . . . . . . . . . . . . . . 500V • Ability to Interface and Drive N-Channel Power Devices • Floating Bootstrap Power Supply for Upper Rail Drive • CMOS Schmitt-Triggered Inputs with Hysteresis and Pull-Down • Single Low Current Bias Supply • Latch-Up Immune CMOS Logic • Peak Drive . . . . . . . . . . . . . . . . . . . . . . . . . Up to 2.0A • Gate Drive Rise Time . . . . . . < 25ns (Typ) Applications The HIP2500 is a high voltage integrated circuit (HVIC) optimized to drive N-Channel MOS gated power devices in half bridge topologies. It provides the necessary control for PWM motor drive, power supply, and UPS applications. The SD pin allows external shutdown of gate drive to both upper and lower gate outputs. Undervoltage lockout will not allow gating when the bias voltage is too low to drive the external switches into saturation. The HIP2500IB is a SOIC or small outline IC form of the HIP2500. The HIP2500IB drives high side and low side referenced power switches just like the HIP2500IP. The HIP2500IP1 is a 16 lead Plastic DIP form of the HIP2500. Pins 4 and 5 removed from lead frame to provide extra creepage and strike distances in high voltage applications. • High Frequency Switch-Mode Power Supply • Induction Heating and Welding Please see Application Note AN9010 for more information. • Switch Mode Amplifiers • AC and DC Motor Drives Functional Block Diagram • Electronic Lamp Ballasts • Battery Chargers HIP2500 • UPS Inverters • Noise Cancellation in Amplifier Systems TEMP. RANGE (oC) UV VDD LEVEL SHIFT VB S LATCH DRIVER HO R VS HIN Ordering Information PART NUMBER Half Bridge 500VDC Driver The HIP2500IP is pin and function compatible to the International Rectifier IR2110. The HIP2500 has superior ability to accept negative voltages from the VS pin to the COM pin due to forward recovery of the lower flyback diode. • Up to 400kHz Operation (+125oC) . HIP2500 PACKAGE PKG NO. HIP2500IP -40 to +85 14 Ld PDIP E14.3 HIP2500IP1 -40 to +85 16 Ld PDIP E16.3 HIP2500IB -40 to +85 16 Ld SOIC (W) M16.3 SD VCC LOGIC LIN UV DRIVER LO COM VSS Pinouts HIP2500 (PDIP) TOP VIEW HIP2500 (SOIC) TOP VIEW HIP2500 (PDIP) TOP VIEW LO 1 14 NC LO 1 16 NC LO 1 16 NC COM 2 13 VSS COM 2 15 VSS COM 2 15 VSS VCC 3 14 LIN VCC 3 14 LIN NC 4 13 SD 13 SD NC 5 12 HIN 12 HIN VCC 3 12 LIN NC 4 11 SD VS 5 10 HIN VB VS 6 11 VDD VS 6 11 VDD 6 9 VDD VB 7 10 NC VB 7 10 NC HO 7 8 NC HO 8 9 NC HO 8 9 NC CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2002. All Rights Reserved 1 File Number 2801.9 HIP2500 Absolute Maximum Ratings Full Temperature Range Unless Otherwise Noted, All Voltages Referenced to VSS Unless Otherwise Noted. Thermal Information Floating Supply Voltage, V B . . . . . . . . . . . . . . .VS-0.5V to VS+18.0V (Positive Terminal) Floating Supply Voltage, V S . . . . . . . . . . . . . . . . . . . . . . . . . . . 500V (Common Terminal) High Side Channel Output Voltage, VHO . . . . . . . . -0.5V to VB+0.5V Fixed Supply Voltage, V CC . . . . . . . . . . . . . . . . . . . . . -0.5V to 18.0V Low Side Channel Output Voltage, V LO . . . . . . . .-0.5V to VCC+0.5V Logic Supply Voltage, V DD . . . . . . . . . . . . . . . . . . . . . -0.5V to 18.0V Logic Input Voltage, VIN . . . . . . . . . . . . . . . . . . . .-0.5V to VDD+0.5V [HIN, LIN & SD (Shutdown)] VDD to COM and VCC to VSS Voltage. . . . . . . . . . . . . -0.5V to 18.0V Thermal Resistance (Note 1, Typical) θJA HIP2500IP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75oC/W HIP2500IP1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80oC/W HIP2500IB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90oC/W See Maximum Power Dissipation vs Temperature Curve Junction Temperature Range . . . . . . . . . . . . . . . . . -40oC to +125oC Storage Temperature Range, TS . . . . . . . . . . . . . . -40oC to +150oC Operating Ambient Temperature Range, TA . . . . . . . -40oC to +85oC NOTE: 1. θJA is measured with the component mounted on an evaluation PC board in free air. CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Recommended DC Operating Conditions Floating Supply Voltage, V B . . . . . . . . . . . . . . . . VS+10V to VS+15V (Floating Terminal) High Side Channel Output Voltage, VHO . . . . . . . . . . . . . .10V to VB (With Respect to VS) Fixed Supply Voltage, V CC . . . . . . . . . . . . . . . . . . . . . . . .10V to 15V Low Side Channel Output Voltage, V LO . . . . . . . . . . . . . . 0V to VCC Logic Supply Voltage, VDD . . . . . . . . . . . . . . . . . . . . . . . . 4V to VCC Floating Supply Voltage, V S . . . . . . . . . . . . . . . . . . . . -4.0V to 500V (Common Terminal) VSS and COM potentials to be equal. Electrical Specifications VCC = (VB - VS) = VDD = 15V, COM = VSS = 0, Unless Otherwise Noted TJ = +25oC PARAMETER TJ = -40o C TO +125oC SYMBOL MIN TYP MAX MIN TYP MAX UNITS Quiescent VCC Current IQCC - 1.5 1.9 - - 2.0 mA Quiescent VBS Current IQBS - 300 400 - 300 435 µA Quiescent VDD Current IQDD - 0.1 1 - - 1.8 µA IS (500V) - 0.4 3.0 - - - µA Logic Input Pulldown Current, VIN = VDD (HIN, LIN, SD) IN+ - 12 20 - - 22 µA Logic Input Leakage Current, VIN = VSS (HIN, LIN, SD) IN- - 0 1 - 0 1 µA Logic Input Positive Going Threshold (Note 2) V TH+ 7.5 8.0 8.5 7.5 8.0 8.6 V Logic Input Negative Going Threshold (Note 2) VTH- 5.5 5.9 6.3 5.5 5.9 6.4 V Undervoltage Positive Going Threshold UV+ 8.0 9.35 9.99 7.8 - 9.99 V Undervoltage Negative Going Threshold UV- 7.7 9.05 9.69 7.5 - 9.69 V Undervoltage Hysteresis (VCC ) UVHYS (VCC) 250 - 450 170 - 530 mV Undervoltage Hysteresis (VBS) UVHYS (VBS) 250 - 450 170 - 530 mV Output High Open Circuit Voltage (HO, LO) VOUT + 14.95 15 - 14.95 15 - V Output Low Open Circuit Voltage (HO, LO) VOUT - - - 0.05 - - 0.05 V Output High Short Circuit Current (Sourcing) IOUT + 1.65 2.1 - 1.15 1.6 - A Output Low Short Circuit Current (Sinking) IOUT - 1.85 2.3 - 1.35 1.7 - A DC CHARACTERISTICS Quiescent Leakage Current NOTE: 2. See Figure 8 for logic supply voltages other than 15.0V. 2 HIP2500 Switching Specifications TJ = +25oC PARAMETER SYMBOL TJ = -40o C TO +125oC MIN TYP MAX MIN TYP MAX UNITS HIGH SIDE CHANNEL WITH 500V OFFSET, CL = 1000pF High Side Turn-On Propagation Delay tON 320 420 525 230 - 725 ns High Side Turn-Off Propagation Delay tOFF 260 385 450 190 - 625 ns High Side Rise Time tR - 25 50 - 25 50 ns High Side Turn-Off Fall Time tF - 25 50 - 25 50 ns Low Side Turn-On Propagation Delay tON 250 365 450 190 - 600 ns Low Side Turn-Off Propagation Delay tOFF 175 295 370 125 - 475 ns Low Side Turn-On Rise Time tR - 25 50 - 30 50 ns Low Side Turn-Off Fall Time tF - 25 50 - 30 50 ns High Side Shutdown tSDHO 300 400 490 200 - 650 ns Low Side Shutdown tSDLO 175 320 400 125 - 500 ns Mt 0 - 125 0 - 185 ns Minimum On Output Pulse Width (HO, LO) PWOUT(MIN) - 35 50 - 35 55 ns Minimum Off Output Pulse Width (HO, LO) PWOUTMIN 275 440 640 250 440 650 ns Minimum On Input Pulse Width (HIN, LIN) PWON(MIN) - 100 145 - 100 175 ns Minimum Off Input Pulse Width (HIN, LIN) PWOFF(MIN) - 110 200 - 110 220 ns Deadtime LO Turn-Off to HO Turn-On DHtON - 125 - - 125 - ns Deadtime HO Turn-Off to LO Turn-On DLtON - -20 - - -20 - ns dVS/dt - - 50 - - 50 V/ns LOW SIDE CHANNEL, CL = 1000pF Shutdown Propagation Delay HIGH SIDE CHANNEL WITH 500V OFFSET, CL = 1000pF Turn-On Propagation Delay Matching (Between HO and LO) MAXIMUM TRANSIENT CONDITIONS Offset Supply Operating Transient Logic Truth Table HIN LIN UVH UVL SD HO LO 0 0 0 0 0 0 0 Normal Off 0 1 0 0 0 0 1 Lower On 1 0 0 0 0 1 0 Upper On 1 1 0 0 0 1 1 Both On X X X X 1 0 0 Chip Disabled X X 1 1 X 0 0 VCC UV Lockout and VBS Lockout X 1 1 0 0 0 1 VBS UV Lockout 1 X 0 1 0 1 0 VCC UV Lockout 3 COMMENTS HIP2500 HIGH VOLTAGE POWER DISSIPATION (W) MAXIMUM POWER DISSIPATION (W) Typical Performance Curves 2.5 HIP2500-IP HIP2500-IP1 2.25 2 HIP2500-IB 1.75 1.5 1.25 1 0.75 0.5 0.25 0 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120 130 1.0 VBIAS = 15V CL = 100pF TA = +25o C 0.1 0.01 0.001 10 100 AMBIENT TEMPERATURE ( C) FIGURE 2. HIGH VOLTAGE POWER DISSIPATION vs SWITCHING FREQUENCY FIGURE 1. MAXIMUM POWER DISSIPATION vs TEMPERATURE MAX VSS OFFSET LOGIC SUPPLY OFFSET VOLTAGE (V) POWER DISSIPATION (W) 6 VS = VSS = COM VBS = VCC = 15VDC TA = +25 oC 1.0 2100pF 0.1 907pF 100pF 0.01 10 1000 SWITCHING FREQUENCY (kHz) o 10 VS = 400V VS = 300V VS = 200V VS = 100V 4 2 0 -2 MIN VSS OFFSET 100 SWITCHING FREQUENCY (kHz) -4 1000 10 12 14 16 SUPPLY VOLTAGE (V) NOTE: All switching losses assumed to be in IC. FIGURE 3. LOW VOLTAGE POWER DISSIPATION vs FREQUENCY FIGURE 4. VSS OFFSET vs VCC SUPPLY VOLTAGE 4 HIP2500 Typical Performance Curves (Continued) MAX VS OFFSET VOLTAGE (NEGATIVE) OFFSET SUPPLY LEAKAGE CURRENT (µA) 10 200V 500V 400V 300V 100V 1.0 0.1 0 20 40 60 80 100 TEMPERATURE (o C) 120 10 8 7 4 3 2 10 11 10 VCC UV+ 9.2 9.15 VBS UV+ 9.1 9.05 VCC UV- 9.0 VBS UV- 8.95 8.9 -40 -20 0 20 60 80 40 TEMPERATURE (oC) 100 120 150 -50 5 6 8 10 12 14 16 18 FIGURE 8. INPUT LOGIC THRESHOLD vs SUPPLY VOLTS 120 18V IQBS1 18V IQBS0 RISE AND FALL TIMES (ns) 200 VTH- 4 LOGIC SUPPLY VOLTAGE (V) (VDD TO VSS) 350 250 VTH+ 6 2 450 300 18 8 140 FIGURE 7. UNDERVOLTAGE LOCKOUT vs TEMPERATURE 400 17 TJ = -40o C TO +125oC 9.3 9.25 12 13 14 15 16 BOOTSTRAP SUPPLY VOLTAGE FIGURE 6. MAXIMUM NEGATIVE V S OFFSET VOLTAGE vs VBS VOLTAGE LOGIC THRESHOLD (V) UNDERVOLTAGE LOCKOUT (V) VCC = 12V 5 9.35 VBS SUPPLY CURRENT (µA) VCC = 15V 6 140 FIGURE 5. OFFSET SUPPLY LEAKAGE vs TEMPERATURE VCC = 15V AND 12V TJ = +25o C 9 14V IQBS1 14V IQBS0 10V IQBS1 10V IQBS0 0 50 100 JUNCTION TEMPERATURE (oC) 100 80 60 40 20 0 100 150 tR tF 1000 1E4 LOAD CAPACITANCE (pF) FIGURE 10. RISE AND FALL TIME vs LOAD CAPACITANCE FIGURE 9. QUIESCENT VBS SUPPLY CURRENT vs TEMPERATURE 5 HIP2500 Typical Performance Curves 30 -40 0 25 125 2.5 28 RISE AND FALL TIME (ns) PEAK OUTPUT CURRENT (A) 3.0 (Continued) 2.0 1.5 1.0 -40 25 0.5 0 0 125 0 2 4 6 8 SOURCE DRIVER SINK DRIVER 10 12 14 tF 26 24 tR 22 20 18 16 14 12 10 -50 16 0 SOURCE/SINK DRAIN-SOURCE VOLTAGE FIGURE 11. DRIVER SINK/SOURCE V-I CHARACTERISTIC 150 460 26 PROPAGATION DELAY (ns) 28 RISE AND FALL TIME (ns) 100 FIGURE 12. RISE AND FALL TIME vs TEMPERATURE 30 tF 24 22 20 tR 18 16 14 12 10 10 50 TEMPERATURE (oC) 11 12 13 14 15 440 HtOFF 400 380 LtON 360 340 320 300 10 16 HtON 420 LtOFF 11 12 13 14 SUPPLY VOLTAGE (V) SUPPLY VOLTAGE (V) FIGURE 13. RISE AND FALL TIME vs SUPPLY VOLTAGE PROPAGATION DELAY (ns) 16 FIGURE 14. PROPAGATION DELAY vs SUPPLY VOLTAGE 700 HtON 600 HtOFF 500 LtON 400 LtOFF 300 200 -50 15 0 50 100 JUNCTION TEMPERATURE (o C) FIGURE 15. PROPAGATION DELAYS AT VCC = 15V 6 150 HIP2500 Dual-In-Line Plastic Packages (PDIP) E14.3 (JEDEC MS-001-AA ISSUE D) 14 LEAD DUAL-IN-LINE PLASTIC PACKAGE N E1 INDEX AREA 1 2 3 INCHES N/2 -B- -AE D BASE PLANE A2 -C- SEATING PLANE A L D1 e B1 D1 B 0.010 (0.25) M A1 eC C A B S MILLIMETERS SYMBOL MIN MAX MIN MAX NOTES A - 0.210 - 5.33 4 A1 0.015 - 0.39 - 4 A2 0.115 0.195 2.93 4.95 - B 0.014 0.022 0.356 0.558 - C L B1 0.045 0.070 1.15 1.77 8 eA C 0.008 0.014 D 0.735 0.775 D1 0.005 - 0.13 - 5 E 0.300 0.325 7.62 8.25 6 E1 0.240 0.280 6.10 7.11 5 C eB NOTES: 1. Controlling Dimensions: INCH. In case of conflict between English and Metric dimensions, the inch dimensions control. e eA 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication No. 95. 4. Dimensions A, A1 and L are measured with the package seated in JEDEC seating plane gauge GS-3. 0.100 BSC - L 0.115 14 0.355 19.68 2.54 BSC 0.300 BSC eB N 0.204 18.66 7.62 BSC 0.430 - 0.150 2.93 14 5 6 10.92 7 3.81 4 9 Rev. 0 12/93 5. D, D1, and E1 dimensions do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.010 inch (0.25mm). 6. E and eA are measured with the leads constrained to be perpendicular to datum -C- . 7. eB and eC are measured at the lead tips with the leads unconstrained. eC must be zero or greater. 8. B1 maximum dimensions do not include dambar protrusions. Dambar protrusions shall not exceed 0.010 inch (0.25mm). 9. N is the maximum number of terminal positions. 10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3, E42.6 will have a B1 dimension of 0.030 - 0.045 inch (0.76 - 1.14mm). 7 HIP2500 Dual-In-Line Plastic Packages (PDIP) E16.3 (JEDEC MS-001-BB ISSUE D) N 16 LEAD DUAL-IN-LINE PLASTIC PACKAGE E1 INDEX AREA 1 2 3 INCHES N/2 -B- -AE D BASE PLANE A2 -C- SEATING PLANE A L D1 e B1 D1 B 0.010 (0.25) M A1 eC C A B S MILLIMETERS SYMBOL MIN MAX MIN MAX NOTES A - 0.210 - 5.33 4 A1 0.015 - 0.39 - 4 A2 0.115 0.195 2.93 4.95 - B 0.014 0.022 0.356 0.558 - C L B1 0.045 0.070 1.15 1.77 8, 10 eA C 0.008 0.014 D 0.735 0.775 D1 0.005 - 0.13 - 5 E 0.300 0.325 7.62 8.25 6 E1 0.240 0.280 6.10 7.11 5 C eB NOTES: 1. Controlling Dimensions: INCH. In case of conflict between English and Metric dimensions, the inch dimensions control. e eA 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication No. 95. 4. Dimensions A, A1 and L are measured with the package seated in JEDEC seating plane gauge GS-3. 0.100 BSC - L 0.115 16 0.355 19.68 2.54 BSC 0.300 BSC eB N 0.204 18.66 7.62 BSC 0.430 - 0.150 2.93 16 5 6 10.92 7 3.81 4 9 Rev. 0 12/93 5. D, D1, and E1 dimensions do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.010 inch (0.25mm). 6. E and eA are measured with the leads constrained to be perpendicular to datum -C- . 7. eB and eC are measured at the lead tips with the leads unconstrained. eC must be zero or greater. 8. B1 maximum dimensions do not include dambar protrusions. Dambar protrusions shall not exceed 0.010 inch (0.25mm). 9. N is the maximum number of terminal positions. 10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3, E42.6 will have a B1 dimension of 0.030 - 0.045 inch (0.76 - 1.14mm). 8 HIP2500 Small Outline Plastic Packages (SOIC) M16.3 (JEDEC MS-013-AA ISSUE C) N INDEX AREA 16 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE 0.25(0.010) M H B M INCHES E SYMBOL -B1 2 3 L SEATING PLANE -A- h x 45o A D µα e A1 B 0.25(0.010) M C A M C 0.10(0.004) B S MIN MAX NOTES A 0.0926 0.1043 2.35 2.65 - 0.0040 0.0118 0.10 0.30 - B 0.013 0.0200 0.33 0.51 9 C 0.0091 0.0125 0.23 0.32 - D 0.3977 0.4133 10.10 10.50 3 E 0.2914 0.2992 7.40 7.60 4 0.050 BSC 1.27 BSC - H 0.394 0.419 10.00 10.65 - h 0.010 0.029 0.25 0.75 5 L 0.016 0.050 0.40 1.27 6 8o 0o N α NOTES: MILLIMETERS MAX A1 e -C- MIN 16 0o 16 7 8o Rev. 0 12/93 1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch) 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. 9