an9906

Three-Phase Buck Switching Converter for
Pentium 4 Processors (HIP6301EVAL2)
®
Application Note
August 2000
AN9906
Author: Bogdan M. Duduman
Introduction
The increased bandwidth and faster operation of the newest
microprocessor cores brought along the need for higher
current capability converters. Targeting Pentium® 4 type
processors (and others in the same range), the HIP6301based 3-phase buck converter presented in this application
note exemplifies a typical practical implementation of a core
regulator for output currents up to 55A. [1,2]
the 5V output of the ATX supply (take necessary
precautions, as the resistor may get very hot).
If regular bench supplies are used, connect a 12V/10A and a
5V/1A supply to J1, J2, respectively; connect both grounds
to J3.
‰ Connect the Output Load
Quick Start Evaluation
Connect an electronic or resistive load to the evaluation
board’s output (J4 and J5), or use an Intel PGA423 EMT
Tool (J8).
Important
Operation
The four-pin connector (J7; see schematic on page 5) on the
evaluation board is meant to couple only with the matching
12V connector from an ATX12V supply only. Some newer
models of ATX supplies have a similar connector which
carries GND, 3.3V, 5V, and 12V. An attempt to mate such a
connector to the on-board receptacle can result in a
potentially dangerous situation, and it will certainly prevent
the power supply from operating. If an ATX12V power
supply is unavailable, use only the 20-pin connector from the
available ATX supply to power up the board.
Circuit Setup
The HIP6301EVAL2 is built for evaluation using ordinary
laboratory equipment, specialized tools, or a combination of
the two. Best (and possibly easiest if the tools are available)
way to evaluate the circuit is by using an ATX supply and an
Intel PGA423 EMT Tool.
‰ Set Up JP1, JP2, and JP3
Consult the circuit schematic and data sheet and set the JP1
VID jumper combination on the HIP6503EVAL1 according to
the output voltage you wish to evaluate the board at. If using an
EMT Tool, it is advised you set the similar jumpers present on
the test tool to the same code, or de-populate them altogether.
JP2 and JP3 allow remote sensing of the output voltage at
TP8 and, alternately, at TP10, TP11. By placing the shunts
in the ‘PLANE’ position (see top silk screen on page 8), the
voltage present at the test points will reflect the output
voltage on the board, physically close to the center of the
processor socket’s cavity. The ‘PIN’ position reflects the
processor-die (load) voltage fed back through the voltage
sensing pins present on the test tool (if equipped) and the
processor package.
‰ Connect the Input Power Supply
Connect the main ATX output connector to J6. If an ATX12V
supply is used, connect the dedicated 12V 4-pin connector
to J7. Regulation of the ATX supplies is generally dependent
on the presence of a load on the main 5V output - for best
results, have a 5Ω/25W-50W power resistor connected to
1
‰ Apply Power to the Board
Plug the ATX supply into the mains. If the supply has an AC
switch, turn it on. If using standard bench supplies, turn them
on, preferably the 12V supply first, followed by the 5V
supply. If the 5V is applied first, the soft-start will likely end
before application of the 12V, resulting in an initial overcurrent event, followed by a normal output voltage ramp-up.
Occasionally, application of voltages in the improper
sequence may result in an initial over-voltage event, latching
the evaluation board off. In such instance, cycle the bias
power to the controller IC (5V) to reset the latch.
‰ Examine Start-Up Waveforms
Start-up is immediate following application of power. After a
quick red flash, the CR1 LED indicator should turn green,
indicating a PGOOD high (good output voltage). Using an
oscilloscope or other laboratory equipment, you may study
the ramp-up and/or regulation of the controlled output
voltage under various loading/transient conditions.
HIP6301EVAL2 Reference Design
General
The evaluation design is implemented on 2-ounce, 4-layer,
printed circuit board (see last pages of this application note
for layout plots). Wherever needed to reduce layout
parasitics, via-in-pad (VIP) layout techniques were
employed. The entire circuit fits inside a 6in2 rectangle on
the top side of the board. For better space utilization and
enhanced thermal performance, the upper switch MOSFETs
on each channel are vertically mounted.
For ease of evaluation, the circuit can be powered up from
either bench supplies, regular ATX supplies, or special
ATX12V computer supplies. Similarly, the output can be
exercised using either an Intel EMT tool, resistive loads, or
electronically controlled active loads. For best performance
during evaluation, when applicable, insure the ATX 5V
output is loaded with a minimum of 1A current draw - this will
keep the 12V output regulation within specified limits.
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2002. All Rights Reserved
Application Note 9906
The HIP6301EVAL2 was designed to meet the performance
envelope outlined in Table 1. As such, the design covers the
full range of foreseeable upcoming Pentium 4 processors.
TABLE 1. HIP6301EVAL2 OUTPUT PARAMETERS
NO-LOAD
OUTPUT
VOLTAGE
FULL-LOAD
OUTPUT
VOLTAGE
MAX.
OUTPUT
CURRENT
MAX. OUTPUT
CURRENT
dI/dt
1.685V
1.600V
54A
400A/μs
Figure 2 details the converter’s response to a low-frequency
55A transient. As it is evident from the scope capture, the
design implements output voltage droop as a means to meet
the dynamic transient requirements while employing a
minimum amount of output capacitance. The nominal noload output voltage is also offset low by design. Strict power
requirements limit the maximum output voltage to the VIDset voltage level (1.70V in this case).
50mV/DIV.
Design Envelope
1.7V>
VCORE
HIP6301EVAL2 Performance
Output Soft-Start
500mV/DIV.
200μs/DIV.
dI/dt = 500A/μs
T0
T1
FIGURE 2. HIP6301EVAL2 OUTPUT VOLTAGE AND PHASE
CURRENTS TRANSIENT RESPONSE - LOW
FREQUENCY TRANSIENT (500Hz)
IVCC12
PGOOD
1.7V>
100mV/DIV.
VCORE
1ms/DIV.
T0
T1
T2
FIGURE 1. HIP6301EVAL2 START-UP SEQUENCE UNDER
APPLIED CONSTANT-CURRENT OUTPUT LOAD
At time T1, the output voltage is sufficiently high to allow the
electronic load to draw the full 10A. At time T2 the soft-start
cycle ends and the PGOOD pin is enabled to report the
result of the output monitoring function.
IL2
IL3
IL4
0A>
dI/dt = 500A/μs
Transient Response
Paramount to the performance of a switching regulator
dedicated to supplying power to a microprocessor core, the
transient performance of the evaluation board has been
thoroughly documented in the following figures.
2
5.0A/DIV.
0V>
IVCORE
1.00A/DIV.
0A>
VCORE
5.00A/DIV.
0A>
0A>
Figure 3 depicts a similar scenario, with the difference residing
in the frequency of the transient applied (33kHz). The exercise
is performed to detail the swift response of the converter and
the tight output voltage regulation across a typical range of
output loading. The short-duration spikes exceeding the 1.70V
maximum level would be further reduced in a practical
implementation: the processor current transient has a softer
turn on/off characteristic than the EMT test tool.
COMP
1.00V/DIV.
0V>
IL3
IL4
IL2
5.0A/DIV.
The HIP6301 controller undergoes a soft-start cycle each
time power-on reset (POR) transitions from high to low (input
bias application), or when the chip is enabled for operation
(FS/DIS pin released from a pull-down). Figure 1 details an
output soft-start cycle. Power is applied to the circuit prior to
time T0, then the circuit is disabled by shorting the FS/DIS
pin to ground. At time T0, the FS/DIS pin is released from
the short-circuit to ground, and shortly thereafter, the output
voltage starts to ramp up. The low-frequency ripple visible in
the current drawn from the input supply is a result of the
digital soft-start building the output voltage in small
increments. Similarly, this stepping method is reflected into
the output voltage and the COMP pin waveforms.
T0
10μs/DIV.
T1
T2
T3
T4
FIGURE 3. HIP6301EVAL2 OUTPUT VOLTAGE AND PHASE
CURRENTS TRANSIENT RESPONSE - HIGH
FREQUENCY TRANSIENT (33kHz)
Application Note 9906
Phase-to-Phase Current Sharing
50mV/DIV.
Figures 4 and 5 take the transient response to yet another
level of detail, in order to showcase the phase-to-phase
current matching. As it can be easily observed in either
figure, the phase-to-phase steady-state current matching of
the evaluation board is typically 1A or less. During transient
edge dynamic response, the phase-to-phase current
mismatch is evident, result of the specific timing
relationships that govern the HIP6301’s operation. The
matching appearance of the current waveforms flowing
through each of the converter’s phases suggests equally
matched channel-to-channel power dissipation and thermal
performance.
1.7V>
VCORE
excitation. In both figures (4 and 5), the dynamic transient
excitation occurs at time T0. As it may be noticed in Figure 4,
the first-order response of the converter (representing the
bulk of the current step) takes place in a time interval of only
5μs to 6μs. The converter’s response to the tail end of the
transient (Figure 5) is equally fast; however, in this case, the
current ramp-down of the output inductors is, mainly, only a
function of the inductor value and the output voltage.
One important parameter contributing to an exemplary
phase-to-phase current matching is layout. As it may be
observed in the layout plots included at the end of the
application note, all channels have an identical, tight layout,
with a ground plane exhibiting minimal voids between the
controller and the individual channel blocks.
Circuit Efficiency
Figure 6 shows the laboratory-measured evaluation board
efficiency. Measurements were performed at room
temperature, with approximately 100 linear feet per minute
(100 lfm) air flow.
88
IL2
0A>
IL3
T0
5μs/DIV.
dI/dt = 500A/μs
T1
FIGURE 4. HIP6301EVAL2 OUTPUT VOLTAGE AND PHASE
CURRENTS TRANSIENT RESPONSE - LEADING
EDGE (0A - 54A)
82
80
78
76
74
50mV/DIV.
1.7V>
84
EFFICIENCY (%)
IL4
5.0A/DIV.
86
72
VCORE
0
5
10
15
20
25
30
35
40
45
50
55 60
OUTPUT CURRENT (A)
FIGURE 6. HIP6301EVAL2 EFFICIENCY (ROOM
TEMPERATURE, 100LFM AIR FLOW)
Output Short-Circuit Protection
IL4
IL3
0A>
5.0A/DIV.
IL2
dI/dt = 500A/μs
5μs/DIV.
T0
T1
FIGURE 5. HIP6301EVAL2 OUTPUT VOLTAGE AND PHASE
CURRENTS TRANSIENT RESPONSE - FALLING
EDGE (54A - 0A)
An additional important aspect of the transient response
operation is the response speed of the converter. As it can
be seen, it takes around a microsecond for the duty cycle of
one phase to exhibit a visible response to the transient
3
Figure 7 captures the circuit’s response to an output
overloading caused by a short-circuit. At time T0, a shortcircuit is applied to the output of the converter. Responding
to the output overload, the circuit ramps up the output
current. At time T1, the current has reached a level high
enough to trip the over-current protection. The converter
shuts down and the output voltage collapses under the
current draw of the output short-circuit.
Application Note 9906
make substitutions, or even replace the provided on-board
capacitors altogether. Similarly, many of the ceramic
capacitors can be replaced, varying the quantity and the mix,
thus shaping the high-frequency dynamic response to fit
certain required envelope.
VCORE
500mV/DIV.
GND>
Tailoring Circuit Performance
IL4
10.0A/DIV.
IL3
IL2
0A>
20μs/DIV.
T0
T1
T4
FIGURE 7. HIP6301EVAL2 SHORT-CIRCUIT PROTECTION
SHUTDOWN
Figure 8 details the hiccup mode the converter resorts to in
case of a persisting output short-circuit condition. At time T0
the first short-circuit condition is encountered and the
converter shuts down. After a wait period of about 2200
switching cycles (about 11ms), the converter attempts to restart, soft-starting the output at time T1. As a result, the
output voltage increases to the point where the current
drawn by the short-circuit trips, again, the over-current
protection. The cycle repeats ad libitum for as long as the
short-circuit is applied to the converter’s output.
For output currents below 55A, typical modifications relate to
cost reductions in the circuit’s bill of materials. Popular
changes include using slightly higher rDS(ON) MOSFETs,
downgrading (using higher ESR types) the output
capacitors, reducing the number/mix of output highfrequency decoupling, etc. Significantly lower current
applications may prompt more drastic circuit changes, such
as disablement of one of the three phases. For such
applications (typically requiring less than 36A), we
recommend considering evaluating dedicated 2-phase
circuits.
Conclusion
The HIP6301EVAL2 evaluation board is a flexible tool
designed to showcase the operation of a 3-phase
synchronous buck switching converter built using Intersil
HIP6301 Multiphase Buck PWM Controller and the
HIP6601A Synchronous Buck MOSFET drivers. The
controller-drivers combination has the necessary application
flexibility to address custom-tailored solutions supporting
existing, as well as near-future microprocessor offerings.
References
VCORE
For Intersil documents available on the internet, see web site
www.intersil.com/
Intersil Technical Support 1 (888) INTERSIL
500mV/DIV.
[1] HIP6301 Data Sheet, Intersil Corporation,
Power Management Products Division, FN4765.
(www.intersil.com/)
IL2
IL3
10.0A/DIV.
GND>
As delivered, the evaluation board is optimized for the
maximum current of 55A. In this configuration, the circuit
represents a finite design point, exhibiting a characteristic
blend of functionality, performance, and cost. Various tradeoffs can be made to enhance the circuit with emphasis on
one parameter, most times with negative results on others.
IL4
0A>
2ms/DIV.
T0
T1
T2
FIGURE 8. HIP6301EVAL2 SHORT-CIRCUIT PROTECTION
HICCUP MODE
HIP6301EVAL2 Modifications
Output Voltage Transient Response
The evaluation board has some additional capacitor
footprints (C81-90) made available for various experiments.
These footprints can be used to add output capacitance,
4
[2] HIP6601A Data Sheet, Intersil Corporation,
Power Management Products Division, FN4884.
Application Note 9906
HIP6301EVAL2 Schematic
10
ATX CONNECTOR
4, 6, 19, 20
+12VIN
+5VIN
L1
1.2μH
3,4
12V
J6
C24
1μF
J7
1,2
1, 2, 11
9
14
J1
+3.3VIN
VCC
6
‘VCC12’
+5VSB
PVCC
J2
PS_ON
U2
PWM
3, 5, 7, 13,
15, 16, 17
GND
7
TP1
‘PWM1’
‘VCC5’
HIP6601A
2
1
8
J3
5
4
C13
100μF
BOOT
Q2
UGATE
PHASE
C11
0.1μF
L2
0.85μH
3
C1
0.1μF
R1
CR1
TP1
‘PWM1’
2.49K
G
R
VCC
PWM4
ISEN4
20
18
15
17
16
PWM1
6
PVCC
7
U3
TP2
‘PWM2’
R10
10K
14
PGOOD
Q1
BSS123
19
13
U1
PWM2
TP5
‘COMP’
8
11
12
6
5
4
3
2
1
Q4
PHASE
8
4
TP3
‘PWM3’
5
C29
0.1μF
L3
0.85μH
LGATE
C15,18
2x1000μF
7
C44
1μF
COMP
FB
C2
1.5nF
6
PVCC
7
U4
R6
15K
PWM
VSEN
HIP6601A
2
1
8
4
5
UGATE
Q6
PHASE
LGATE
C41
0.1μF
L4
0.85μH
JP1
R7
2.67K
R13
C8,19
2x1000μF
R3
R8
‘VID0’
‘VID1’
‘VID2’
‘VID3’
‘VID4’
2.49K
TP3
‘PWM3’
Q2,4,6 - HUF76132P3
Q3,5,7 - HUF76143S3S
JP2
‘REMOTE VCORE SENSE’
JP3
‘REMOTE GND SENSE’
TO PGA423 SOCKET
‘VID0’ to ‘VID4’
J5
‘GND’
J4
‘VCORE’
‘VCC_SENSE’ ‘VSS_SENSE’
TO PGA423 SOCKET
5
+
Q7
GND
C4
C43
100μF
BOOT
3
R5
R12
C42 +
1μF
VCC
10
9
TP2
‘PWM2’
2.49K
ISEN3
+
Q5
GND
PWM3
C3
33pF
GND
1
UGATE
R2
R4
137K
VID0
VID1
VID2
VID3
VID4
HIP6601A
BOOT
2
3
ISEN2
HIP6301
FS/DIS
PWM
C7,14
2x1000μF
+
C33
100μF
C32
1μF
VCC
ISEN1
R9
1K
TP4
‘PGOOD’
C40
1μF
+
Q3
LGATE
GND
‘GND’
R11
1K
+
C12
1μF
TP11
TP8
TP10
‘GND’ ‘VCORE’ ‘VCORE’
C5, 6, 9, 10, 16, 17,
20-23, 25-28, 30,
31, 34-39
22x10μF
Application Note 9906
HIP6301EVAL2 Schematic (continued)
FROM PGA423 SOCKET
‘VID0’ TO ‘VID4’
FROM PGA423 SOCKET
‘VCC_SENSE’
‘VSS_SENSE’
J8
PGA423
GND
VCORE
C81-90
+
C45,47-49,51-53,55-57,
59-61,63-65,67-80
30x1μF
6
C46,50,54,58,62,66
6x10μF
Application Note 9906
Bill of Materials for HIP6301EVAL2
REFERENCE
DESIGNATOR
PART NUMBER
DESCRIPTION
MANUF. OR
VENDOR
0805
Any
QTY
C1,11,29,41
0.1μF Ceramic
C2
1.5nF Ceramic
Ceramic Capacitor, X7R, 25V, 1.5nF
0805
Any
1
C3
33pF Ceramic
Ceramic Capacitor, X7R, 50V, 33pF
0805
Any
1
C5,6,9,10,16,17, 20-23,2528,30,31, 34-39,46,50,54,
58, 62,66
C3216X5R0J106M
Ceramic Capacitor, X5R, 6.3V, 10μF
1206
TDK
28
C7,8,14,15,18,19
2SP1000M
OSCON Capacitor, 2V, 1000μF
10 x 10.5
Sanyo
6
C12,24,32,40,42, 44
1μF Ceramic
Ceramic Capacitor, Y5V, 25V, 1.0μF
1206
Any
6
C13,33,43
16SPS100M
OSCON Capacitor, 16V, 100μF
6.3 x 9.8
Sanyo
3
C45,47-49,51-53, 55-57,
59-61,63-65, 67-80
1μF Ceramic
Ceramic Capacitor, Y5V, 16V, 1.0μF
0805
Any
30
C4
Spare
0805
C81-90
Spare
10mm
CR1
67-1372-1-ND
Miniature R/G LED, Surface Mount Indicator
Digikey
1
J1,2
111-0702-001
Binding Post, Through Hole, Screw-on, Red
Johnson
Components
2
J3
111-0703-001
Binding Post, Through Hole, Screw-On, Black
Johnson
Components
1
J4,5
KPA8CTP
Cable to Pad Mechanical Terminal
Burndy
2
J6
39-29-9203
20-pin Mini-Fit, Jr.™ Header Connector
Molex
1
J7
39-29-9042
4-pin Mini-Fit, Jr. Header Connector
Molex
1
J8
67276-3700
PGA423 ZIF Connector
Molex
1
JP1-3
68000-236
Jumper Header
0.1” Spacing Berg
16/36
71363-102
Jumper Shunt
0.1” Spacing Berg
7
L1
1.2μH Inductor
Inductor, 6T of 16AWG on T44-52 Core
8 x 13
1
L2-4
0.85μH Inductor
Inductor, 6T of 14AWG on T50-8B/90 Core
11 x 18
3
Q1
BSS123CT-ND
Logic N-MOSFET, 100V, 6Ω
SOT-23
Digikey
1
Q2,4,6
HUF76132P3
UltraFET™ MOSFET, 30V, 11mΩ
TO-220
Intersil
3
591302B02800
Self-Locking Black Anodized Heatsink
Aavid
3
Q3,5,7
HUF76143S3S
UltraFET MOSFET, 30V, 5.5mΩ
TO-263
Intersil
3
R1-3
2.49kΩ
Resistor, 1%, 0.1W
0603
Any
3
R4
137kΩ
Resistor, 1%, 0.1W
0603
Any
1
R6
15kΩ
Resistor, 5%, 0.1W
0603
Any
1
R7
2.67kΩ
Resistor, 1%, 0.1W
0603
Any
1
R9,11
1kΩ
Resistor, 5%, 0.1W
0603
Any
2
R10
10kΩ
Resistor, 5%, 0.1W
0603
Any
1
R5,8,12,13
Spare
TP1-5,10
SPCJ-123-01
Test Point
Jolo
6
TP6,7,9,11
1514-2
Terminal Post
Keystone
4
TP8
1314353-00
Test Point, Scope Probe
Tektronics
1
U1
HIP6301CB
Multiphase Buck PWM Controller
SOIC-20
Intersil
1
U2-4
HIP6601ACB
Synchronous-Rectified Buck MOSFET Driver
SO-8
Intersil
3
7
Ceramic Capacitor, X7R, 25V, 0.1μF
CASE /
FOOTPRINT
2.8 x 3.4
4
0603
Mini-Fit, Jr.™ is a trademark of Molex, Inc.
UltraFET® is a registered trademark of Intersil Corporation.
Application Note 9906
HIP6301EVAL2 Layout
TOP SILK SCREEN
8
Application Note 9906
HIP6301EVAL2 Layout
(Continued)
TOP LAYER
9
Application Note 9906
HIP6301EVAL2 Layout
(Continued)
GROUND LAYER
10
Application Note 9906
HIP6301EVAL2 Layout
(Continued)
POWER LAYER
11
Application Note 9906
HIP6301EVAL2 Layout
(Continued)
BOTTOM LAYER
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
12
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