IRFI740G, SiHFI740G www.vishay.com Vishay Siliconix Power MOSFET FEATURES PRODUCT SUMMARY VDS (V) • Isolated package • High voltage isolation = 2.5 kVRMS (t = 60 s; Available f = 60 Hz) • Sink to lead creepage distance = 4.8 mm Available • Dynamic dV/dt rating • Low thermal resistance • Material categorization: for definitions of compliance please see www.vishay.com/doc?99912 400 RDS(on) () VGS = 10 V Qg max. (nC) 0.55 66 Qgs (nC) 10 Qgd (nC) 33 Configuration Single D Note * This datasheet provides information about parts that are RoHS-compliant and / or parts that are non-RoHS-compliant. For example, parts with lead (Pb) terminations are not RoHS-compliant. Please see the information / tables in this datasheet for details. TO-220 FULLPAK G DESCRIPTION Third generation power MOSFETs from Vishay provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness. The TO-220 FULLPAK eliminates the need for additional insulating hardware in commercial-industrial applications. The molding compound used provides a high isolation capability and a low thermal resistance between the tab and external heatsink. The isolation is equivalent to using a 100 micron mica barrier with standard TO-220 product. The FULLPAK is mounted to a heatsink using a single clip or by a single screw fixing. S G D S N-Channel MOSFET ORDERING INFORMATION Package TO-220 FULLPAK IRFI740GPbF SiHFI740G-E3 IRFI740G SiHFI740G Lead (Pb)-free SnPb ABSOLUTE MAXIMUM RATINGS TC = 25 °C, unless otherwise noted PARAMETER SYMBOL LIMIT Drain-Source Voltage VDS 400 Gate-Source Voltage VGS ± 20 VGS at 10 V Continuous Drain Current TC = 25 °C TC = 100 °C Pulsed Drain Current a ID IDM Linear Derating Factor Single Pulse Avalanche Energy b Repetitive Avalanche Current Repetitive Avalanche Energy a a Maximum Power Dissipation TC = 25 °C Peak Diode Recovery dV/dt c Operating Junction and Storage Temperature Range Soldering Recommendations (Peak temperature) d Mounting Torque for 10 s 6-32 or M3 screw UNIT V 5.4 3.4 A 22 0.32 W/°C EAS 390 mJ IAR 5.4 A EAR 4.0 mJ PD 40 W dV/dt 4.0 V/ns TJ, Tstg -55 to +150 300 °C 10 lbf · in 1.1 N·m Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. VDD = 50 V, starting TJ = 25 °C, L = 23 mH, Rg = 25 , IAS = 5.4 A (see fig. 12). c. ISD 10 A, dI/dt 120 A/μs, VDD VDS, TJ 150 °C. d. 1.6 mm from case. S16-0763-Rev. C, 02-May-16 Document Number: 91156 1 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRFI740G, SiHFI740G www.vishay.com Vishay Siliconix THERMAL RESISTANCE RATINGS PARAMETER SYMBOL TYP. MAX. Maximum Junction-to-Ambient RthJA - 65 Maximum Junction-to-Case (Drain) RthJC - 3.1 UNIT °C/W SPECIFICATIONS (TJ = 25 °C, unless otherwise noted) PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Static Drain-Source Breakdown Voltage VDS Temperature Coefficient VDS VGS = 0 V, ID = 250 μA 400 - - V VDS/TJ Reference to 25 °C, ID = 1 mA - 0.49 - V/°C VGS(th) VDS = VGS, ID = 250 μA 2.0 - 4.0 V Gate-Source Leakage IGSS VGS = ± 20 V - - ± 100 nA Zero Gate Voltage Drain Current IDSS VDS = 400 V, VGS = 0 V - - 25 VDS = 320 V, VGS = 0 V, TJ = 125 °C - - 250 Gate-Source Threshold Voltage Drain-Source On-State Resistance Forward Transconductance μA - - 0.55 gfs VDS = 50 V, ID = 3.2 A b 3.6 - - S VGS = 0 V, VDS = 25 V, f = 1.0 MHz, see fig. 5 - 1370 - - 380 - - 140 - f = 1.0 MHz - 12 - - - 66 - - 10 - - 33 - 14 - - 25 - - 54 - - 24 - - 4.5 - - 7.5 - 0.2 - 1.3 - - 5.4 S - - 22 TJ = 25 °C, IS = 5.4 A, VGS = 0 V b - - 2.0 V - 330 730 ns - 2.8 6.6 μC RDS(on) ID = 3.2 A b VGS = 10 V Dynamic Input Capacitance Ciss Output Capacitance Coss Reverse Transfer Capacitance Crss Drain to Sink Capacitance C Total Gate Charge Qg Gate-Source Charge Qgs Gate-Drain Charge Qgd Turn-On Delay Time td(on) Rise Time Turn-Off Delay Time tr td(off) Fall Time tf Internal Drain Inductance LD Internal Source Inductance LS Gate Input Resistance Rg VGS = 10 V ID = 10 A, VDS = 320 V, see fig. 6 and 13 b VDD = 200 V, ID = 10 A, Rg = 9.1 , RD= 20 , see fig. 10 b Between lead, 6 mm (0.25") from package and center of die contact D pF nC ns nH G S f = 1 MHz, open drain Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current IS Pulsed Diode Forward Current a ISM Body Diode Voltage VSD Body Diode Reverse Recovery Time trr Body Diode Reverse Recovery Charge Qrr Forward Turn-On Time ton MOSFET symbol showing the integral reverse p - n junction diode D A G TJ = 25 °C, IF = 10 A, dI/dt = 100 A/μs b Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD) Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Pulse width 300 μs; duty cycle 2 %. S16-0763-Rev. C, 02-May-16 Document Number: 91156 2 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRFI740G, SiHFI740G www.vishay.com Vishay Siliconix TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) Fig. 1 - Typical Output Characteristics, TC = 25 °C Fig. 3 - Typical Transfer Characteristics Fig. 2 - Typical Output Characteristics, TC = 150 °C Fig. 4 - Normalized On-Resistance vs. Temperature S16-0763-Rev. C, 02-May-16 Document Number: 91156 3 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRFI740G, SiHFI740G www.vishay.com Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage S16-0763-Rev. C, 02-May-16 Vishay Siliconix Fig. 7 - Typical Source-Drain Diode Forward Voltage Fig. 8 - Maximum Safe Operating Area Document Number: 91156 4 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRFI740G, SiHFI740G www.vishay.com Vishay Siliconix RD VDS VGS D.U.T. Rg + - VDD 10 V Pulse width ≤ 1 µs Duty factor ≤ 0.1 % Fig. 10a - Switching Time Test Circuit VDS 90 % 10 % VGS td(on) Fig. 9 - Maximum Drain Current vs. Case Temperature td(off) tf tr Fig. 10b - Switching Time Waveforms Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case L Vary tp to obtain required IAS VDS VDS tp VDD D.U.T Rg + - I AS V DD VDS 10 V tp 0.01 Ω Fig. 12a - Unclamped Inductive Test Circuit S16-0763-Rev. C, 02-May-16 IAS Fig. 12b - Unclamped Inductive Waveforms Document Number: 91156 5 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRFI740G, SiHFI740G www.vishay.com Vishay Siliconix Fig. 12c - Maximum Avalanche Energy vs. Drain Current Current regulator Same type as D.U.T. 50 kΩ QG VGS 12 V 0.2 µF 0.3 µF QGS QGD + D.U.T. VG - VDS VGS 3 mA Charge IG ID Current sampling resistors Fig. 13a - Basic Gate Charge Waveform S16-0763-Rev. C, 02-May-16 Fig. 13b - Gate Charge Test Circuit Document Number: 91156 6 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRFI740G, SiHFI740G www.vishay.com Vishay Siliconix Peak Diode Recovery dV/dt Test Circuit + D.U.T. Circuit layout considerations • Low stray inductance • Ground plane • Low leakage inductance current transformer + - - Rg • • • • + V - DD dV/dt controlled by Rg Driver same type as D.U.T. ISD controlled by duty factor “D” D.U.T. - device under test Driver gate drive Period P.W. + D= P.W. Period V GS = 10 V a D.U.T. ISD waveform Reverse recovery current D.U.T. VDS Body diode forward current dI/dt waveform Diode recovery dV/dt Re-applied voltage V DD Body diode forward drop Inductor current Ripple ≤ 5 % ISD Note a. VGS = 5 V for logic level devices Fig. 14 - For N-Channel Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?91156. S16-0763-Rev. C, 02-May-16 Document Number: 91156 7 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. 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