VDDQ and VTT Termination Regulation for DDR DRAM Memory Power Utilizing the ISL6530 ® Application Note April 2002 AN9993 Author: Douglas Mattingly Introduction Quick Start Evaluation The ISL6530 and the ISL6531 are dual, voltage mode controllers with many functions that are needed for DDR DRAM Memory power applications. The ISL6530 and ISL6531 contain high performance error amplifiers, a high accuracy reference, an internal 50% tracking reference, a fixed 300kHz internal oscillator with a 90o phase shift for dual synchronous buck regulators, over-current protection circuitry, Power Good indication, and two shut down options. There are two MOSFET drivers for use in both synchronousrectified Buck converters. The ISL6530 and ISL6531 are also capable of regulating the output voltage while the tracking DC-DC converter is sinking current. All these features are packaged in a 24 lead SOIC or a small 32 Lead 4x4[mm] MLFP. The ISL6530/31EVAL1 board is shipped ‘ready to use’ right from the box. The ISL6530/31EVAL1 board will only accept 5V from a standard power supply. Both outputs can be exercised through external loads. The VTT regulator has the ability to source or sink current while the VDDQ regulator may only source current. ISL6530 and ISL6531 Recommended Test Equipment The ISL6530 and ISL6531 are pin for compatible replacements to each other. All functions are identical between the two ICs. The difference between the ISL6530 and the ISL6531 lies in the compensation of the VTT regulator. The ISL6531 features internal compensation for the VTT regulator. More complete descriptions of both ICs can be found in their respective datasheets[1,2]. To test the functionality of the ISL6530, the following equipment is recommended: An LED lights up to indicate that the output voltages are within regulation. - A 5V, 10A capable bench power supply - Two electronic loads - Four channel oscilloscope with probes - Precision digital multimeters Reference Designs There are four different evaluation boards that are included in the scope of this application note. Table 1 describes each of the boards. Table 1 - Evaluation Boards Board Name There are posts available on the board for introducing power to the board and also for drawing current from the regulated outputs. Two probe points are also available for use. These probe points provide Kelvin connections to the PGOOD (TP4) and VREF_OUT (TP3) pins. IC ISL6530CB 24 ld SOIC ISL6530EVAL2 ISL6530CR 32 ld 4x4 MLFP ISL6531EVAL1 ISL6531CB 24 ld SOIC ISL6531EVAL2 ISL6531CR 32 ld 4x4 MLFP There are 3 sets of jumpers that are used for the supplying the input voltage and loading the VDDQ and VTT outputs. INPUT VOLTAGE Connect the positive lead of the 5V bench power supply to the VCC post (J1). Connect the ground lead of the supply to GND post (J2). Package ISL6530EVAL1 Power and Load Connections LOADING VDDQ Connect the positive terminal of the first electronic load to the VDDQ post (J3). Connect the return terminal of the same load to the GND post (J4). The ISL6530EVAL1 is an evaluation board that highlights the operation of the ISL6530 in an embedded DDR DRAM Memory Power application. The VDDQ supply has been designed to supply 2.5V at a maximum load of 10A. The VTT termination supply will track the VDDQ supply at 50% and was designed for a maximum load of 5A, sourcing or sinking. The schematic, Bill of Materials, and Board Layout for the ISL6530EVAL1 can be found in the Appendix. Customization of the reference design is discussed in this application note. LOADING VTT - SOURCING CURRENT To test VTT while the regulator sources current, connect the positive terminal of the second electronic load to the VTT post (J5). Connect the return terminal of the same load to the GND post (J6). LOADING VTT - SINKING CURRENT To test VTT while the regulator sinks current, connect the positive terminal of the second electronic load to the VDDQ post (J3). Connect the return terminal of the same load to the VTT post (J5). CAUTION: The return terminal of the load must float for this to work properly. 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2002. All Rights Reserved AN9993 Start Up There are two distinct start up methods for the VDDQ and VTT regulators. The first method is invoked through the application of power to the IC. The Softstart feature allows for a controlled turn on of the outputs once the Power On Reset (POR) threshold of the input voltage has been reached. Figure 1 shows the start up profile of the two regulators in relation to the start up of the 5V input supply. profile of the regulators with no load applied. Figure 4 shows the shutdown of the regulators will their full loads applied. VOCSET/SD 1V/DIV VDDQ 1V/DIV VTT VCC 1V/DIV 1V/DIV 2.5s/DIV VDDQ FIGURE 3. SHUTDOWN WITH NO LOAD 1V/DIV VTT 1V/DIV VOCSET/SD 1V/DIV 2ms/DIV FIGURE 1. START UP FROM POR The second method of start up is through the use of the Shutdown feature. Holding the OCSET/SD pin below 0.8V will disable both regulators by forcing both the upper and lower MOSFETs of both regulators off. Releasing the OCSET/SD pin allow the regulators to start up. Figure 2 show the start up profile of the two regulators with this method. VTT 1V/DIV 50μs/DIV FIGURE 4. SHUTDOWN WITH FULL LOAD VOCSET/SD 1V/DIV VTT Sleep State VDDQ 1V/DIV VTT 1V/DIV 2ms/DIV FIGURE 2. START UP FROM SHUT DOWN Shutdown Shutting Down Both VDDQ and VTT As discussed in the previous section, if the OCSET/SD pin is pulled down and held below 0.8V, both the VDDQ and VTT regulators will be turned off. Figure 3 shows the shutdown 2 VDDQ 1V/DIV The VTT regulator can be placed in a sleep state where the output is regulated to a wider tolerance while VDDQ continues to regulate. This is done by applying a logic high signal to the V2_SD pin. During this state, VDDQ can support a load while VTT cannot. This allows a very quick recovery back into synchronous buck mode. Once removed from this state by releasing the high signal on the V2_SD pin, the output rapidly returns to regulation. Figure 5 illustrates the VTT regulator going into sleep mode and Figure 6 shows the regulator being taken out of the sleep state. Reference Design Customization The ISL6530/31EVAL1 board has a number of options that will allow the designer to customize the board. One modification that can be made is to overdrive the internal resistor divider which sets the reference voltage for the VTT regulator in relation to VDDQ. This may be done by populating resistors R5 and R6, as to create a tracking ratio AN9993 VV2_SD VDDQ 1V/DIV 10mV/DIV VDDQ 1V/DIV VTT VTT 1V/DIV 10mV/DIV 5μs/DIV 1s/DIV FIGURE 7. VDDQ AND VTT RIPPLE VOLTAGES FIGURE 5. VTT SLEEP MODE shows VDDQ under transient loading. Figure 9 shows VTT under a transient loading that causes VTT to source current. Figure 10 shows VTT under a transient that causes VTT to sink current. Figure 11 shows both VDDQ and VTT under simultaneous transient loading. VV2_SD 1V/DIV VDDQ VDDQ 1V/DIV 100mV/DIV VTT VTT 100mV/DIV 1V/DIV 50μs/DIV VDDQ Load Current 5A/DIV FIGURE 6. VTT RETURN FROM SLEEP MODE other than the internally generated 50%. Please refer to the datasheet for proper component selection. 200μs/DIV In order to increase performance during a load transient on either output, two 0603 capacitor pads have been provided at each output. These pads allow the designer to add ceramic capacitors on the output. Ceramic capacitors help to decrease the overall output capacitance ESR while they have much lower lead inductance. The pad reference designators are C20 and C21 for the VTT output and reference designators C13 and C14 for the VDDQ output. FIGURE 8. TRANSIENT ON VDDQ VDDQ 50mV/DIV The VDDQ output also has two extra bulk capacitor pads, designated C11 and C12. The designer may wish to utilize these to decrease the ripple voltage, improve transient performance or both. VTT 50mV/DIV Ripple Voltage Figure 7 shows the ripple voltage on both the VDDQ output and the VTT output. Transient Performance Figures 8, 9, 10 and 11 show the response of the outputs when subjected to a variety of transient loads. Figure 8 3 0A VTT Load Current 5A/DIV 200μs/DIV FIGURE 9. SOURCING TRANSIENT ON VTT AN9993 96% 94% VDDQ 92% 50mV/DIV 90% VTT 88% 50mV/DIV 86% 84% VTT Load Current 5A/DIV 0A 82% 80% 0 1 2 3 4 5 6 7 200μs/DIV Load Current FIGURE 10. SINKING TRANSIENT ON VTT FIGURE 13. VDDQ EFFICIENCY 8 9 10 VDDQ 100mV/DIV VTT 100mV/DIV Conclusion VTT Load Current 5A/DIV The ISL6530/31EVAL1 board is a dual DC-DC converter reference design for DDR Memory Power applications that require up to 10A on VDDQ and up to 5A on VTT. In addition, the design may be modified for applications with different requirements. 0A VDDQ Load Current 5A/DIV 0A 200μs/DIV References FIGURE 11. TRANSIENTS ON VDDQ AND VTT Efficiency Each channel of the ISL6530 is highly efficient which leads to a high overall system efficiency. The efficiency of the VTT regulator in current sourcing and current sinking modes is shown in Figures 12. Figure 13 illustrates the efficiency of the VDDQ regulator. 96% 95% 94% 93% VTT Sourcing 92% 91% VTT Sinking 90% 89% 88% 87% 86% 0 1 2 3 4 Load Current FIGURE 12. VTT EFFICIENCY (SOURCING CURRENT) 4 5 For Intersil documents available on the web, see http://www.intersil.com/ [1] ISL6530 Data Sheet, Intersil Corporation, FN9052 [2] ISL6531 Data Sheet, Intersil Corporation, FN9053 AN9993 ISL6530EVAL1 Schematic VCC J1 R1 SW1 C1 C2 GND J2 LP1 15 21 R2 R3 20 SW2 C3 D1 VCC OCSET/SD BOOT1 V2_SD Q1 UGATE1 1 R4 9 C6 GNDA TP4 PHASE1 3 L1 19 Q4 LGATE1 ISL6530 R5 C30 J3 VDDQ @10A C7,8,9,10,11,12 22 Q2 23 GND J4 TP3 C15 8 No Pop C13,14 PGOOD PVCC1 C28 C4,5 2 4 VREF_IN PGND1 24 VREF TP2 D2 6 COMP1 BOOT2 11 C17 C26 UGATE2 C27 12 C16 R26 PHASE2 5 10 FB1 L2 C25 LGATE2 14 C20,21 J5 VTT @5A C18,19 Q3 R19 R20 R25 7 PGND2 SENSE1 COMP2 C29 TP1 16 C23 17 R21 R23 R6 C24 No Pop 5 J6 SENSE2 FB2 18 C22 R22 GND 13 U1 AN9993 ISL6530EVAL1 Bill of Material Ref Des C1 C2,6,15,16 C3,17 C4,5,7,8,9, 10,18,19 C11,12 Description Vendor Vendor P/N Qty 1nF Capacitor, 0603 Various --- 1 0.1μF Capacitor, 0603 Various --- 4 1μF Capacitor, 0805 Various --- 3 Panasonic EEFUE0J151R 8 --- --- --- 150μF Capacitor Not Populated (Reserved for 150μF Panasonic SP Capacitor) C22 10nF Capacitor, 0603 Various --- 1 C24 68pF Capacitor, 0603 Various --- 1 C23 2700pF Capacitor, 0603 Various --- 1 C25 15nF Capacitor, 0603 Various --- 1 C27 100pF Capacitor, 0603 Various --- 1 C26 5600pF Capacitor, 0603 Various --- 1 0.1μF Capacitor, 0805 Various --- 2 --- --- 0 Digikey MA732 2 Panasonic ETQP6F1R0SFA 2 MOSFET, 8 Pin SOIC Fairchild ITF86130 2 Q3 Dual MOSFET, 8 Pin SOIC Fairchild ITF86110 1 Q4 2N7002 MOSFET, SOT23 Various --- 1 R1 3.48kΩ 1% Resistor, 0603 Various --- 1 R2 750Ω 1% Resistor, 0603 Various --- 1 R3,4 10kΩ 1% Resistor, 0603 Various --- 2 R5,6 0603 Resistor (Not Populated) --- --- 0 3.01kΩ 1% Resistor, 0603 Various --- 1 R22 158Ω 1% Resistor, 0603 Various --- 1 R23 8.87kΩ 1% Resistor, 0603 Various --- 1 R20 1.43kΩ 1% Resistor, 0603 Various --- 1 R26 6.34kΩ 1% Resistor, 0603 Various --- 1 R25 100Ω 1% Resistor, 0603 Various --- 1 Pushbutton, miniature Digikey CKN1100-ND 2 C28,29 C13,14,20, 21 D1,2 L1, L2 Q1,2 R19,21 SW1,2 0805 Capacitor (Not Populated) Diode, 30mA, 30V 1μH Inductor 6 AN9993 Ref Des Description Vendor Vendor P/N Qty LP1 LED Digikey L63111CT-ND 1 U1 Dual Synchronous Buck PWM Controller for DDR Applications Intersil ISL6530CB 1 TP3,4 Test Points Digikey 5002K-ND 2 J1,2,3,4, 5,6 Test Points Keystone 1514-2 6 ISL6530EVAL1 Layout TOP SILK SCREEN TOP 7 AN9993 INTERNAL 1 GROUND INTERNAL 2 POWER 8 AN9993 BOTTOM BOTTOM SILK SCREEN All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. 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