Application Note 1881 Author: Billy Yang ISL8115EVAL1Z Synchronous Buck Converter User Guide Introduction ISL8115 Key Features The ISL8115EVAL1Z is a Synchronous Buck Converter implementing Intersil’s wide input range PWM controller ISL8115. Utilizing voltage mode control with input feed-forward, the ISL8115EVAL1Z maintains a constant loop gain for optimal transient response, especially for applications with a wide input voltage range. For a more detailed description of the ISL8115 functionality, refer to the ISL8115 data sheet. • Wide VIN range operation: 2.97V to 36V; up to 5.5V output and 30A load current per phase. This application note includes the test setup, typical performance waveforms, schematic, layout and Bill of Materials (BOM). • Diode emulation mode for light load efficiency improvement TABLE 1. EVALUATION BOARD ELECTRICAL SPECIFICATIONS VIN DESCRIPTION Board Input Range MIN TYP 10 12 • Integrated 5V high speed 4A MOSFET gate drivers - Internal bootstrap diode • Oscillator programmable from 150kHz to 1.5MHz - Frequency synchronization to external clock signal Evaluation Board Specifications SPEC • Fast transient response - Voltage-mode PWM leading-edge modulation with non-linear control - Input voltage feed-forward • Output OVP/UVP; OCP and OTP MAX UNIT 15 • Power-good open drain output V • Adjustable soft-start VOUT Output Voltage 1.5 V • Pre-bias start-up function IOUT Output Rated Current 30 A IOC Overcurrent Threshold 32 A Fsw Switch Frequency 220 kHz Input UVP Rising threshold 9.7 V • Excellent output voltage regulation - 0.6V ±1.0% internal reference (-40°C~125°C) - 0.6V ±0.7% internal reference (-40°C~105°C) - Differential voltage sensing Falling threshold 9.2 V Applications 90.88 % • Power supply for datacom/telecom and POL η Efficiency at 50% load • Wide input voltage range buck regulators • High current density power supplies RF power amplifier bias compensation Recommended Equipment • Input power source up to 15V supply voltage with 60W power supply ability • Electronic load with 50W power sinking ability • Voltmeters and ammeters • 100MHz quad-trace oscilloscope FIGURE 1. ISL8115EVAL1Z EVALUATION BOARD September 25, 2013 AN1881.1 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas LLC 2013. All Rights Reserved Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries. All other trademarks mentioned are the property of their respective owners. Application Note 1881 FIGURE 2. ISL8115EVAL1Z TEST SET-UP Design Guide Quick Test Setup 1. Ensure that the Evaluation board is correctly connected to the power supply and the electronic load prior to applying any power. Please refer to Figure 2 for proper set-up. 2. Set the input voltage to 12V, turn on the power supply and observe output voltage. The output voltage should variation should be within 5%. 3. Adjust load current within 30A. The output voltage variation should be within 5%. 4. Use oscilloscope to observe output ripple voltage and phase node ringing. For accurate measurement, please refer to Figure 3 for proper set-up. Note: Test points TP1; TP3; TP8; TP9 are for voltage measurement only. Do not allow high current through these test points. The ISL8115EVAL1Z is optimized for 10V to 15V input voltage range. However, the evaluation board can be modified to support multiple applications due to the customer requirements. Please refer to the datasheet for the detailed information. Output Voltage Adjustment The output voltage can be set by the resistor R4, R1. In order to keep the existing compensation parameters unchanged, adjust R4 to set the output voltage by the following Equation 1: R4 = 0.6 V × R1 Vout − 0.6 V (EQ. 1) VMON monitors the output for UVP and OVP, the resistor divider value of R11/R8 should be the same with the R1/R4. Synchronization Probe Set-up ISL8115EVAL1Z board can be synchronized with an external clock. Apply a clock signal (10% to 90% duty cycle) in the range of 150kHz to 1.5MHz to the FSET pin makes the internal frequency synchronized with the external clock. Please remove R27 when the sync function is implemented. FIGURE 3. OSCILLOSCOPE PROBE SET-UP 2 AN1881.1 September 25, 2013 Application Note 1881 92 90 88 86 84 82 80 78 76 74 72 70 68 66 64 62 60 Unless otherwise specified, the input voltage is 12V. VIN = 10.5V VIN = 12V EFFICIENCY (%) EFFICIENCY (%) Typical Performance Curves VIN = 13.5V 0 5 10 15 20 25 30 92 90 88 86 84 82 80 78 76 74 72 70 68 66 64 62 60 VIN = 10.5V VIN = 12V VIN = 13.5V 0 2 4 OUTPUT CURRENT (A) FIGURE 4. EFFICIENCY vs LOAD CURRENT AT CCM MODE 1.5029 1.5028 1.5028 1.5027 10 1.5027 1.5026 1.5026 1.5025 VOUT (V) VOUT (V) 8 FIGURE 5. EFFICIENCY vs LOAD CURRENT AT DEM MODE 1.5029 VIN = 12V 1.5024 1.5023 VIN = 12V 1.5025 1.5024 1.5023 1.5022 1.5021 1.5022 1.5020 1.5021 1.5019 6 OUTPUT CURRENT (A) 0 2 4 6 8 1.5020 10 12 14 16 18 20 22 24 26 28 30 0 2 4 6 8 LOAD CURRENT (A) 10 12 14 16 18 20 22 24 26 28 30 LOAD CURRENT (A) FIGURE 6. VOUT LOAD REGULATION AT CCM MODE FIGURE 7. VOUT LOAD REGULATION AT DEM MODE CCM MODE DEM MODE 1.5030 1.5036 1.5033 1.5027 VOUT (V) VOUT (V) 1.5030 1.5024 NO LOAD 1.5027 NO LOAD 1.5024 1.5021 1.5021 1.5018 10.5 11.0 11.5 12.0 12.5 13.0 13.5 1.5018 10.5 11.0 VIN (V) 11.5 12.0 12.5 13.0 13.5 VIN (V) FIGURE 8. LINE REGULATION AT NO LOAD CONDITION 3 AN1881.1 September 25, 2013 Application Note 1881 Typical Performance Curves Unless otherwise specified, the input voltage is 12V. (Continued) CCM MODE DEM MODE 1.5030 1.5030 1.5028 1.5028 FULL LOAD 30A VOUT (V) VOUT (V) FULL LOAD 30A 1.5026 1.5024 1.5022 10.5 1.5026 1.5024 11.0 11.5 12.0 12.5 13.0 13.5 1.5022 10.5 11.0 11.5 VIN (V) 12.0 12.5 13.0 13.5 VIN (V) FIGURE 9. LINE REGULATION AT FULL LOAD CONDITION VOUT 50mV/DIV PH 10V/DIV 2µs/DIV FIGURE 10. OUTPUT VOLTAGE RIPPLE AT 30A LOAD CONDITION 100mV/DIV VOUT 100mV/DIV VOUT OUTPUT LOAD OUTPUT LOAD 10A/DIV 10A/DIV 200µs/DIV 200µs/DIV FIGURE 11. 0A-10A; 2A/µs AT CCM MODE FIGURE 12. 10A -20A; 2A/µs AT CCM MODE 4 AN1881.1 September 25, 2013 Application Note 1881 Typical Performance Curves Unless otherwise specified, the input voltage is 12V. (Continued) 500mV/DIV 20A/DIV OUTPUT LOAD 10A/DIV OUTPUT LOAD 500mV/DIV VOUT VIN 5V/DIV VOUT VIN 10V/DIV 2ms/DIV 5ms/DIV FIGURE 13. START-UP AT 0A LOAD CONDITION FIGURE 14. START-UP AT 30A LOAD CONDITION VOUT 500mV/DIV 10A/DIV OUTPUT LOAD OUTPUT LOAD 20A/DIV VOUT 500mV/DIV VIN 5V/DIV VIN 10V/DIV 50ms/DIV 500µs/DIV FIGURE 15. SHUTDOWN AT 0A LOAD CONDITION FIGURE 16. SHUTDOWN AT 30A LOAD CONDITION OUTPUT LOAD 20A/DIV OUTPUT LOAD VOUT VOUT 500mV/DIV PH 5ms/DIV 5ms/DIV FIGURE 17. OCP AT 34A LOAD FIGURE 18. SHORT PROTECTION 5 20A/DIV 500mV/DIV 20V/DIV AN1881.1 September 25, 2013 Schematic TP9 RGND PVCC R30 4.99K R10 0 R8 2K 2K 3 R1 C3 3 4 Q5 2N7002LT1 C17 0.22uF 2.2n 33nF C2 R2 R17 1.27K 787 11.8K CLK_OUT 23 R38 0 R26 24 R37 0 BOOT SS 113K VIN R6 10 JP5 C22 2.2uF R35 1 2 3 1 2 3 Q4 DNP JP7 4 Big Lug R28 2.8K C33 6TPF330M9L R13 DNP DNP C32 6TPF330M9L C31 DNP J3 5 11 PVCC C34 1 L1 9 8 Q1 R33 0 1 1 2 3 1 2 3 10 Q2 4 2 4 0.53mOhm PA1513.321 C16 0.22uF D2 C24 100uF 7 C23 100uF DNP R14 2 Big Lug 320nH C21 2.2uF C26 100uF C25 100uF C11 1uF C15 1uF 33.2K R12 4.12K 68.1K R34 2.2 TP3 PVIN PVCC C30 10uF AN1881.1 September 25, 2013 EVAL1Z Input: 12V Output: 1.5V/30A Frequency: 220KHz C36 10uF C29 10uF C35 DNP C38 10uF C39 DNP J1 VIN 12V TP1 GND C13 1uF C10 1uF Upper MOS: RJK0305 Lower MOS: RJK0301 R20 R36 140K R29 10k 13 UGATE CLKOUT R27 input rising shreshold: 9.7V input falling shreshold: 9.2V ISENA 14 15 VMON 16 17 CONF 1 CLK_IN PHASE ISL8115IRTZ FSET 18.2K U1 PLL_COMP 4 Q3 5 22 PVCC R43 0 VFF 21 R23 ISHARE 12 C6 R16 DNP C20 4.7uF LGATE PGOOD 20 R25 0 ISET PGOOD 4 ISHARE_BUS GND RGND 18 19 390pF 5.11K FB 25 VCC R21 1n 3 C12 DNP 10K COMP DNP JP6 C19 EN R24 JP3 2 JP4 J4 VOUT 1 C4 J2 GND Application Note 1881 R18 C14 2.2nF ISENB Average OCP: 32A Peak current limit: 36A R22 0 RAMP 2 C1 6 1 JP1 R9 0 49.9 8.2nF PGOOD 3K R3 5 6 TP4 PGOOD R11 3K GREEN 2 RED C37 1uF TP8 VOUT_S LED1 5 1 R4 5 R31 4.99K Application Note 1881 Bill of Materials QTY REFERENCE VALUE DESCRIPTION 1 C1 33nF CAP CER 0.033µF 50V 10% X7R 0603 Generic Generic 1 C2 2.2n CAP CER 2200pF 50V 5% NP0 0603 Generic Generic 1 C3 8.2n CAP CER 8200pF 50V 5% NP0 0603 Generic Generic 1 C4 1n CAP CER 1000pF 50V 5% NP0 0603 Generic Generic 5 C6, C12, R13, R16, R24 DNP Generic Generic 5 C10, C11, C13, C15, C37 1µF CAP CER 1µF 10V 10% X5R 0603 Generic Generic 1 C14 2.2nF CAP CER 2200pF 50V 5% NP0 0603 Generic Generic 2 C16, C17 0.22µF CAP CER 0.22µF 16V 10% X7R 0603 Generic Generic 1 C19 390pF CAP CER 390pF 50V 5% NP0 0603 Generic Generic 1 C20 4.7µF CAP CER 4.7µF 6.3V 10% X5R 0805 Generic Generic 1 C21 2.2µF CAP CER 2.2µF 25V 10% X7R 1210 C3225X7R1E225K/1.60 TDK 1 C22 2.2µF CAP CER 2.2µF 6.3V 20% X5R 0603 Generic Generic 4 C23, C24, C25, C26 100µF CAP CER 100µF 6.3V 20% X5R 1210 C3225X5R0J107M250AC TDK 4 C29, C30, C36, C38 10µF CAP CER 10µF 50V 10% X5R 1206 C3216X5R1H106K160AB TDK 2 C31, C34 DNP CAP TANT 330µF 6.3V 20% 2917 6TPF330M9L Panasonic 2 C32, C33 6TPF330M9L CAP TANT 330µF 6.3V 20% 2917 6TPF330M9L Panasonic 2 C35, C39 DNP CAP OS-CON 270µF 16V 16SEPC270MX Panasonic 1 D2 DNP DIODE SCHOTTKY 40V SOD123 6 JP1, JP3, JP4, JP5, JP6, JP7 Jumper JUMPER PLUG 2POS DOUBLE ROW XG8T-0231 Omron 1 J1 VIN POST BINDING BANANA INSULATED RE 111-0707-001 Johnson Components 1 J2 GND POST BINDING BANANA INSULATED BL 111-0703-001 Johnson Components 2 J3, J4 Big Lug CONN- Big Lug TERMINAL POST KPA8CTP Burndy 1 LED1 LNJ162C3XRA Panasonic 1 L1 320nH INDUCT PWR 320NH SMD PA1513.321 Pulse 2 Q1, Q2 RJK0305 MOSFET N-CH 30V 30A 5-LFPAK RJK0305DPB-00#J0 Renesas 2 Q3, Q4 RJK0328 MOSFET N-CH 30V 30A 5-LFPAK RJK0305DPB-00#J0 Renesas 1 Q5 2N7002LT1 MOSFET N-CH 60V 115mA SOT-23 2N7002LT1 ON Semiconductor 2 R1, R11 3k RES 3.00kΩ 1/10W 1% 0603 SMD Generic Generic 1 R2 787 RES 787Ω 1/10W 1% 0603 SMD Generic Generic 1 R3 49.9 RES 49.9Ω 1/10W 1% 0603 SMD Generic Generic 2 R4, R8 2k RES 2.00kΩ 1/10W 1% 0603 SMD Generic Generic 1 R6 10 RES 10Ω 1/10W 1% 0603 SMD Generic Generic 8 R9, R10, R22, R25, R33, R37, R38, R43 0 RES 0.0Ω 1/10W JUMP 0603 SMD Generic Generic 1 R12 4.12k RES 4.12kΩ 1/10W 1% 0603 SMD Generic Generic 1 R14 2 RES 2.00Ω 1/4W 1% 1206 SMD Generic Generic 1 R17 1.27k RES 1.27kΩ 1/10W 1% 0603 SMD Generic Generic 2 R18, R29 10k RES 10kΩ 1/10W 1% 0603 SMD Generic Generic 1 R20 33.2k RES 33.2kΩ 1/10W 1% 0603 SMD Generic Generic 1 R21 5.11k RES 5.11kΩ 1/10W 1% 0603 SMD Generic Generic LXA3025IGC-TR LED 7 PART # VENDOR AN1881.1 September 25, 2013 Application Note 1881 Bill of Materials (Continued) QTY REFERENCE VALUE 1 R23 11.8k RES 11.8kΩ 1/10W 1% 0603 SMD Generic Generic 1 R26 18.2k RES 18.2kΩ 1/10W 1% 0603 SMD Generic Generic 1 R27 113k RES 113kΩ 1/10W 1% 0603 SMD Generic Generic 1 R28 2.8k RES 2.8kΩ 1/10W 1% 0603 SMD Generic Generic 2 R30, R31 4.99K RES 4.99kΩ 1/10W 1% 0603 SMD Generic Generic 1 R34 2.2 RES 2.2Ω 1/10W 1% 0603 smD Generic Generic 1 R35 68.1k RES 68.1kΩ 1/10W 1% 0603 SMD Generic Generic 1 R36 140k RES 140kΩ 1/10W 1% 0603 SMD Generic Generic 1 TP1 GND Test point SPCJ-123-01 Jolo 1 TP3 PVIN Test point SPCJ-123-01 Jolo 1 TP4 PGOOD Test point SPCJ-123-01 Jolo 1 TP8 VOUT_S Test point SPCJ-123-01 Jolo 1 TP9 RGND Test point SPCJ-123-01 Jolo 1 U1 ISL8115 Sync Buck PWM Controller 24Ld QFN ISL8115FRTZ Intersil 8 DESCRIPTION PART # VENDOR AN1881.1 September 25, 2013 Assembly Drawing 9 Application Note 1881 AN1881.1 September 25, 2013 Application Note 1881 PCB Layout FIGURE 19. TOP LAYER FIGURE 20. LAYER 2 10 AN1881.1 September 25, 2013 Application Note 1881 PCB Layout (Continued) FIGURE 21. LAYER 3 FIGURE 22. LAYER 4 Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that the Application Note or Technical Brief is current before proceeding. For information regarding Intersil Corporation and its products, see www.intersil.com 11 AN1881.1 September 25, 2013