tb409

ES
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Using the EL7564 Demo Board
IGNS
OR N
ED F 5 4
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M M E E E E L7 5
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Technical Brief
S
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NO
May 23, 2003
Introduction
TB409
This demo board is operated at about 350kHz switching
frequency. The input voltages are 4.5V to 5.5V. This
document outlines the design consideration and lists the bill
of materials and the layout. Please also refer to the
advanced data sheet of EL7564 for detailed applications of
the features.
The EL7564 is a full featured Buck
(Step Down) DC:DC controller with
integrated synchronous MOSFETs.
With very few external components, a 4A step-down DC:DC
converter can be very easily built, resulting in saved board
space, minimal design effort, and improved design time.
C5
1 VREF
EN 20
2 SGND
FB 19
3 COSC
PG 18
EN
0.1µF
C4
390pF
R4
C3
22Ω
0.22µF
C2
2.2nF
C1a
C1b
330µF
0.1µF
PSHR
4 VDD
VDRV 17
5 VTJ
VHI 16
6 PGND
LX 15
7 PGND
LX 14
8 VIN
VIN
PGND 13
STP
9 STP
PGND 12
STN
10 STN
PGND 11
PG
J1
C6
D1
0.22µF
L1
4.7µH
VOUT
C7
330µF
20-PIN SO
C10
R2
100pF
2370Ω
R1
1kΩ
FIGURE 1. EL7564CM DEMO BOARD CIRCUIT SCHEMATIC
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CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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Technical Brief 409
C5
0.1µF
C4
390pF
R4
22Ω
C3
0.22µF
VTJ
C2
2.2nF
EN 28
2 SGND
FB 27
3 COSC
PG 26
4 VDD
VDRV 25
5 VTJ
VHI 24
6 PGND
VIN
5V
C1a
330µF
1 VREF
C1b
0.1µF
EN
PG
LX 23
7 PGND
LX 22
8 PGND
LX 21
9 PGND
LX 20
10 VIN
LX 19
11 VIN
LX 18
12 NC
NC 17
STP
13 STP
PGND 16
STN
14 STN
PGND 15
C6
0.22µF
D1
VOUT
3.3V, 4A
L1
4.7µH
C7
330µF
R2
2.37kΩ
C10
100pF
R1
1kΩ
28-PIN HTSSOP
FIGURE 2. EL7564CRE DEMO BOARD SCHEMATIC
EL7564 Demo Board Bill of Material
VIN = 5V, VOUT = 3.3V
COMPONENT
LABEL
VALUE
MANUFACTURER
MANUFACTURER’S
PHONE NUMBER
PART NUMBER
Capacitor
C1a
330µF
Sprague
207-324-4140
293D337X96R3
Capacitor
C1b
0.1µF
Vitramon
203-268-6261
VJ0805Y104KXXA
Capacitor
C2
2.2nF
Vitramon
203-268-6261
VJ0805Y222KXXA
Capacitor
C10
100pF
Vitramon
203-268-6261
VJ0805Y100KXXA
Capacitor
C3, C6
0.22µF
Vitramon
203-268-6261
VJ0805Y224KXXA
Capacitor
C4
390pF
Vitramon
203-268-6261
VJ0805A391KXXA
Capacitor
C5
0.1µF
Vitramon
203-268-6261
VJ0805Y104KXXA
Capacitor
C7
330µF
Sprague
207-324-4140
293D337X96R3
Diode
D1
Telefunken
1-800-554-5565
BAT42W
Inductor
L1
Dale
605-665-9301
IDC-5020 4.7µF
Coilcraft
847-639-6400
D03316P-472
4.7µH
Resistor
R1
1kΩ
Dale
402-563-6506
CRCW08051001
Resistor
R2
2370Ω
Dale
402-563-6506
CRCW08052371
Resistor
R4
22.1Ω
Dale
402-563-6506
CRCW080522R1
2
Technical Brief 409
Design Considerations
4. Output capacitor C7.
Choosing the Component Values
The following requirements are specified for a DC:DC
converter:
Input voltage range: VIN = 4.5V-5.5V
Output voltage: VO = 3.3V
Max output voltage ripple: ∆VO = 50mV
Output max current: IO = 4A
The following steps briefly outline the steps to choose
components. For a detailed design discussion, please refer
to Elantec Application #18 “Designing a High Efficiency
DC:DC Converter with the EL75XX.”
1. Choose the feedback resistor divider.
The output voltage is decided by:
EL7564CM:
R 

V O = 0.975 ×  1 + ------2-
R 1


R 

R 1
2
EL7564CRE: V O = 0.992 ×  1 + -------
If R1 is chosen to be 1kΩ, then:
R 2 = 2.37kΩ
2. Choose the converter switching frequency FS.
FS, inductor L1, output capacitor C7, and EL7564’s
switching loss are closely related. many iterations (or
thermal measurements) may be required before a final
value can be decided.
Please refer to the EL7564 data sheet for the FS vs
COSC curve.
3. Inductor L1.
The EL7564 is internally ramp-compensated. For
optimal operation, the inductor current ripple range
should be less than 0.8A.
If ∆IL = 0.8A, then:
( 1 – D ) × VO
L = --------------------------------∆I L × F S
when:
VO
D = --------V IN
Choosing L1 = 4.7µH yields ∆ILMAX = 0.72 and ∆ILMIN =
0.64A. L1 should also be able to handle DC current of 4A
and peak current of 4.4A at temperature range.
3
∆VO and ∆IL normally decide C7 value. ∆VO requires
ESR of C7 be less than:
∆V O
ESR = --------------------- = 70mΩ
∆I LMAX
Double-check the RMS current requirement of the output
capacitor:
∆I LMAX
∆I C7 = -------------------12
which is 0.21A. For a capacitor or combination of
capacitors with 70mΩ parallel ESR, it is more than
enough to handle this current.
5. Input capacitor C1a.
If all the AC current is handled by the input capacitor
C1a, its RMS current is calculated as:
I IN,rms =
[ D × ( 1 – D ) ] × IO
This gives almost 1.97A when D = DMAX. Therefore a
cap with 1.97A current handling capability should be
chosen. However, in case some other capacitor is
sharing current with it, C1a’s current requirement can be
reduced.
Technical Brief 409
Layout Considerations
The layout is very important for the converter to function
properly. Power Ground ( ) and Signal Ground ( ) should
be separated to ensure that the high pulse current in the
Power Ground never interferes with the sensitive signals
connected to Signal Ground. They should only be connected
at one point (normally at the negative side of either the input
or output capacitor.)
The trace connected to the FB pin is the most sensitive
trace. It needs to be as short as possible and in a “quiet”
place, preferably with the PGND or SGND traces
surrounding it.
In addition, the bypass capacitor connected to the VDD pin
needs to be as close to the pin as possible.
The heat of the chip is mainly dissipated through the PGND
pins for the CM package, and through the heat pad at the
bottom for the CRE package. Maximizing the copper area
around these PGND pins or the heat pad is preferable. In
addition, a solid ground plane is always helpful for the EMI
performance.
Performance
The waveforms and thermal performance curves of this
demo board are shown on the next pages. The junction
temperature of the chip can be determined by:
1.2 + VTJ
T J = 75 + -------------------------0.00384
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Technical Brief 409
Typical Performance Curves
100
VIN=5V
TA=25°C
60
VO=3.3V
90
NO AIRFLOW
50
40
100 LFPM
30
20
500 LFPM
VO=1.8V
80
75
65
60
0.1
0
1
VO=2.5V
85
70
200 LFPM
10
0
VIN=5V
95
EFFICIENCY (%)
JUNCTION TEMPERATURE RISE (°C)
70
2
3
4
0.6
1.1
1.6
2.1
2.6
3.1
3.6
4.1
IO (A)
IO (A)
FIGURE 3. EL7564CM JUNCTION TEMPERATURE RISE ON
DEMO BOARD
FIGURE 4. EL7564CRE EFFICIENCY
1.8
1.5
VO=3.3V
1.6
1
1.4
VO=3.3V
0.5
VO (V) (%)
PLOSS (W)
1.2
VIN=4.5V
1
0.8
VO=1.8V
0.6
VIN=5V
0
VIN=5.5V
-0.5
0.4
-1
0.2
0
0
0.5
1
1.5
2
2.5
3
3.5
-1.5
4
0
1
2
IO (A)
FIGURE 5. TOTAL CONVERTER POWER LOSS - EL7564CRE
50
3
4
IO (A)
FIGURE 6. EL7564CRE LOAD REGULATION
EL7564CRE THERMAL PAD SOLDERED TO 2LAYER PCB WITH 0.039” THICKNESS AND 1 OZ.
COPPER ON BOTH SIDES
45
40
45
35
TJ RISE
θJA (°C/W)
30
40
35
25
20
15
10
30
5
0
25
1
1.5
2
2.5
3
3.5
4
PCB AREA (in2)
FIGURE 7. EL7564CRE THERMAL RESISTANCE VS PCB
AREA - NO AIRFLOW
5
1
1.5
2
2.5
3
3.5
4
IO (A)
FIGURE 8. EL7564CRE JUNCTION TEMPERATURE RISE ON
DEMO BOARD - NO AIRFLOW
Technical Brief 409
Demo Board Waveforms
VIN=5V, VO=3.3V, IO=4A
VIN=5V, VO=3.3V, IO=0.2A-4A
∆VIN
VLX
IO
iL
∆VO
∆VO
FIGURE 9. SWITCHING WAVEFORMS
FIGURE 10. TRANSIENT RESPONSE
VIN=5V, VO=3.3V, IO=2A
VIN=5V, VO=3.3V, IO=4A
VIN
VIN
VO
VO
FIGURE 11. POWER-UP
FIGURE 12. POWER-DOWN
VIN=5V, VO=3.3V, IO=2A
VIN=5V, VO=3.3V, IO=4A
EN
EN
VO
VO
FIGURE 13. RELEASING EN
6
FIGURE 14. SHUT-DOWN
Technical Brief 409
Demo Board Waveforms
(Continued)
VIN=5V
IO
VO
FIGURE 15. SHORT-CIRCUIT PROTECTION
Demo Board Layout (EL7564CM)
1000 mil
2000 mil
FIGURE 16. TOP LAYER
1000 mil
2000 mil
FIGURE 15. TOP SILKSCREEN
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Technical Brief 409
Demo Board Layout (EL7564CM)
(Continued)
1000 mil
2000 mil
FIGURE 17. BOTTOM LAYER
1000 mil
2000 mil
FIGURE 16. BOTTOM SILKSCREEN
8
Technical Brief 409
Demo Board Layout (EL7564CRE)
(Continued)
2 in
2 in
FIGURE 18. TOP LAYER
2 in
2 in
FIGURE 17. TOP SILKSCREEN
9
Technical Brief 409
Demo Board Layout (EL7564CRE)
(Continued)
2 in
2 in
FIGURE 19. BOTTOM LAYER
2 in
2 in
FIGURE 18. BOTTOM SILKSCREEN
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