User Guide 014 ZL6105-1CH-DEMO1Z Demonstration Board User Guide Introduction Key Features The ZL6105 is an innovative power conversion and management IC that combines integrated MOSFET drivers with key power and fault management functions in a small package, resulting in a flexible and integrated solution. The ZL6105-1CH-DEMO1Z platform allows quick evaluation of the highly configurable ZL6105’s performance and features in either stand-alone mode or via the SMBus™ interface using Intersil’s PowerNavigator™ GUI software. • Optimized for small circuit footprint Specifications • ZL6105, Datasheet • Onboard enable switch • Power-good indicator • SMBus control interface • Interconnectivity with other Intersil demo boards References • AN2010, “Thermal and Layout Guidelines for Digital-DCTM Products” This board has been configured and optimized for the following range of operating conditions: • AN2035, “Compensation Using CompZLTM” • VIN = 5.5V to 14V • AN1779, “Configuring Current Sharing on the ZL6105 and ZL8101” • VOUT = 0.6V to 3.6V • IMAX = 40A • TB389, “PCB Land Pattern and Surface Mount Guidelines for QFN Packages” • fSW = 300kHz to 1333kHz • Peak efficiency: >90% at 50% load Ordering Information • Output ripple: <1% at 50% load PART NUMBER ZL6105-1CH-DEMO1Z DESCRIPTION ZL6105 Evaluation Kit, one channel (EVB, USB adapter, Cable, Software V IN EN SYNC ZL6105 V OUT DDC SMBus ENABLE SW1 ENABLE SYNC SMBus DDC ENABLE SYNC SMBus DDC FIGURE 1. ZL6105-1CH-DEMO1Z SIMPLIFIED SCHEMATIC December 18, 2014 UG014.0 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas LLC 2014. All Rights Reserved Intersil (and design) and PowerNavigator are trademarks owned by Intersil Corporation or one of its subsidiaries. All other trademarks mentioned are the property of their respective owners. User Guide 014 ZL6105-1CH-DEMO1Z BOARD FIGURE 2. TOP SIDE FIGURE 3. BOTTOM SIDE Submit Document Feedback 2 UG014.0 December 18, 2014 User Guide 014 Functional Description Quick Start Guide The ZL6105-1CH-DEMO1Z provides all of the circuitry required to demonstrate features of the ZL6105. The ZL6105-1CH-DEMO1Z has a functionally optimized layout that allows efficient operation up to the maximum output current. Power and load connections are provided through plug-in sockets. Standalone operation is achieved using a combination of pin-strap settings and stored settings. The pin-strap setting details are described in the ZL6105 datasheet. The stored settings are listed on “Default Configuration Settings” on page 14. Stand Alone Operation The ZL6105-1CH-DEMO1Z Demonstration Board schematics are shown in Figures 4 and 5. The hardware enable function is controlled by a toggle switch. The Power-Good (PG) LED indicates that VOUT is regulating. The right angle headers at opposite ends of the board are for connecting a USB to SMBus control board or for daisy chaining of multiple Intersil evaluation boards. Connecting multiple Intersil Digital boards allows the user to setup many shared features such as clock synchronization, controlled sequencing, phase spreading and fault spreading within Intersil’s PowerNavigator™ software as part of a single power project. This document provides operational instructions, schematics, bill of materials and PCB layers with layout notes for reference. Figures 14 through 19 show performance data taken using this hardware in its optimized configuration. The configuration settings that the hardware ships with are shown on page 14. 1. Ensure that the board is properly connected to the supply and loads before applying any power. 2. Set Enable switch to “DISABLE”. 3. Apply Load to VOUT+/VOUT-. 4. Connect the USB adapter cable to the host computer. 5. Connect the USB to SMBus adapter to J2 (Required to provide external power for enable switch). 6. Connect the input power supply to VIN+/VIN-. 7. Turn input supply on. 8. Set Enable switch to “ENABLE”. 9. Test ZL6105 operation. USB (PMBus) Operation 1. Follow steps 1 through 7 of Stand Alone Operation. 2. Download PowerNavigator software from the Intersil website and install. 3. Use the GUI to operate at VOUT up to 3.6V. 4. Set the Enable switch to “ENABLE”. 5. Monitor and configure the ZL6105 using the PowerNavigator software. Operating Range By default, the ZL6105-1CH-DEMO1Z is configured to provide 1V at up to 40A at 400kHz fSW. The board can also support a wider operating range and modifying the operating conditions will change the performance results. The board VIN range is 4.5V to 14V. The board VOUT setting is fixed at 1V by PMBus setting, but the range is programmable from 0.54V to 3.6V (including margin high/low) using the VOUT_COMMAND PMBus command. The maximum value of 3.6V is limited by pin strap. The board IOUT range is 0 to 40A. For continuous operation at 40A, airflow across the board may be needed. The switching frequency (fSW) is set to 400kHz by PMBus command, but the fSW setting can be changed by using the FREQUENCY_SWITCH PMBus command (while the device is disabled). The fSW range is 300kHz to 1.33MHz. Submit Document Feedback 3 UG014.0 December 18, 2014 Submit Document Feedback ZL6105-1CH-DEMO1Z Schematics VIN VIN C10 C11 C12 22µF 22µF 22µF 16V 16V 16V VDD R13 C13 10µF 4 SCL SDA DDC PG SYNC 7 8 30 36 2 SYNC 15 16 31 34 29 6 32 35 5 10 11 14 9 33 EN 3 28 C22 10µF 6.3V Address = Ox16 27 VDD Q2 BSC050NE2LS5 U2 ZL6105-02 GH SCL SDA DDC PG SW SYNC GL SS VTRK MGN ISENA ISENB PH_EN XTEMP CFG0 CFG1 CFG2 VSEN+ ILIM VSENFC0 BST FC1 UVLO SALRT EN SA0 VR V25 DGND SA1 V1 V0 SGND PGND 4 13 12 37 23 25 GH L1 470nH 24 SW R14 698 22 GL R19 3.48k 20 SENA 19 SENB 17 FB+ 18 26 XX4 C15 1µF 16V Q3 BSC010NE2LS D4 BAT54 21 1 VR R17 61.9k VOUT XX5 C14 1µF 16V XX1 XX2 + VOUT C19 C20 C21 C18 C17 C16 100µF 100µF 100µF 100µF 100µF 1500µF 6.3V 6.3V 6.3V 6.3V 6.3V 4V - C23 10µF 6.3V XX3 R15 R16 100k 100k J7 VOUT 1 J8 1 SG FIGURE 4. ZL6105-1CH-DEMO1Z DEMO BOARD User Guide 014 EN SCL SDA DDC PG 1 UG014.0 December 18, 2014 Submit Document Feedback ZL6105-1CH-DEMO1Z Schematics (Continued) VAUX R6 - R9 = 4.75k R1 R2 R3 R4 C1 10µF VIN 5 FROM PREQUEL J2 1 SDA 2 SALRT 3 SCL 4 GND 5 VI2C 6 MSTR_EN SDA SALRT SCL GND VI2C MSTR_EN TO SEQUEL J3 1 2 3 4 5 6 MSTR_SYNC RSVD1 GND DDC RSVD2 RSVD3 1 2 3 4 5 6 J4 VIN PG J1 D3 + VIN - - C5 330µF 16V C2 22µF 16V C3 22µF 16V C4 10µF 25V R18 1.5k J5 MSTR_SY NC RSVD1 GND DDC RSVD2 RSVD3 R8 49.9 SYNC SDA SCL DDC VAUX R9 10.0k SW1 R10 10.0k R11 392 3 ESW 2 MSTR_EN 1 DISABLE MONITOR ENABLE C8 1µF 25V EN C9 0.1µF 10V R12 100k FIGURE 5. ZL6105-1CH-DEMO1Z INTERFACE User Guide 014 1 2 3 4 5 6 UG014.0 December 18, 2014 User Guide 014 Bill of Materials QTY REFERENCE VALUE 1 U2 2 C2, C3 22µF 1 C4 1 C5 1 TOL (%) RATING TYPE ZL6105 PCB FOOTPRINT MANUFACTURER MLF36_6X6BX Intersil Corporation X5R SM1206 Murata X5R SM1206 Panasonic - ECG PART NUMBER 20 16V 10µF 10 25V 330µ 20 16V C8 1µF 10 25V X5R SM0603 Taiyo Yuden TMK107BJ105KA-T 1 C9 0.1µF 10 10V X7R SM0603 Kemet C0603C104K8RACTU 3 C10, C11, C12 22µF 20 16V X5R SM1206 Panasonic - ECG ECJ-3YB1C226M 1 C13 10µF 10 25V X7R SM1206 Taiyo Yuden TMK316B7106KL-TD 2 C14, C15 1µF 10 16V X7R SM0603 AVX Corporation 0603YC105KAT2A 5 C16, C17, C18, C19, C20 100µF 20 6.3V X5R SM1206 TDK Corporation C3216X5R0J107M 1 C21 1500µF 20 4V 2 C22, C23 10µF 10 6.3V 1 D4 BAT54 30V 0.8mΩ AL POLY SM_CAP_10.5X10.5_PX United Chemi-Con A_FLD AL POLY SM7343_KEMET_T530_ AVX BC X7R SM0805 Schottky SOD_523 1 L1 470nH Q2 BSC050NE2LS5 30V PG_TDSON_8_LAS Infineon 1 Q3 BSC010NE2LS 30V PG_TDSON_8_LAS Infineon 1 R1, R2, R3, 4.75k R4 ECJ-3YB1E106K APXA160ARA331MJC0G TPME158K004R0018 CGA4J1X7R0J106K125AC ON Semiconductor BAT54XV2T1OS 1 4 Inductor IND_HCM1305_XX TDK Corporation GRM31CR61C226ME15L Cooper Bussmann HCM1305-R47-R 1 1/16W SM0402 Panasonic - ECG ERJ-2RKF4751X ERJ-3RQF1R0V R13 1 1 1/16W SM0603 Panasonic - ECG 1 R14 953 1 1/16W SM0603 Panasonic ERJ-3EKF9530V 2 R15, R16 100k 1 1/16W SM0402 Vishay/Dale CRCW0402100KFKED 1 R17 133k 1 1/16W SM0402 Panasonic - ECG ERJ-2RKF1333X 1 R19 3.48k 1 1/16W SM0402 Panasonic - ECG ERJ-2RKF3481X SM0805 Taiyo Yuden LMK212B7106KG-TD DIO_LG_T67K Osram LG T67K-H2K1-24-Z ANCILLARY PARTS SPECIFIC TO DEMO BOARD OPERATION 1 C1 10µF 1 D3 GRN 2 J2, J4 HDR_3x2_RA RA HDRM3DUALRA100X10 SAMTEC 0 TSW-103-08-T-D-RA 2 J3, J5 SKT_3x2_RA RA HDRF3DUALRA100X100 SAMTEC SSQ-103-02-T-D-RA 1 R8 49.9 1 100mW THK FILM SM0402 PANASONIC-ECG ERJ-2RKF49R9X 2 R9, R10 10.0k 1 63mW THK FILM SM0402 Panasonic - ECG ERJ-2RKF1002X 1 R11 392 1 100mW THK FILM SM0402 Panasonic ERJ-2RKF3920X 1 R12 100k 1 63mW THK FILM SM0402 Panasonic - ECG ERJ-2RKF1003X 1 R18 1.5K 1 63mW THK FILM SM0603 Panasonic - ECG ERJ-3EKF1501V 1 SW1 SW_SPDT PCB VERT SW_TOG_ULTRAMIN_SP NKK DT Submit Document Feedback 10 10V X7R 1.8V 6 G13AP-RO UG014.0 December 18, 2014 User Guide 014 Bill of Materials (Continued) QTY REFERENCE VALUE TOL (%) RATING TYPE PCB FOOTPRINT 4 J1A, J1B, J7, JACK_BANANA J8 4 STANDOFF_#440.75LG STANDOFF_4-40_NDH 4 SCREW_#440.25" SCREW_4-40 Submit Document Feedback 7 JACK_KEYSTONE_575-4 MANUFACTURER Keystone Electronics PART NUMBER 575-4 UG014.0 December 18, 2014 User Guide 014 The following data was obtained using a ZL6105-1CH-DEMO1Z evaluation board. VIN = 12V for all data. 95 100 90 95 EFFICIENCY (%) EFFICIENCY (%) Measured Data 85 VOUT = 3.3V 80 VOUT = 1.8V VOUT = 1.5V VOUT = 1V 75 VOUT = 2.5V VOUT = 3.3V 85 VOUT = 1.8V 80 VOUT = 1.5V VOUT = 2.5V 75 VOUT = 1V 70 70 65 10 0 VOUT = 1.2V 65 VOUT = 1.2V 60 90 20 30 60 40 0 10 20 40 30 OUTPUT CURRENT (A) OUTPUT CURRENT (A) FIGURE 7. EFFICIENCY DATA AT 400kHz FIGURE 6. EFFICIENCY DATA AT 300kHz 100 99 95 EFFICIENCY (%) EFFICIENCY (%) 94 89 VOUT = 3.3V 84 VOUT = 2.5V VOUT = 1.8V 79 VOUT = 1.5V VOUT = 1.2V 85 VOUT = 3.3V 80 VOUT = 2.5V VOUT = 1.5V 75 VOUT = 1.8V VOUT = 1.2V 70 74 VOUT = 1.0V 65 VOUT = 1V 69 90 60 0 10 20 30 OUTPUT CURRENT (A) FIGURE 8. EFFICIENCY DATA AT 500kHz Submit Document Feedback 8 40 0 10 20 30 40 OUTPUT CURRENT (A) FIGURE 9. EFFICIENCY DATA AT 600kHz UG014.0 December 18, 2014 User Guide 014 Measured Data The following data was obtained using a ZL6105-1CH-DEMO1Z evaluation board. VIN = 12V for all data. (Continued) ZL6105-1CH-DEMO1Z VIN = 12V, VOUT = 1V IOUT = 20A, fSW = 400kHz ZL6105-1CH-DEMO1Z VIN = 12V, VOUT = 1V IOUT = 20A, fSW = 400kHz VOUT tON_DELAY 5ms ENABLE tON_DELAY ENABLE 5ms tOFF 5ms TYPICAL RAMP ARTIFACT VOUT FIGURE 11. TYPICAL TURN-OFF RAMP, tFALL = 5ms, tOFF_DELAY = 5ms FIGURE 10. TYPICAL TURN-ON RAMP, TRISE = 5ms, tON_DELAY = 5ms ZL6105-1CH-DEMO1Z MEASURED ACROSS C21 VIN = 12V, VOUT = 1V IOUT = 20A, fSW =400kHz ZL6105-1CH-DEMO1Z TYPICAL STATIC VOUT RIPPLE PROFILE VIN = 12V, VOUT = 1V IOUT = 20A, fSW = 400kHz 100 mV VOUT = 1V STATIC RIPPLE = 8mV INDUCTIVE LOAD CABLE ARTIFACT FIGURE 12. TRANSIENT RESPONSE 5 TO 15A, 5A/µ Submit Document Feedback 9 FIGURE 13. STATIC RIPPLE UG014.0 December 18, 2014 User Guide 014 ZL6105 PCB Layout Guidelines Device Ground Pins - SGND is the analog reference for VDD, VR, V25, XTEMP and the pin straps. Very little current passes through this path normally. - DGND is the high current digital GND return path for the controller. It is isolated internally from SGND to avoid noise coupling. - PGND is the high current GND return for the MOSFET drivers and the bootstrap circuit. It is isolated internally from SGND to avoid noise coupling. ZL6105 Voltage, Current and Temperature Sense Connections • Ensure that the current sense signals are routed differentially and that the averaging circuit is Kelvin connected to the sensing element for most accurate current sense. • Ensure that the voltage sense signals are routed differentially and are Kelvin connected to the final capacitor away from the inductor for best noise performance. • Ensure that the XTEMP and SGND traces are routed differentially to the temperature sensing transistor. Ground Pin Usage - The pins are isolated within the device only to avoid noise coupling through the package and bond wires. They should be tied together on the PCB with a very low impedance connection for best operation. If the DGND pin is not closely coupled to SGND, the SGND pin will become a current path for digital circuits and will get noisy. Device Power Supply Pins - VDD is the input supply pin. It provides power to the internal VR regulator. - VR is the internal 5V regulator used to power the MOSFET drivers and the V25 regulator. - V25 is the internal 2.5V regulator used to power the digital circuits. Power Supply Pin Usage - VDD, VR and V25 are all referenced to SGND and all need to have capacitors placed closely to the pins. Submit Document Feedback 10 UG014.0 December 18, 2014 User Guide 014 Top Layer ZL6105-1CH-DEMO1Z Board Layout - 6 Layers VOUT TIGHT SWITCHING LOOP PGND PIN TO COMMON GND PLANE DIRECTLY AT LS FET MANY GND VIAS FOR GOOD ELECTRICAL AND THERMAL PERFORMANCE VDD CAPACITOR TO COMMON GND PLANE COMMON GND PLANE ON ALL LAYERS DGND PIN TIED TO COMMON GND PLANE ON ALL LAYERS WITH A VIA ALL PIN STRAPS CLOSE TO DEVICE AND TIED TO INTERNAL SGND PLANE VIN 7 Inner layer 1 FIGURE 14. PCB TOP LAYER VOUT GND COMPLETE GND PLANE THROUGHOUT THIS LAYER PROVIDES A REFERENCE FOR ROUTED LAYERS ISOLATED SGND PLANE IS RECONNECTED TO GND DIRECTLY UNDER PGND PIN SGND PLANE GND FIGURE 15. INNER LAYER 1 8 Submit Document Feedback 11 UG014.0 December 18, 2014 User Guide 014 Inner Layer 2 Board Layout - 6 Layers ZL6105-1CH-DEMO1Z VOUT VSENSE LINES ARE ROUTED GND DIFFERENTIALLY TO THE FINAL OUTPUT CAPACITOR SGND PLANE IS ISOLATED THROUGH ALL LAYERS EXCEPT 1 GND Inner Layer 3 FIGURE 16. INNER LAYER 2 9 VOUT GND VOUT SHAPE REPLICATED FOR LOWER LOSS SGND PLANE REMAINS ISOATED VIN SHAPE REPLICATED FOR LOWER LOSS VIN GND FIGURE 17. INNER LAYER 3 10 Submit Document Feedback 12 UG014.0 December 18, 2014 User Guide 014 ZL6105-1CH-DEMO1Z Inner Layer 4 Board Layout - 6 Layers VOUT GND REPLICATION OF INNER LAYER 3 FOR LOWER LOSS VIN Bottom Layer 11 GND FIGURE 18. INNER LAYER 4 VOUT GND ISENSE LINES ARE ROUTED DIFFERENTIALLY AND KELVIN CONNECTED TO THE INDUCTOR V25 CAPACITOR CLOSE TO THE DEVICE AND TIED TO SGND PLANE VR CAPACITOR CLOSE TO THE DEVICE AND TIED TO SGND PLANE NEAR THE SGND/GND RECONNECTION POINT VIN FIGURE 19. BOTTOM LAYER 12 Submit Document Feedback GND 13 UG014.0 December 18, 2014 User Guide 014 Default Configuration Settings The following configuration file is loaded into the ZL6105 on the ZL6105-1CH-DEMO1Z in the Default Store. The # symbol is used to denote comments. Anything following the # symbol is ignored. PMBus COMMAND VALUE NOTES ON_OFF_CONFIG 0x17 #Pin Enable, immediate off MFR_ID Intersil MFR_MODEL ZL6105-1CH-DEMO1Z MFR_LOCATION Austin, TX MFR_REVISION Rev 1.0 VOUT_COMMAND 1 #V VOUT_UV_FAULT_RESPONSE 0x80 #Immediate shutdown OVUV_CONFIG 0x00 #Disabled IOUT_CAL_GAIN 0.84 #mΩ IOUT_OC_FAULT_LIMIT 50 #A IOUT_AVG_OC_FAULT_LIMIT 50 #A IOUT_UC_FAULT_LIMIT -30 #A IOUT_AVG_UC_FAULT_LIMIT -30 #A FREQUENCY_SWITCH 400 #kHz DEADTIME 0x2020 #32ns DEADTIME_CONFIG 0x0606 #2ns Min, Dynamic DEADTIME_MAX 0x2020 #32,56ns Max INDUCTOR 0.47 #µH MFR_CONFIG 0x8412 USER_CONFIG 0x0011 TEMPCO_CONFIG 0x28 MISC_CONFIG 0x2000 AUTO_COMP_CONFIG 0x79 #Enabled, 80% Gain STORE_DEFAULT_ALL RESTORE_DEFAULT_ALL RESTORE_USER_ALL Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that the Application Note or Technical Brief is current before proceeding. For information regarding Intersil Corporation and its products, see www.intersil.com Submit Document Feedback 14 UG014.0 December 18, 2014