40V, Low Quiescent Current, 150mA Linear Regulator for Automotive Applications ISL78301 Features The ISL78301 is a high voltage, low quiescent current linear regulator ideally suited for “always-on” and “keep alive” automotive applications. The ISL78301 operates from an input voltage of +6V to +40V under normal operating conditions and operates down to +3V under a cold crank. It consumes only 18µA of quiescent current at no load on the adjustable version. • Optimized for “Always-on” Automotive Applications The ISL78301 is available in a fixed 3.3V, 5V and adjustable output voltage (2.5V to 12V) options. It features an EN pin that can be used to put the device into a low-quiescent current shutdown mode where it draws only 2µA of supply current. The device features over-temperature shutdown and current limit protection. • 2µA of Typical Shutdown Current The ISL78301 is both AEC-Q100 qualified and fully TS16949 compliant. It is rated over the -40°C to +125°C automotive temperature range and is available in a 14 Ld HTSSOP with an exposed pad package. Applications • 18µA Typical Quiescent Current • Guaranteed 150mA Output Current • Operates Through Cold Crank Down to 3V • 40V Tolerant Logic Level (TTL/CMOS) Enable Input • Low Dropout Voltage of 295mV at 150mA • Fixed +3.3V, +5.0V and Adjustable Output Voltage Options • Stable Operation with 10µF Output Capacitor • Thermal Shutdown and Current Limit Protection • -40°C to +125°C Operating Temperature Range • Thermally Enhanced 14 Ld Exposed Pad HTSSOP Package • AEC-Q100 Qualified • 5kV ESD HBM Rated • Pb-Free (RoHS Compliant) • Automotive • Industrial • Telecommunications VIN = 14V OUT IN CIN 0.1µF R1 EN (ISL78301) VIN = 14V VOUT = 12V OUT IN COUT 10µF VOUT = 5V COUT 10µF CIN 0.1µF ADJ EN (ISL78301) R2 GND GND FIGURE 2. TYPICAL APPLICATION - FIXED VERSION FIGURE 1. TYPICAL APPLICATION - ADJ VERSION QUIESCENT CURRENT (µA) 25 20 15 10 5 0 -50 0 50 TEMPERATURE (°C) 100 150 FIGURE 3. QUIESCENT CURRENT vs LOAD CURRENT (ADJ VERSION AT UNITY GAIN) VIN = 14V October 21, 2011 FN6705.0 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas Inc. 2011. All Rights Reserved Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries. All other trademarks mentioned are the property of their respective owners. ISL78301 Block Diagram VIN EN CONTROL LOGIC + EA THERMAL SENSOR FET DRIVER WITH CURRENT LIMIT VOUT REFERENCE + SOFT-START ADJ GND Pin Configuration ISL78301 (14 LD HTSSOP) TOP VIEW NC 1 14 OUT IN 2 13 NC NC 3 NC 4 12 ADJ/NC THERMAL PAD 11 NC NC 5 10 NC NC 6 9 NC EN 7 8 GND Pin Descriptions PIN NUMBER PIN NAME 1, 3, 4, 5, 6, 9, 10, 11, 13 NC DESCRIPTION Pins have internal termination and can be left unconnected. Connection to ground is optional. 2 IN Input voltage pin. A minimum 0.1µF ceramic capacitor is required for proper operation. 7 EN Enable pin. High on this pin enables the device. 8 GND 12 ADJ/NC 14 OUT Ground pin. In the adjustable output voltage option, this pin is connected to the external feedback resistor divider which sets the LDO output voltage. In the 3.3V and 5V options, this pin is not used and can be connected to ground. Regulated output voltage. A 10µF ceramic capacitor is required for stability. EPAD It is recommended to solder the EPAD to the ground plane. 2 FN6705.0 October 21, 2011 ISL78301 Ordering Information PART NUMBER (Notes 1, 2, 3) PART MARKING TEMP. RANGE (°C) ENABLE PIN OUTPUT VOLTAGE (V) PACKAGE (Pb-Free) PKG. DWG. # 3.3 14 Ld HTSSOP M14.173B ISL78301FVEAZ 78301 FVEAZ -40 to +125 Yes ISL78301FVEBZ 78301 FVEBZ -40 to +125 Yes 5.0 14 Ld HTSSOP M14.173B ISL78301FVECZ 78301 FVECZ -40 to +125 Yes ADJ 14 Ld HTSSOP M14.173B NOTES: 1. Add “-T*” suffix for tape and reel. Please refer to TB347 for details on reel specifications. 2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 3. For Moisture Sensitivity Level (MSL), please see device information page for ISL78301. For more information on MSL please see techbrief TB363. 3 FN6705.0 October 21, 2011 ISL78301 Absolute Maximum Ratings Thermal Information Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +45V IN pin to GND Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND - 0.3V to VCC OUT pin to GND Voltage . . . . . . . . . . . . . . . . . . . . . . . . .. . .GND - 0.3V to 16V ADJ pin to GND Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . .GND - 0.3V to 3V EN pin to GND Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND - 0.3V to VCC Output Short-circuit Duration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Indefinite ESD Rating Human Body Model (Tested per JESD22-A114E) . . . . . . . . . . . . . . . . 5kV Machine Model (Tested per JESD-A115-A) . . . . . . . . . . . . . . . . . . . 200V Charge Device Model (Tested per JESD22-C101C). . . . . . . . . . . . . 2.2kV Latch Up (Tested per JESD78B; Class II, Level A) . . . . . . . . . . . . . . . 100mA Thermal Resistance (Typical) θJA (°C/W) θJC (°C/W) 14 Ld HTSSOP Package (Notes 4, 5). . . . . . 37 5 Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . +150°C Maximum Storage Temperature Range . . . . . . . . . . . . . .-65°C to +175°C Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp Recommended Operating Conditions Ambient Temperature Range . . . . . . . . . . . . . . . . . . . . . . -40°C to +125°C IN pin to GND Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+3V to +40V OUT pin to GND Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+2.5V to +12V EN pin to GND Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0V to +40V CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. NOTES: 4. θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details. 5. For θJC, the “case temp” location is the center of the exposed metal pad on the package underside. Electrical Specifications Recommended Operating Conditions, unless otherwise noted. VIN = 14V, IOUT = 1mA, CIN = 0.1μF, COUT = 10μF, TA = TJ = -40°C to +125°C, unless otherwise noted. Typical specifications are at TA = +25°C. Boldface limits apply over the operating temperature range, -40°C to +125°C. PARAMETER Input Voltage Range SYMBOL TEST CONDITIONS VIN Cold Crank condition Guaranteed Output Current IOUT VIN = VOUT + VDO Output Voltage VOUT EN = High VIN = 14V IOUT = 0.1mA to 150mA Line Regulation ΔVOUT/ΔVIN Load Regulation ΔVOUT/ΔIOUT VIN = VOUT +VDO IOUT = 100µA to 150mA Dropout Voltage (Note 6) ΔVDO EN = High VIN = 14V 4 V 40 V mA 3.333 V 5V Version 4.950 5 5.050 V ADJ pin voltage 1.211 1.223 1.235 V 0.04 0.15 % 0.3 0.6 % 7 33 mV 380 525 mV 7 33 mV 295 460 mV 2 3.64 µA IOUT = 0mA, ADJ Version, VOUT = VADJ 18 24 µA IOUT = 1mA, ADJ Version, VOUT = VADJ 22 42 µA IOUT = 10mA, ADJ Version, VOUT = VADJ 34 60 µA IOUT =150mA, ADJ Version, VOUT = VADJ 90 125 µA IOUT = 0, 3.3V and 5.0V Versions 22 28 µA IOUT = 1mA, 3.3V and 5.0V Versions 27 45 µA IOUT = 10mA, 3.3V and 5.0V Versions 39 65 µA IOUT = 150mA, 3.3V and 5.0V Versions 96 142 µA IOUT = 150mA, VOUT = 5V IQ 40 3 3.3 IOUT = 1mA, VOUT = 5V Quiescent Current 6 3.267 IOUT = 150mA, VOUT = 3.3V EN = LOW MAX (Note 8) UNIT 3.3V Version IOUT = 1mA, VOUT = 3.3V ISHDN TYP 150 3V ≤ VIN ≤ 40V IOUT = 1mA Shutdown Current MIN (Note 8) FN6705.0 October 21, 2011 ISL78301 Electrical Specifications Recommended Operating Conditions, unless otherwise noted. VIN = 14V, IOUT = 1mA, CIN = 0.1μF, COUT = 10μF, TA = TJ = -40°C to +125°C, unless otherwise noted. Typical specifications are at TA = +25°C. Boldface limits apply over the operating temperature range, -40°C to +125°C. (Continued) PARAMETER Power Supply Rejection Ratio SYMBOL PSRR TEST CONDITIONS MIN (Note 8) TYP f = 100Hz; VIN_RIPPLE = 500mVP-P; Load = 150mA, 3.3V and 5V Versions 55 f = 100Hz; VIN_RIPPLE = 500mVP-P; Load = 150mA, ADJ Version, VOUT = VADJ 66 MAX (Note 8) UNIT dB EN FUNCTION EN Threshold Voltage VEN_H VOUT = Off to On VEN_L VOUT = On to Off EN Pin Current IEN EN to Regulation Time (Note 7) tEN 1.485 0.975 VOUT = 0V V V 0.026 1.65 µA 1.93 ms PROTECTION FEATURES Output Current Limit ILIMIT VOUT = 0V Thermal Shutdown TSHDN Junction Temperature Rising Thermal Shutdown Hysteresis THYST 175 410 mA +165 °C +20 °C NOTES: 6. Dropout voltage is defined as (VIN - VOUT) when VOUT is 2% below the value of VOUT when VIN = VOUT + 3V. 7. Enable to Regulation is the time the output takes to reach 95% of its final value with VIN = 14V and EN is taken from VIL to VIH in 5ns. For the adjustable versions, the output voltage is set at 5V. 8. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization and are not production tested. 5 FN6705.0 October 21, 2011 ISL78301 Typical Performance Curves VIN = 14V, IOUT = 1mA, VOUT = 5V, TJ = +25°C unless otherwise specified. 120 30 100 +125°C QUIESCENT CURRENT (µA) QUIESCENT CURRENT (µA) +125°C 80 60 -40°C 40 +25°C 20 20 +25°C -40°C 15 10 5 0 0 0 50 100 LOAD CURRENT (mA) 0 150 10 20 INPUT VOLTAGE (V) 30 40 FIGURE 5. QUIESCENT CURRENT vs INPUT VOLTAGE (NO LOAD) FIGURE 4. QUIESCENT CURRENT vs LOAD CURRENT 3.0 0.010 OUTPUT VOLTAGE VARIATION (%) SHUTDOWN CURRENT (µA) 25 2.5 VIN = 40V 2.0 1.5 VIN = 14V 1.0 0.5 0 -50 0 50 TEMPERATURE (°C) 100 150 FIGURE 6. SHUTDOWN CURRENT vs TEMPERATURE (EN = 0) 0.005 5V OPTION 0 3.3V OPTION -0.005 -0.010 -50 0 50 TEMPERATURE (°C) 100 150 FIGURE 7. OUTPUT VOLTAGE vs TEMPERATURE (LOAD = 50mA) 5.20 500mV/DIV OUTPUT VOLTAGE (V) 5.15 EN 5.10 1V/DIV +125°C 5.05 +25°C 5.00 VOUT 4.95 TIME = 500µs/DIV -40°C 4.90 4.85 4.80 0 50 100 LOAD CURRENT (mA) FIGURE 8. OUTPUT VOLTAGE vs LOAD CURRENT 6 150 FIGURE 9. START-UP WAVEFORM FN6705.0 October 21, 2011 ISL78301 Typical Performance Curves VIN = 14V, IOUT = 1mA, VOUT = 5V, TJ = +25°C unless otherwise specified. (Continued) 70 TIME = 5ms/DIV 60 VOUT = 3.3V PSRR (dB) 50 40 VOUT 100mV/DIV VOUT = 5V 30 50mA 20 IOUT 0mA 10 0 100 1k 10k FREQUENCY (Hz) 100k 1M FIGURE 10. POWER SUPPLY REJECTION RATIO (LOAD = 150mA) 7 FIGURE 11. LOAD TRANSIENT RESPONSE FN6705.0 October 21, 2011 ISL78301 Functional Description The output voltage is calculated using Equation 1: Functional Overview The ISL78301 is a high performance, high voltage, low-dropout regulator (LDO) with 150mA sourcing capability. The part is qualified to operate over the -40°C to +125°C automotive temperature range. Featuring ultra-low quiescent current, it makes an ideal choice for “always-on” automotive applications. It works well under a “load dump condition” where the input voltage could rise up to 40V. The LDO continues to operate down to 3V under a “cold-crank” condition. The device also features current limit and thermal shutdown protection. Enable Control The ISL78301 has an enable pin which turns the device on when pulled high. When EN is low, the IC goes into shutdown mode and draws less than 2µA. Current Limit Protection The ISL78301 has internal current limiting functionality to protect the regulator during fault conditions. During current limit, the output sources a fixed amount of current largely independent of the output voltage. If the short or overload is removed from VOUT, the output returns to normal voltage regulation mode. Thermal Fault Protection In the event that the die temperature exceeds a typical value of +165°C, the output of the LDO will shut down until the die temperature cools down to a typical +145°C. The level of power dissipated, combined with the ambient temperature and the thermal impedance of the package, determines if the junction temperature exceeds the thermal shutdown temperature. See the “Power Dissipation” section for more details. Application Information ⎛ R1 ⎞ V OUT = 1.223V × ⎜ ------- + 1⎟ ⎝ R2 ⎠ (EQ. 1) Power Dissipation The junction temperature must not exceed the range specified in “Recommended Operating Conditions” on page 4. The power dissipation can be calculated using Equation 2: P D = ( V IN – V OUT ) × I OUT + V IN × I GND (EQ. 2) The maximum allowable junction temperature, TJ(MAX) and the maximum expected ambient temperature, TA(MAX) will determine the maximum allowable junction temperature rise (ΔTJ), as shown in Equation 3: ΔT J = T J ( MAX ) – T A ( MAX ) (EQ. 3) To calculate the maximum ambient operating temperature, use the junction-to-ambient thermal resistance (θJA) as shown in Equation 4: T J ( MAX ) = P D ( MAX ) x θ JA + T A (EQ. 4) Board Layout Recommendations A good PCB layout is important to achieve expected performance. Consideration should be taken when placing the components and routing the trace to minimize the ground impedance and keep the parasitic inductance low. The input and output capacitors should have a good ground connection and be placed as close to the IC as possible. The feedback trace in the adjustable version should be away from other noisy traces. The 14 Ld HTSSOP package uses the copper area on the PCB as a heat-sink. The EPAD of this package must be soldered to the copper plane (GND plane) for effective heat dissipation. Figure 13 shows a curve for θJA of the package for different copper area sizes. 38 A minimum 0.1µF ceramic capacitor is recommended at the input for proper operation. For the output, a ceramic capacitor with a capacitance of 10µF is recommended for the ISL78301 to maintain stability. The ground connection of the output capacitor should be routed directly to the GND pin of the device and also placed close to the IC. 36 THETA-JA, C/W Input and Output Capacitors 34 32 30 28 26 0 10 20 30 40 50 60 70 80 90 100 110 120 130 140 150 160 Output Voltage Setting EPAD-MOUNT COPPER LAND AREA ON PCB, mm2 For the adjustable version of the ISL78301, the output voltage is programmed using an external resistor divider as shown in Figure 12. FIGURE 13. θJA vs EPAD-MOUNT COPPER LAND AREA ON PCB OUT IN CIN 0.1µF R1 EN (ISL78301) COUT 10µF ADJ R2 GND FIGURE 12. ADJUSTABLE VERSION 8 FN6705.0 October 21, 2011 ISL78301 Revision History The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to web to make sure you have the latest Rev. DATE REVISION 10/21/11 FN6705.0 CHANGE Initial Release. Products Intersil Corporation is a leader in the design and manufacture of high-performance analog semiconductors. The Company's products address some of the industry's fastest growing markets, such as, flat panel displays, cell phones, handheld products, and notebooks. Intersil's product families address power management and analog signal processing functions. Go to www.intersil.com/products for a complete list of Intersil product families. For a complete listing of Applications, Related Documentation and Related Parts, please see the respective device information page on intersil.com: ISL78301 To report errors or suggestions for this datasheet, please go to www.intersil.com/askourstaff FITs are available from our website at http://rel.intersil.com/reports/search.php For additional products, see www.intersil.com/product_tree Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems as noted in the quality certifications found at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 9 FN6705.0 October 21, 2011 ISL78301 Package Outline Drawing M14.173B 14 LEAD HEAT-SINK THIN SHRINK SMALL OUTLINE PACKAGE (HTSSOP) Rev 1, 1/10 A 1 3 3.10 ±0.10 5.00 ±0.10 8 14 SEE DETAIL "X" 6.40 PIN #1 I.D. MARK 4.40 ±0.10 2 3.00 ±0.10 3 0.20 C B A 1 7 B 0.65 EXPOSED THERMAL PAD 0.15 +0.05/-0.06 BOTTOM VIEW END VIEW TOP VIEW 1.00 REF H 0.05 C 1.20 MAX SEATING PLANE 0.25 +0.05/-0.06 0.10 C 0.10 0.90 +0.15/-0.10 GAUGE PLANE 5 0.25 CBA 0°-8° 0.05 MIN 0.15 MAX SIDE VIEW 0.60 ±0.15 DETAIL "X" (3.10) (1.45) NOTES: 1. Dimension does not include mold flash, protrusions or gate burrs. (5.65) (3.00) Mold flash, protrusions or gate burrs shall not exceed 0.15 per side. 2. Dimension does not include interlead flash or protrusion. Interlead flash or protrusion shall not exceed 0.25 per side. 3. Dimensions are measured at datum plane H. 4. Dimensioning and tolerancing per ASME Y14.5M-1994. 5. Dimension does not include dambar protrusion. Allowable protrusion shall be 0.80mm total in excess of dimension at maximum material condition. (0.65 TYP) (0.35 TYP) TYPICAL RECOMMENDED LAND PATTERN Minimum space between protrusion and adjacent lead is 0.07mm. 6. Dimension in ( ) are for reference only. 7. Conforms to JEDEC MO-153, variation ABT-1. 10 FN6705.0 October 21, 2011