DATASHEET

REVISIONS
LTR
DESCRIPTION
A
DATE (YR-MO-DA)
APPROVED
02-07-11
R. Monnin
Drawing updated to reflect current requirements. – gt
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PMIC N/A
PREPARED BY
Rajesh Pithadia
STANDARD
MICROCIRCUIT
DRAWING
THIS DRAWING IS AVAILABLE
FOR USE BY ALL
DEPARTMENTS
AND AGENCIES OF THE
DEPARTMENT OF DEFENSE
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216
http://www.dscc.dla.mil
CHECKED BY
Rajesh Pithadia
APPROVED BY
Raymond Monnin
MICROCIRCUIT, LINEAR, 12-BIT ANALOG-TODIGITAL CONVERTER WITH MICROPROCESSOR
INTERFACE, MONOLITHIC SILICON
DRAWING APPROVAL DATE
99-10-18
AMSC N/A
REVISION LEVEL
A
SIZE
CAGE CODE
A
67268
SHEET
DSCC FORM 2233
APR 97
DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited.
1 OF
5962-99582
23
5962-E393-02
1. SCOPE
1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and
M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the
Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the
PIN.
1.2 PIN. The PIN is as shown in the following example:
5962
-
99582
Federal
stock class
designator
\
RHA
designator
(see 1.2.1)
01
Q
X
X
Device
type
(see 1.2.2)
Device
class
designator
(see 1.2.3)
Case
outline
(see 1.2.4)
Lead
finish
(see 1.2.5)
/
\/
Drawing number
1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and
are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A
specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.
1.2.2 Device type(s). The device type(s) identify the circuit function as follows:
Device type
Generic number
01
Circuit function
774T
12-bit A/D converter with microprocessor
interface
1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as
follows:
Device class
Device requirements documentation
M
Vendor self-certification to the requirements for MIL-STD-883 compliant,
non-JAN class level B microcircuits in accordance with MIL-PRF-38535,
appendix A
Q or V
Certification and qualification to MIL-PRF-38535
1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows:
Outline letter
X
Descriptive designator
CDIP2-T28
Terminals
Package style
28
Dual-in-line
1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535,
appendix A for device class M.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
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APR 97
SIZE
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A
REVISION LEVEL
A
SHEET
2
1.3 Absolute maximum ratings. 1/
VCC to digital common ...............................................................................................
VEE to digital common ...............................................................................................
VLOGIC to digital common ...........................................................................................
Analog common to digital common ...........................................................................
0 V to +16.5 V
0 V to -16.5 V
0 V to +7 V
±1 V
Control inputs (CE, CS , AO, 12/ 8 , R/ C ) to digital common ....................................
Analog inputs (REFIN, BIPOFF, 10 VIN) to analog common .....................................
20 VIN to analog common ..........................................................................................
REFOUT ....................................................................................................................
-0.5 V to VLOGIC +0.5 V
±16.5 V
±24 V
Indefinite short to common,
momentary short to VCC
1.29 W 2/
+275°C
-65°C to 150°C
77°C/W
18°C/W
+175°C
Power dissipation (at TA = 75°C) (PD) .......................................................................
Lead temperature (soldering, 10 seconds) ...............................................................
Storage temperature .................................................................................................
Thermal resistance, junction-to-ambient (θJA) ...........................................................
Thermal resistance, junction-to-case (θJC) ................................................................
Junction temperature (TJ) ..........................................................................................
1.4 Recommended operating conditions.
+VSUPPLY ....................................................................................................................
-VSUPPLY ..................................................................................................................................................................................
VLOGIC ........................................................................................................................
VREF ...........................................................................................................................
Analog input voltage, 10VIN .......................................................................................
Analog input voltage, 20 VIN ......................................................................................
Logic level low (VIL) ...................................................................................................
Logic level high (VIH) .................................................................................................
Ambient operating temperature range (TA) ...............................................................
+15 V
-15 V
+5 V
+10 V
±5 V or 0 to +10 V
3/
0 V to 0.8 V
2.0 V to +5 V
-55°C to 125°C
2. APPLICABLE DOCUMENTS
2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a
part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those listed in
the issue of the Department of Defense Index of Specifications and Standards (DoDISS) and supplement thereto, cited in the
solicitation.
SPECIFICATION
DEPARTMENT OF DEFENSE
MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for.
STANDARDS
DEPARTMENT OF DEFENSE
MIL-STD-883 MIL-STD-1835 -
1/
2/
3/
Test Method Standard Microcircuits.
Interface Standard Electronic Component Case Outlines.
Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the
maximum levels may degrade performance and affect reliability.
Power dissipation derating factor at TA > +75°C is 12.9 mW/°C.
The 20 V input range (pin 14) is functional but performance is not guaranteed. Table I is guaranteed for only the 0 V to
+10 V and ±5 V ranges (pin 13). The 20 V input (pin 14) should be left open. The 20 V input is tied to the 10 V input
through 5 kΩ and will effect circuit operation if connected to any potential.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
DSCC FORM 2234
APR 97
SIZE
5962-99582
A
REVISION LEVEL
A
SHEET
3
HANDBOOKS
DEPARTMENT OF DEFENSE
MIL-HDBK-103 MIL-HDBK-780 -
List of Standard Microcircuit Drawings.
Standard Microcircuit Drawings.
(Unless otherwise indicated, copies of the specification, standards, and handbooks are available from the Standardization
Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.)
2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text
of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a
specific exemption has been obtained.
3. REQUIREMENTS
3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with
MIL-PRF-38535 and as specified herein or as modified in the device manufacturer's Quality Management (QM) plan. The
modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for
device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified
herein.
3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified
in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M.
3.2.1 Case outline. The case outline shall be in accordance with 1.2.4 herein.
3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1.
3.2.3 Truth table. The truth table shall be as specified on figure 2.
3.2.4 Block diagram. The block diagram shall be as specified on figure 3.
3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the
electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full
ambient operating temperature range.
3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical
tests for each subgroup are defined in table I.
3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer's PIN may also be
marked as listed in MIL-HDBK-103. For packages where marking of the entire SMD PIN number is not feasible due to space
limitations, the manufacturer has the option of not marking the "5962-" on the device. For RHA product using this option, the
RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535.
Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A.
3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a "QML" or "Q" as required in
MIL-PRF-38535. The compliance mark for device class M shall be a "C" as required in MIL-PRF-38535, appendix A.
3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535
listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of
compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see
6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this
drawing shall affirm that the manufacturer's product meets, for device classes Q and V, the requirements of MIL-PRF-38535
and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein.
3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in
MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered
to this drawing.
3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2
herein) involving devices acquired to this drawing is required for any change as defined in MIL-PRF-38535, appendix A.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
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DSCC FORM 2234
APR 97
SIZE
5962-99582
A
REVISION LEVEL
A
SHEET
4
TABLE I. Electrical performance characteristics.
Test
Bipolar input voltage range
2/
Unipolar input voltage
range
2/
Input voltage
Symbol
Conditions 1/
-55°C ≤ TA ≤ +125°C
unless otherwise specified
Group A
subgroups
Device
type
1, 2, 3
01
VIN
VIN
1, 2, 3
VIH
Logic “1”
1, 2, 3
VIL
Logic “0”
1, 2, 3
01
01
Limits
Unit
Min
-5
Max
+5
-10
+10
0
+10
0
+20
V
V
+2.0
V
(CE, CS , R/ C , AO, 12/ 8 )
Power supply current from
VCC
Power supply current from
VEE
+0.8
ICC
1, 2, 3
01
15
mA
IEE
1
01
28
mA
01
15
2, 3
Power supply current from
VLOGIC
ILOG
Power dissipation 2/ 3/
PD
30
1
2, 3
Calculated worst case of 2
conditions
17
1
01
720
2, 3
Input low current
IIL
VLOGIC = 5.5 V,
VIN(LOGIC) = 0.0 V
mA
mW
760
1, 2, 3
01
-5
µA
5
See footnotes at end of table.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
DSCC FORM 2234
APR 97
SIZE
5962-99582
A
REVISION LEVEL
A
SHEET
5
TABLE I. Electrical performance characteristics - Continued.
Test
Input high current
High impedance state
output current
Symbol
IIH
IZL
Conditions 1/
-55°C ≤ TA ≤ +125°C
unless otherwise specified
Group A
subgroups
Device
type
Limits
Unit
VLOGIC = 5.5 V,
VIN(LOGIC) = 2.0 V
1, 2, 3
01
Min
-5
5
VIN(LOGIC) = 5.5 V
1, 2, 3
01
-5
5
VLOGIC = 5.5 V,
VIN = 11.0 V min,
Output code =
111111111111,
1, 2, 3
01
-5
5
µA
1, 2, 3
01
-5
5
µA
0.5
V
Max
µA
Set R/ C = Logic “0”
Output bits 1 thru 12
measured separately,
VOUT = 0.0 V all bits
High impedance state
output current
IZH
VLOGIC = 5.5 V,
VIN = -1.0 V max,
Output code =
000000000000,
Set R/ C = Logic “0”
Output bits 1 thru 12
measured separately,
VOUT = 5.5 V all bits
Output logic voltage levels
Reference voltage
VOL
VLOGIC = 4.5 V,
Output code =
000000000000,
Measure output bits 1 thru
12 & STS,
IL = 1.6 mA
1, 2, 3
01
VOH
VLOGIC = 4.5 V,
Output code =
111111111111,
Measure bits 1 thru 12,
IL = -0.5 mA
1, 2, 3
01
2.4
VREF
Output code =
000000000000,
Bipolar VFSR = 20 V,
IL = 2.0 mA
1
01
9.970
10.030
9.950
10.050
2,3
V
V
See footnotes at end of table.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
DSCC FORM 2234
APR 97
SIZE
5962-99582
A
REVISION LEVEL
A
SHEET
6
TABLE I. Electrical performance characteristics - Continued.
Test
Symbol
Conditions 1/
-55°C ≤ TA ≤ +125°C
unless otherwise specified
Group A
subgroups
Device
type
Limits
Unit
1
01
Min
-1
-1.5
1.5
1
01
-1
1
LSB
Max
+PSS1
13.5 V ≤ VCC ≤ 16.5 V,
Output transition =
11111111111X 00000000000X
4/
+PSS2
11.4 V ≤ VCC ≤ 12.6 V,
Output transition =
11111111111X 00000000000X
4/
Power supply sensitivity to
VLOGIC
+PSS3
4.5 V ≤ VLOGIC ≤ 5.5 V,
Output transition =
11111111111X 00000000000X
4/
1, 2, 3
01
-0.5
0.5
LSB
Power supply sensitivity to
VEE
-PSS1
-16.5 V ≤ VEE ≤ -13.5 V,
Output transition =
11111111111X 00000000000X
4/
1
01
-1
1
LSB
-2
2
Power supply sensitivity to
VCC
2, 3
2, 3
Unipolar offset voltage
-12.6 V ≤ VEE ≤ -11.4 V,
Output transition =
11111111111X 00000000000X
4/
1
01
-1
1
LSB
VIO
Output transition =
00000000000X
1
01
-2
2
LSB
-3
3
01
-4
4
-6
6
-0.3
0.3
2, 3
-0.55
0.55
1
-0.3
0.3
BZ
4/
Output transition =
XXXXXXXXXXXX,
bipolar, VFSR = 20 V
1
AE
1
Output transition =
00000000000X to
11111111111X
4/
BPAE
Bipolar, VFSR = 20 V
4/
LE
Abbreviated test,
01
2, 3
Integral linearity error
Differential linearity error
DLE
LSB
4/
2, 3
Gain error
LSB
-PSS2
2, 3
Bipolar zero
1
1
01
Bipolar mode 20 V range
4/
2, 3
Abbreviated test,
Bipolar mode 20 V range
4/
1, 2, 3
01
% of
FSR
% of
FSR
-0.55
0.55
-1/2
1/2
-1
1
-1
1
LSB
LSB
See footnotes at end of table.
STANDARD
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COLUMBUS, OHIO 43216-5000
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REVISION LEVEL
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SHEET
7
TABLE I. Electrical performance characteristics - Continued.
Test
Symbol
Input resistance
RIN10V
Conditions 1/
-55°C ≤ TA ≤ +125°C
unless otherwise specified
Group A
subgroups
Device
type
1
01
10 V span input
2, 3
RIN20V
20 V span input
dVIO/dT
Output transition =
00000000000X
1
2, 3
Unipolar offset voltage drift
Limits
Unit
Min
3.75
Max
6.25
3
7
7.50
12.50
kΩ
kΩ
6
14
2, 3
01
-1
1
LSB
4/
Bipolar zero drift
dBZ/dT
Output transition =
XXXXXXXXXXXX,
bipolar, VFSR = 20 V
4/
2, 3
01
-2
2
LSB
Gain error drift
dAE/dT
Output transition =
00000000000X to
11111111111X
4/
2, 3
01
-10
10
LSB
dBPAE
dT
Bipolar, VFSR = 20 V
2, 3
01
-10
10
LSB
7, 8
01
VIN = -1 V max.
Output code =
000000000000,
8 bit cycle
9, 10, 11
01
8.5
µs
VIN = 11 V max.
Output code =
111111111111,
12 bit cycle
9, 10, 11
11
µs
200
ns
Functional tests
Conversion time
4/
See 4.4.1c
5/
STS delay from R/ C
tC
2/ 5/
tDS
Low to high transition,
referenced to high to low
9
01
9
01
R/ C transition.
Output code =
000000000000
tHRL
Low R/ C pulse width
2/ 5/
Minimum R/ C pulse width
required to start a
conversion
50
ns
See footnotes at end of table.
STANDARD
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REVISION LEVEL
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SHEET
8
TABLE I. Electrical performance characteristics - Continued.
Test
Symbol
Data valid after R/ C low
2/ 5/
tHDR
Conditions 1/
-55°C ≤ TA ≤ +125°C
unless otherwise specified
Group A
subgroups
Device
type
9
01
Output data valid,
referenced to high to low
Limits
Min
25
Unit
Max
ns
R/ C transition,
Output code =
000000000000 &
111111111111
STS delay after data valid
2/ 5/
tHS
STS high to low,
transition referenced to
valid output data,
Output code =
000000000000 &
111111111111
9
01
High R/ C pulse width
2/ 5/
tHRH
Minimum R/ C pulse width
required to enable output
bits,
Output code =
000000000000 &
111111111111
9
01
Data access time
tDDR
Output data valid,
referenced to low to high
9
01
150
ns
9
01
200
ns
2/ 5/
300
ns
150
ns
R/ C transition,
Output code =
000000000000 &
111111111111
STS delay from CE
tDSC
2/ 5/
Low to high transition,
referenced to low to high
CE transition,
Output code =
000000000000
See footnotes at end of table.
STANDARD
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COLUMBUS, OHIO 43216-5000
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REVISION LEVEL
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SHEET
9
TABLE I. Electrical performance characteristics - Continued.
Test
Symbol
Conditions 1/
-55°C ≤ TA ≤ +125°C
unless otherwise specified
Group A
subgroups
Device
type
Limits
Unit
CE pulse width
2/ 5/
tHEC
Minimum CE pulse width
required to start a
conversion
9
01
Min
50
Max
CS to CE setup
2/ 5/
tSSC
Minimum time required
9
01
50
ns
9
01
50
ns
9
01
50
ns
9
01
50
ns
ns
from a high to low CS .
Transition to low to high
CE transition for a
conversion to start from CE
CS low during CE high
2/ 5/
tHSC
Minimum time required
from a low to high CE.
Transition to low to high
CS transition for a
conversion to start
R/ C to CE set up
2/ 5/
tSRC
Minimum time required
from a high to low R/ C .
Transition to low to high
CE transition for a
conversion to start from CE
R/ C low during CE high
2/ 5/
tHRC
Minimum time required
from a low to high CE.
Transition to low to high
R/ C transition for a
conversion to start
tSAC
Minimum time required
from a low to high or high
to low A0 . Transition to
low to high CE. Transition
to initiate an 8-bit or 12-bit
conversion, respectively
9
01
0
ns
A0 valid during CE high
2/ 5/
tHAC
Minimum time required
from a low to high CE.
Transition to low to high or
high to low A0 transition to
guarantee a 12-bit or 8-bit
conversion, respectively
9
01
50
ns
Access time from CE
2/ 5/
tDD
Output data valid,
referenced to low to high
CE transition,
Output code =
000000000000 &
111111111111
9
01
A0 to CE set up
2/ 5/
150
ns
See footnotes at end of table.
STANDARD
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COLUMBUS, OHIO 43216-5000
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REVISION LEVEL
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SHEET
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TABLE I. Electrical performance characteristics - Continued.
Test
Symbol
Conditions 1/
-55°C ≤ TA ≤ +125°C
unless otherwise specified
Group A
subgroups
Device
type
Limits
Min
25
Unit
Max
Data valid after CE low
2/ 5/
tHD
Output data valid,
referenced to high to low
CE transition,
Output code =
000000000000 &
111111111111
9
01
Output float delay
2/ 5/
tHL
Output delay to HI-Z,
referenced to high to low
CE transition,
Output code =
000000000000 &
111111111111
9
01
CS to CE setup
2/ 5/
tSSR
Minimum time from CS
high to low transition to CE
low to high transition to
guarantee data valid is
controlled by CE,
Output code =
000000000000 &
111111111111
9
01
50
ns
R/ C to CE setup
2/ 5/
tSRR
Minimum time from R/ C
low to high transition to CE
low to high transition to
guarantee data valid is
controlled by CE,
Output code =
000000000000 &
111111111111
9
01
0
ns
tSAR
Minimum time from A0 high
to low or low to high
transition to CE low to high
transition to guarantee the
correct byte gets enabled.
9
01
50
ns
tHSR
Minimum time from CE
high to low transition to
9
01
0
ns
9
01
0
ns
A0 to CE setup
2/ 5/
CS valid after CE low
2/ 5/
ns
150
ns
CS low to high transition
to guarantee high
impedance state is
controlled by CE.
R/ C high after CE low
2/ 5/
tHRR
Minimum time from CE
high to low transition to
R/ C high to low transition
to guarantee device will
disable before another
conversion is initiated.
See footnotes at end of table.
STANDARD
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REVISION LEVEL
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TABLE I. Electrical performance characteristics - Continued.
Test
A0 valid after CE low
Symbol
2/ 5/
tHAR
Conditions 1/
-55°C ≤ TA ≤ +125°C
unless otherwise specified
Group A
subgroups
Device
type
9
01
Minimum time from CE
high to low transition to A0
high to low or low to high
transition to guarantee
enabled byte does not
change until device is
disabled.
Limits
Min
50
Unit
Max
ns
1/ VCC = +15 V, VEE = -15 V, VLOGIC = 5.0 V, 10 V input range only.
2/ If not tested, shall be guaranteed to the limits specified in table I herein.
3/ PD = (VCC X ICC + VEE X IEE + VLOGIC X ILOGIC). Power dissipation shall be calculated using the two output code conditions
0000 0000 0000 and 1111 1111 1111.
4/ X represents the transition point between adjacent code words.
5/ See figure 4.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
DSCC FORM 2234
APR 97
SIZE
5962-99582
A
REVISION LEVEL
A
SHEET
12
Device type
Case outline
Terminal number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
01
X
Terminal symbol
VLOGIC
12/ 8
CS
AO
R/C
CE
VCC
REF OUT
AC
REF IN
VEE
BIP OFF
10 V INPUT
20 V INPUT
DC
DB0(LSB)
DB1
DB2
DB3
DB4
DB5
DB6
DB7
DB8
DB9
DB10
DB11(MSB)
STS
FIGURE 1. Terminal connections.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
DSCC FORM 2234
APR 97
SIZE
5962-99582
A
REVISION LEVEL
A
SHEET
13
CE
CS
X
1
0
0
↓
↓
0
0
0
0
0
0
X
↑
↑
1
1
1
1
1
1
1
R/ C
X
X
0
0
0
0
↓
↓
1
1
1
12/ 8
X
X
X
X
X
X
X
X
1
0
0
AO
X
X
0
1
0
1
0
1
X
0
1
OPERATION
None
None
Initiate 12-bit conversion
Initiate 8-bit conversion
Initiate 12-bit conversion
Initiate 8-bit conversion
Initiate 12-bit conversion
Initiate 8-bit conversion
Enable 12-bit output
Enable 8 MSBs only
Enable 4 LSBs plus 4 trailing zeroes
FIGURE 2. Truth table.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
DSCC FORM 2234
APR 97
SIZE
5962-99582
A
REVISION LEVEL
A
SHEET
14
FIGURE 3. Block diagram.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
DSCC FORM 2234
APR 97
SIZE
5962-99582
A
REVISION LEVEL
A
SHEET
15
CONVERT START TIMING
FIGURE 4. Timing waveforms.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
DSCC FORM 2234
APR 97
SIZE
5962-99582
A
REVISION LEVEL
A
SHEET
16
READ CYCLE TIMING
FIGURE 4. Timing waveforms - Continued.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
DSCC FORM 2234
APR 97
SIZE
5962-99582
A
REVISION LEVEL
A
SHEET
17
LOW PULSE FOR R/ C - OUTPUTS ENABLED AFTER CONVERSION
FIGURE 4. Timing waveforms - Continued.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
DSCC FORM 2234
APR 97
SIZE
5962-99582
A
REVISION LEVEL
A
SHEET
18
HIGH PULSE FOR R/ C - OUTPUTS ENABLED WHILE R/ C HIGH, OTHERWISE HIGH-Z
FIGURE 4. Timing waveforms - Continued.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
DSCC FORM 2234
APR 97
SIZE
5962-99582
A
REVISION LEVEL
A
SHEET
19
3.9 Verification and review for device class M. For device class M, DSCC, DSCC's agent, and the acquiring activity retain
the option to review the manufacturer's facility and applicable required documentation. Offshore documentation shall be made
available onshore at the option of the reviewer.
3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit
group number 93 (see MIL-PRF-38535, appendix A).
4. QUALITY ASSURANCE PROVISIONS
4.1 Sampling and inspection. For device classes Q and V, sampling and inspection procedures shall be in accordance with
MIL-PRF-38535 or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan
shall not affect the form, fit, or function as described herein. For device class M, sampling and inspection procedures shall be
in accordance with MIL-PRF-38535, appendix A.
4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and shall be conducted
on all devices prior to qualification and technology conformance inspection. For device class M, screening shall be in
accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection.
4.2.1 Additional criteria for device class M.
a.
Burn-in test, method 1015 of MIL-STD-883.
(1) Test condition A, B, C or D. The test circuit shall be maintained by the manufacturer under document revision
level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall
specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in
test method 1015.
(2) TA = +125°C, minimum.
b.
Interim and final electrical test parameters shall be as specified in table II herein.
4.2.2 Additional criteria for device classes Q and V.
a.
The burn-in test duration, test condition and test temperature, or approved alternatives shall be as specified in the
device manufacturer's QM plan in accordance with MIL-PRF-38535. The burn-in test circuit shall be maintained under
document revision level control of the device manufacturer's Technology Review Board (TRB) in accordance with
MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall
specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test
method 1015 of MIL-STD-883.
b.
Interim and final electrical test parameters shall be as specified in table II herein.
c.
Additional screening for device class V beyond the requirements of device class Q shall be as specified in
MIL-PRF-38535, appendix B or as modified in the device manufacturer’s quality management (QM) plan.
4.3 Qualification inspection for device classes Q and V. Qualification inspection for device classes Q and V shall be in
accordance with MIL-PRF-38535. Inspections to be performed shall be those specified in MIL-PRF-38535 and herein for
groups A, B, C, D, and E inspections (see 4.4.1 through 4.4.4).
4.4 Conformance inspection. Technology conformance inspection for classes Q and V shall be in accordance with
MIL-PRF-38535 including groups A, B, C, D, and E inspections and as specified herein. Quality conformance inspection for
device class M shall be in accordance with MIL-PRF-38535, appendix A and as specified herein. Inspections to be performed
for device class M shall be those specified in method 5005 of MIL-STD-883 and herein for groups A, B, C, D, and E inspections
(see 4.4.1 through 4.4.4).
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
DSCC FORM 2234
APR 97
SIZE
5962-99582
A
REVISION LEVEL
A
SHEET
20
TABLE II. Electrical test requirements.
Test requirements
Subgroups
(in accordance with
MIL-PRF-38535, table III)
Subgroups
(in accordance with
MIL-STD-883,
method 5005, table I)
Device
class M
Device
class Q
Device
class V
Interim electrical
parameters (see 4.2)
1
Final electrical
parameters (see 4.2)
1,2,3,7,8,
9,10,11
Group A test
requirements (see 4.4)
1,2,3,7,8,
9,10,11
1,2,3,7,8,
9,10,11
1,2,3,7,8,
9,10,11
Group C end-point electrical
parameters (see 4.4)
1
1
1,2,3,7,8,
9,10,11
Group D end-point electrical
parameters (see 4.4)
1
1
1
Group E end-point electrical
parameters (see 4.4)
1
1/
1
1,2,3,7,8,
9,10,11
----
1/
1,2,3,7,8,
9,10,11
----
2/
----
1/ PDA applies to subgroup 1.
2/ PDA applies to subgroups 1 and 7.
4.4.1 Group A inspection.
a.
Tests shall be as specified in table II herein.
b.
Subgroups 4, 5 and 6 in table I, method 5005 of MIL-STD-883 shall be omitted.
c.
For device class M, subgroups 7 and 8 tests shall be sufficient to verify the truth table. For device classes Q and V,
subgroups 7 and 8 shall include verifying the functionality of the device.
4.4.2 Group C inspection. The group C inspection end-point electrical parameters shall be as specified in table II herein.
4.4.2.1 Additional criteria for device class M. Steady-state life test conditions, method 1005 of MIL-STD-883:
a.
Test condition A, B, C or D. The test circuit shall be maintained by the manufacturer under document revision level
control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify
the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method
1005 of MIL-STD-883.
b.
TA = +125°C, minimum.
c.
Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883.
4.4.2.2 Additional criteria for device classes Q and V. The steady-state life test duration, test condition and test temperature,
or approved alternatives shall be as specified in the device manufacturer's QM plan in accordance with MIL-PRF-38535. The
test circuit shall be maintained under document revision level control by the device manufacturer's TRB in accordance with
MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify
the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1005 of
MIL-STD-883.
4.4.3 Group D inspection. The group D inspection end-point electrical parameters shall be as specified in table II herein.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
DSCC FORM 2234
APR 97
SIZE
5962-99582
A
REVISION LEVEL
A
SHEET
21
4.4.4 Group E inspection. Group E inspection is required only for parts intended to be marked as radiation hardness
assured (see 3.5 herein).
a.
End-point electrical parameters shall be as specified in table II herein.
b.
For device classes Q and V, the devices or test vehicle shall be subjected to radiation hardness assured tests as
specified in MIL-PRF-38535 for the RHA level being tested. For device class M, the devices shall be subjected to
radiation hardness assured tests as specified in MIL-PRF-38535, appendix A for the RHA level being tested. All
device classes must meet the postirradiation end-point electrical parameter limits as defined in table I at
TA = +25°C ±5°C, after exposure, to the subgroups specified in table II herein.
c.
When specified in the purchase order or contract, a copy of the RHA delta limits shall be supplied.
5. PACKAGING
5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-PRF-38535 for device
classes Q and V or MIL-PRF-38535, appendix A for device class M.
6. NOTES
6.1 Intended use. Microcircuits conforming to this drawing are intended for use for Government microcircuit applications
(original equipment), design applications, and logistics purposes.
6.1.1 Replaceability. Microcircuits covered by this drawing will replace the same generic device covered by a contractor
prepared specification or drawing.
6.1.2 Substitutability. Device class Q devices will replace device class M devices.
6.2 Configuration control of SMD's. All proposed changes to existing SMD's will be coordinated with the users of record for
the individual documents. This coordination will be accomplished using DD Form 1692, Engineering Change Proposal.
6.3 Record of users. Military and industrial users should inform Defense Supply Center Columbus when a system
application requires configuration control and which SMD's are applicable to that system. DSCC will maintain a record of users
and this list will be used for coordination and distribution of changes to the drawings. Users of drawings covering
microelectronic devices (FSC 5962) should contact DSCC-VA, telephone (614) 692-0544.
6.4 Comments. Comments on this drawing should be directed to DSCC-VA , Columbus, Ohio 43216-5000, or telephone
(614) 692-0547.
6.5 Abbreviations, symbols, and definitions. The abbreviations, symbols, and definitions used herein are defined in
MIL-PRF-38535 and MIL-HDBK-1331.
VLOGIC
Logic supply
12/ 8
Data mode select
CS
AO
Chip select
Byte address/short cycle
R/ C
CE
VCC
REF OUT
AC
REF IN
VEE
BIP OFF
DC
STS
Read/convert
Chip enable
Positive supply
Reference output
Analog common
Reference input
Negative supply
Bipolar offset
Digital common
Status bit
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
DSCC FORM 2234
APR 97
SIZE
5962-99582
A
REVISION LEVEL
A
SHEET
22
6.6 Sources of supply.
6.6.1 Sources of supply for device classes Q and V. Sources of supply for device classes Q and V are listed in QML-38535.
The vendors listed in QML-38535 have submitted a certificate of compliance (see 3.6 herein) to DSCC-VA and have agreed to
this drawing.
6.6.2 Approved sources of supply for device class M. Approved sources of supply for class M are listed in MIL-HDBK-103.
The vendors listed in MIL-HDBK-103 have agreed to this drawing and a certificate of compliance (see 3.6 herein) has been
submitted to and accepted by DSCC-VA.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
DSCC FORM 2234
APR 97
SIZE
5962-99582
A
REVISION LEVEL
A
SHEET
23
STANDARD MICROCIRCUIT DRAWING BULLETIN
DATE: 02-07-11
Approved sources of supply for SMD 5962-99582 are listed below for immediate acquisition information only and
shall be added to MIL-HDBK-103 and QML-38535 during the next revision. MIL-HDBK-103 and QML-38535 will be
revised to include the addition or deletion of sources. The vendors listed below have agreed to this drawing and a
certificate of compliance has been submitted to and accepted by DSCC-VA. This bulletin is superseded by the next
dated revision of MIL-HDBK-103 and QML-38535.
Standard
microcircuit drawing
PIN 1/
Vendor
CAGE
number
Vendor
similar
PIN 2/
5962-9958201QXC
34371
HI1-774T/883
1/ The lead finish shown for each PIN representing
a hermetic package is the most readily available
from the manufacturer listed for that part. If the
desired lead finish is not listed contact the vendor
to determine its availability.
2/ Caution. Do not use this number for item
acquisition. Items acquired to this number may not
satisfy the performance requirements of this drawing.
Vendor CAGE
number
34371
Vendor name
and address
Intersil
2401 Palm Bay Blvd
P.O. Box 883
Melbourne, FL 32902-0883
The information contained herein is disseminated for convenience only and the
Government assumes no liability whatsoever for any inaccuracies in the
information bulletin.