DATASHEET

ICL3221EM
Features
The Intersil ICL3221EM devices are 3.0V powered RS-232
transmitters/receivers which meet ElA/TIA-232 and
V.28/V.24 specifications. Additionally, they provide ±15kV
ESD protection (IEC61000-4-2 Air Gap and Human Body
Model) on transmitter outputs and receiver inputs (RS-232
pins). Targeted applications are PDAs, Palmtops, and
notebook and laptop computers where the low operational,
and even lower standby, power consumption is critical.
Efficient on-chip charge pumps, coupled with manual and
automatic power-down functions, reduce the standby
supply current to a 1µA trickle. Small footprint packaging,
and the use of small, low value capacitors ensure board
space savings as well. Data rates greater than 250kbps are
guaranteed at worst case load conditions. The device is fully
compatible with 3.3V-only systems.
• ESD Protection for RS-232 I/O Pins to ±15kV
(IEC61000)
• Drop in Replacement for MAX3221E
• RS-232 Compatible with VCC = 2.7V
• Meets EIA/TIA-232 and V.28/V.24 Specifications at 3V
• Latch-Up Free
• On-Chip Voltage Converters Require Only Four External
0.1µF Capacitors
• Manual and Automatic Power-down Features
• Receiver Hysteresis For Improved Noise Immunity
• Guaranteed Minimum Data Rate . . . . . . . . 250kbps
• Power Supply Range. . . . . . . Single +3.0V to +3.6V
• Low Supply Current in Power-down State . . . . . . 1µA
The ICL3221EM features an automatic power-down
function which powers down the on-chip power-supply
and driver circuits. This occurs when an attached
peripheral device is shut off or the RS-232 cable is
removed, conserving system power automatically
without changes to the hardware or operating system.
These devices power up again when a valid RS-232
voltage is applied to any receiver input.
• Pb-Free (RoHS Compliant)
Applications
• Any System Requiring RS-232 Communication Ports
- Battery Powered, Hand-Held, and Portable
Equipment
- Laptop Computers, Notebooks, Palmtops
- Modems, Printers and other Peripherals
- Digital Cameras
- Cellular/Mobile Phones
Table 1 summarizes the features of the ICL3221EM.
Related Literature
• Technical Brief TB363 “Guidelines for Handling and
Processing Moisture Sensitive Surface Mount Devices
(SMDs)”
TABLE 1. SUMMARY OF FEATURES
PART
NUMBER
NUMBER
OF Tx
NUMBER
OF Rx
DATA
RATE
(kbps)
RECEIVER
ENABLE
FUNCTION?
READY
OUTPUT?
MANUAL
POWER-DOWN?
AUTOMATIC
POWER-DOWN
FUNCTION?
ICL3221EM
1
1
250
Yes
No
Yes
Yes
Ordering Information
PART
NUMBER
PART
MARKING
ICL3221EMVZ* (Notes 1, 2, 3)
3221 EMVZ
TEMP RANGE
(°C)
-55 to +125
PACKAGE
16 Ld TSSOP
PKG.
DWG. #
M16.173
NOTES:
1. Add “-T” suffix for tape and reel. Please refer to TB347 for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach
materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both
SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that
meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page for ICL3221EM. For more information on MSL please
see techbrief TB363.
December 17, 2009
FN7552.0
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2009. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
ICL3221EM
±15kV ESD Protected, +3V, 1µA, 250kbps, RS-232
Transmitters/Receivers
ISL3221EM
Pin Configurations
ICL3221EM
(16 LD TSSOP)
TOP VIEW
EN 1
16 FORCEOFF
C1+ 2
15 VCC
V+ 3
14 GND
C1- 4
13 T1OUT
C2+ 5
C2- 6
V- 7
R1IN 8
12 FORCEON
11 T1IN
10 INVALID
9 R1OUT
Pin Descriptions
PIN
PIN
NUMBER
EN
1
Active low receiver enable control
C1+
2
External capacitor (voltage doubler) is connected to this lead.
V+
3
Internally generated positive transmitter supply (+5.5V).
C1-
4
External capacitor (voltage doubler) is connected to this lead.
C2+
5
External capacitor (voltage inverter) is connected to this lead.
C2-
6
External capacitor (voltage inverter) is connected to this lead.
V-
7
Internally generated negative transmitter supply (-5.5V).
R1IN
8
±15kV ESD Protected, RS-232 compatible receiver inputs.
R1OUT
9
TTL/CMOS level receiver outputs.
INVALID
10
Active low output that indicates if no valid RS-232 levels are present on any receiver input.
T1IN
11
TTL/CMOS compatible transmitter Inputs.
FORCEON
12
Active high input to override automatic power-down circuitry thereby keeping transmitters active
(FORCEOFF must be high).
T1OUT
13
±15kV ESD Protected, RS-232 level (nominally ±5.5V) transmitter outputs.
GND
14
Ground connection.
VCC
15
System power supply input (3.0V to 3.6V).
FORCEOFF
16
Active low to shut down transmitters and on-chip power supply. This overrides any automatic circuitry
and FORCEON (see Table 2).
FUNCTION
2
FN7552.0
December 17, 2009
ISL3221EM
Typical Operating Circuits
ICL3221EM
+3.3V
C1
0.1µF
C2
0.1µF
T1IN
TTL/CMOS
LOGIC LEVELS
R1OUT
+
0.1µF
2
+ C1+
4
C15
+ C2+
6
C2-
15
VCC
3
+ C3
0.1µF
V- 7
C4
+0.1µF
V+
T1
11
13
9
8
R1
5kΩ
T1OUT
R1IN
RS-232
LEVELS
1 EN
FORCEOFF
12
INVALID
FORCEON
GND
16
10
VCC
TO POWER
CONTROL LOGIC
14
3
FN7552.0
December 17, 2009
ISL3221EM
Absolute Maximum Ratings
Thermal Information
VCC to GND . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6V
V+ to GND . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 7V
V- to GND . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3V to -7V
V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14V
Input Voltages
TIN, FORCEOFF, FORCEON, EN, SHDN . . . . . . -0.3V to 6V
RIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25V
Output Voltages
TOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±13.2V
ROUT, INVALID . . . . . . . . . . . . . . . . . -0.3V to VCC +0.3V
Short Circuit Duration
TOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous
ESD Rating . . . . . . . . . . . See Specification Table on page 5
Thermal Resistance (Typical, Note 4)
θJA (°C/W)
16 Ld TSSOP Package . . . . . . . . . . . . . . .
145
Maximum Junction Temperature (Plastic Package) . . . . +150°C
Maximum Storage Temperature Range . . . -65°C to +150°C
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Operating Conditions
Operating Voltage Range . . . . . . . . . . . . . . +3.0V to +3.6V
Temperature Range . . . . . . . . . . . . . . . . . .-55°C to +125°C
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact
product reliability and result in failures not covered by warranty.
NOTE:
4. θJA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief
TB379 for details.
Electrical Specifications
PARAMETER
Test Conditions: VCC = 3.3V ±10%, C1 - C4 = 0.1µF; Unless Otherwise Specified.
Typicals are at TA = +25°C. Boldface limits apply over the operating temperature
range, -55°C to +125°C.
TEST CONDITIONS
TEMP
MIN
(°C) (Note 6)
TYP
MAX
(Note 6) UNITS
DC CHARACTERISTICS
Supply Current, Automatic
Power-down
All RIN Open, FORCEON = GND, FORCEOFF = VCC
Full
-
1.0
10
µA
Supply Current, Power-down
FORCEOFF = SHDN = GND
Full
-
1.0
10
µA
Supply Current, Automatic
Power-down Disabled
VCC = 3.15V
All Outputs Unloaded,
FORCEON = FORCEOFF
= SHDN = VCC
Full
-
0.3
1.8
mA
LOGIC AND TRANSMITTER INPUTS AND RECEIVER OUTPUTS
Input Logic Threshold Low
TIN, FORCEON, FORCEOFF, EN, SHDN
Full
-
-
0.8
V
Input Logic Threshold High
TIN, FORCEON,
FORCEOFF, EN, SHDN
Full
2.0
-
-
V
Input Leakage Current
TIN, FORCEON, FORCEOFF, EN, SHDN
Full
-
±0.01
±10
µA
Output Leakage Current
FORCEOFF = GND or EN = VCC
Full
-
±0.05
±10
µA
Output Voltage Low
IOUT = 1.6mA
Full
-
-
0.4
V
Output Voltage High
IOUT = -1.0mA
Full
-
V
VCC = 3.3V
VCC - 0.6 VCC - 0.1
AUTOMATIC POWER-DOWN (FORCEON = GND, FORCEOFF = VCC)
Receiver Input Thresholds to
Enable Transmitters
Power Up (see Figure 6)
Full
-2.7
-
2.7
V
Receiver Input Thresholds to
Disable Transmitters
Power Down (see Figure 6)
Full
-0.3
-
0.3
V
INVALID Output Voltage Low
IOUT = 1.6mA
Full
-
-
0.4
V
INVALID Output Voltage High
IOUT = -1.0mA
Full
VCC - 0.6
-
-
V
Receiver Threshold to
Transmitters Enabled Delay
(tWU)
25
-
100
-
µs
Receiver Positive or Negative
Threshold to INVALID High
Delay (tINVH)
25
-
1
-
µs
4
FN7552.0
December 17, 2009
ISL3221EM
Electrical Specifications
Test Conditions: VCC = 3.3V ±10%, C1 - C4 = 0.1µF; Unless Otherwise Specified.
Typicals are at TA = +25°C. Boldface limits apply over the operating temperature
range, -55°C to +125°C. (Continued)
PARAMETER
TEST CONDITIONS
Receiver Positive or Negative
Threshold to INVALID Low
Delay (tINVL)
TEMP
MIN
(°C) (Note 6)
25
-
TYP
MAX
(Note 6) UNITS
30
-
µs
RECEIVER INPUT
Input Voltage Range
25
-25
-
25
V
Input Threshold Low
VCC = 3.3V
25
0.6
1.2
-
V
Input Threshold High
VCC = 3.3V
25
-
1.5
2.4
V
Input Hysteresis
25
-
0.5
-
V
Input Resistance
25
3
5
7
kΩ
TRANSMITTER OUTPUT
Output Voltage Swing
All Transmitter Outputs Loaded with 3kΩ to Ground
Full
±5.0
±5.4
-
V
Output Resistance
VCC = V+ = V- = 0V, Transmitter Output = ±2V
Full
300
10M
-
Ω
Output Short-Circuit Current
Full
-
±35
±60
mA
VOUT = ±12V, VCC = 0V or 3V to 3.6V,
Automatic Power-down or FORCEOFF = SHDN = GND
Full
-
-
±25
µA
Maximum Data Rate
RL = 3kΩ, CL = 1000pF, One Transmitter Switching
Full
250
500
-
kbps
Receiver Propagation Delay
Receiver Input to
Receiver Output,
CL = 150pF
tPHL
25
-
0.15
-
µs
tPLH
25
-
0.15
-
µs
25
-
200
-
ns
Output Leakage Current
TIMING CHARACTERISTICS
Receiver Output Enable Time
Normal Operation
Receiver Output Disable Time Normal Operation
25
-
200
-
ns
Transmitter Skew
tPHL to tPLH (Note 5)
25
-
100
1000
ns
Receiver Skew
tPHL to tPLH
25
-
50
1000
ns
Transition Region Slew Rate
VCC = 3.3V,
RL = 3kΩ to 7kΩ,
Measured from 3V to
-3V or -3V to 3V
CL = 150pF to 2500pF
25
4
-
30
V/µs
CL = 150pF to 1000pF
25
6
-
30
V/µs
25
-
±15
-
kV
ESD PERFORMANCE
RS-232 Pins (TOUT, RIN)
All Other Pins
Human Body Model
IEC61000-4-2 Contact Discharge
25
-
±8
-
kV
IEC61000-4-2 Air Gap Discharge
25
-
±15
-
kV
Human Body Model
25
-
±2
-
kV
NOTES:
5. Transmitter skew is measured at the transmitter zero crossing points.
6. Parts are 100% tested at +25°C. Full temp limits are guaranteed by bench and tester characterization
5
FN7552.0
December 17, 2009
ISL3221EM
Detailed Description
ICL3221EM interface ICs operate from a single +3V
supply, guarantee a 250kbps minimum data rate, require
only four small external 0.1µF capacitors, feature low
power consumption, and meet all ElA RS-232C and V.28
specifications. The circuit is divided into three sections:
charge pump, transmitters and receivers.
This renders them useless for wake up functions, but
the corresponding monitor receiver can be dedicated to
this task as shown in Figure 3.
VCC
RXOUT
RXIN
-25V ≤ VRIN ≤ +25V
5kΩ
GND ≤ VROUT ≤ VCC
GND
Charge-Pump
Intersil’s ICL3221EM utilizes regulated on-chip dual
charge pumps as voltage doublers, and voltage inverters
to generate ±5.5V transmitter supplies from a VCC supply
as low as 3.0V. This allows these devices to maintain
RS-232 compliant output levels over the ±10% tolerance
range of 3.3V powered systems. The efficient on-chip
power supplies require only four small, external 0.1µF
capacitors for the voltage doubler and inverter functions
at VCC = 3.3V. See “Capacitor Selection” on page 9 and
Table 3 on page 9 for capacitor recommendations for
other operating conditions. The charge pumps operate
discontinuously (i.e., they turn off as soon as the V+ and
V- supplies are pumped up to the nominal values),
resulting in significant power savings.
Transmitters
The transmitters are proprietary, low dropout, inverting
drivers that translate TTL/CMOS inputs to EIA/TIA-232
output levels. Coupled with the on-chip ±5.5V supplies,
these transmitters deliver true RS-232 levels over a wide
range of single supply system voltages.
The transmitter output disables and assumes a high
impedance state when the device enters the power-down
mode (see Table 2). These outputs may be driven to
±12V when disabled.
All devices guarantee a 250kbps data rate for full load
conditions (3kΩ and 1000pF), VCC ≥ 3.0V, with one
transmitter operating at full speed. Under more typical
conditions of VCC ≥ 3.3V, RL = 3kΩ, and CL = 250pF, one
transmitter easily operates at 900kbps.
Transmitter inputs float if left unconnected, and may
cause ICC increases. Connect unused inputs to GND for
the best performance.
Receivers
The ICL3221EM device contains standard inverting
receiver that three-state via the EN or FORCEOFF
control lines. The receivers convert RS-232 signals to
CMOS output levels and accept inputs up to ±25V while
presenting the required 3kW to 7kW input impedance
(see Figure 1) even if the power is off (VCC = 0V). The
receivers’ Schmitt trigger input stage uses hysteresis to
increase noise immunity and decrease errors due to
slow input signal transitions.
The ICL3221EM’s inverting receiver is disabled only when
EN is driven high (see Table 2).
Standard receivers driving powered down peripherals
must be disabled to prevent current flow through the
peripheral’s protection diodes (see Figures 2 and 3).
6
FIGURE 1. INVERTING RECEIVER CONNECTIONS
Low Power Operation
These 3V devices require a nominal supply current of
0.3mA, during normal operation (not in power-down
mode). This is considerably less than the 5mA to 11mA
current required by comparable 5V RS-232 devices,
allowing users to reduce system power simply by
switching to this new family.
Pin Compatible Replacements for 5V
Devices
The ICL3221EM is pin compatible with existing 5V
RS-232 transceivers - See the “Features” section on
page 1 for details.
This pin compatibility coupled with the low ICC and wide
operating supply range, make the ICL3221EM potential
lower power, higher performance drop-in replacements
for existing 5V applications. As long as the ±5V RS-232
output swings are acceptable, and transmitter input
pull-up resistors aren’t required, the ICL3221EM should
work in most 5V applications.
When replacing a device in an existing 5V application, it
is acceptable to terminate C3 to VCC as shown on the
“Typical Operating Circuits” on page 3. Nevertheless,
terminate C3 to GND if possible, as slightly better
performance results from this configuration.
Power-down Functionality
The already low current requirement drops significantly
when the device enters power-down mode. In
power-down, supply current drops to 1µA, because the
on-chip charge pump turns off (V+ collapses to VCC,
V- collapses to GND), and the transmitter outputs
three-state. Inverting receiver outputs may or may not
disable in power-down; refer to Table 2 for details. This
micro-power mode makes these devices ideal for battery
powered and portable applications.
Software Controlled (Manual) Power-down
The ICL3221EM device provides a pin that allows the
user to force the IC into the low power, standby state.
Driving this pin high enables normal operation, while
driving it low forces the IC into its power-down state.
Connect SHDN to VCC if the power-down function isn’t
needed. Note that all the receiver outputs remain
enabled during shutdown (see Table 2). For the lowest
power consumption during power-down, the receivers
should also be disabled by driving the EN input high (see
next section, and Figures 2 and 3).
FN7552.0
December 17, 2009
ISL3221EM
TABLE 2. POWER-DOWN AND ENABLE LOGIC TRUTH TABLE
RS-232 SIGNAL
PRESENT AT
RECEIVER INPUT?
FORCEOFF
OR SHDN FORCEON
EN
TRANSMITTER RECEIVER INVALID
INPUT
INPUT
INPUT
OUTPUTS
OUTPUTS OUTPUT
MODE OF OPERATION
ICL3221EM
No
H
H
L
Active
Active
L
No
H
H
H
Active
High-Z
L
Normal Operation
(Auto Power-down Disabled)
Yes
H
L
L
Active
Active
H
Yes
H
L
H
Active
High-Z
H
Normal Operation
(Auto Power-down Enabled)
No
H
L
L
High-Z
Active
L
No
H
L
H
High-Z
High-Z
L
Yes
L
X
L
High-Z
Active
H
Manual Power-down
Yes
L
X
H
High-Z
High-Z
H
Manual Power-down with
Receiver Disabled
No
L
X
L
High-Z
Active
L
Manual Power-down
No
L
X
H
High-Z
High-Z
L
Manual Power-down with
Receiver Disabled
The ICL3221EM utilizes a two pin approach where the
FORCEON and FORCEOFF inputs determine the IC’s
mode. For always enabled operation, FORCEON and
FORCEOFF are both strapped high. To switch between
active and power-down modes, under logic or software
control, only the FORCEOFF input need be driven. The
FORCEON state isn’t critical, as FORCEOFF dominates
over FORCEON. Nevertheless, if strictly manual control
over power-down is desired, the user must strap
FORCEON high to disable the automatic power-down
circuitry.
The INVALID output always indicates whether or not a
valid RS-232 signal is present at any of the receiver
inputs (see Table 2), giving the user an easy way to
determine when the interface block should power down.
In the case of a disconnected interface cable where all
the receiver inputs are floating (but pulled to GND by the
internal receiver pull down resistors), the INVALID logic
detects the invalid levels and drives the output low. The
power management logic then uses this indicator to
power down the interface block. Reconnecting the cable
restores valid levels at the receiver inputs, INVALID
switches high, and the power management logic wakes
up the interface block. INVALID can also be used to
indicate the DTR or RING INDICATOR signal, as long as
the other receiver inputs are floating, or driven to GND
(as in the case of a powered down driver). Connecting
FORCEOFF and FORCEON together disables the
automatic power-down feature, enabling them to
function as a manual SHUTDOWN input (see Figure 4).
Power-down Due to Auto
Power-down Logic
VCC
VCC
CURRENT
FLOW
VCC
VOUT = VCC
Rx
POWERED
DOWN
UART
Tx
SHDN = GND
GND
OLD
RS-232 CHIP
FIGURE 2. POWER DRAIN THROUGH POWERED
DOWN PERIPHERAL
VCC
TRANSITION
DETECTOR
TO
WAKE-UP
LOGIC
ICL324XE
VCC
R2OUTB
RX
POWERED
DOWN
UART
VOUT = HI-Z
R2OUT
TX
R2IN
T1IN
T1OUT
FORCEOFF = GND
OR SHDN = GND, EN = VCC
FIGURE 3. DISABLED RECEIVERS PREVENT POWER
DRAIN
7
FN7552.0
December 17, 2009
ISL3221EM
FORCEOFF
PWR
MGT
LOGIC
2.7V
FORCEON
VALID RS-232 LEVEL - ICL3221EM IS ACTIVE
INDETERMINATE - POWER-DOWN MAY OR
MAY NOT OCCUR
INVALID
ICL3221EM
0.3V
INVALID LEVEL - POWER-DOWN OCCURS
AFTER 30µs
-0.3V
INDETERMINATE - POWER-DOWN MAY OR
MAY NOT OCCUR
I/O
UART
-2.7V
CPU
VALID RS-232 LEVEL - ICL3221EM IS ACTIVE
FIGURE 6. DEFINITION OF VALID RS-232 RECEIVER
LEVELS
FIGURE 4. CONNECTIONS FOR MANUAL POWER-DOWN
WHEN NO VALID RECEIVER SIGNALS ARE
PRESENT
With any of the control schemes, the time required to
exit power-down, and resume transmission is only
100µs. A mouse, or other application, may need more
time to wake up from shutdown. If automatic
power-down is being utilized, the RS-232 device will
reenter power-down if valid receiver levels aren’t
reestablished within 30µs of the ICL3221EM powering
up. Figure 5 illustrates a circuit that keeps the
ICL3221EM from initiating automatic power-down for
100ms after powering up. This gives the slow-to-wake
peripheral circuit time to reestablish valid RS-232 output
levels.
POWER
MANAGEMENT
UNIT
MASTER POWER-DOWN LINE
0.1µF
FORCEOFF
1MΩ
FORCEON
ICL3221EM
FIGURE 5. CIRCUIT TO PREVENT AUTO POWER-DOWN
FOR 100ms AFTER FORCED POWER-UP
Automatic Power-down
Even greater power savings is available by using the
devices which feature an automatic power-down
function. When no valid RS-232 voltages (see Figure 6)
are sensed on any receiver input for 30µs, the charge
pump and transmitters power-down, thereby reducing
supply current to 1µA. Invalid receiver levels occur
whenever the driving peripheral’s outputs are shut off
(powered down) or when the RS-232 interface cable is
disconnected. The ICL3221EM powers back up whenever
it detects a valid RS-232 voltage level on any receiver
input. This automatic power-down feature provides
additional system power savings without changes to the
existing operating system.
8
Automatic power-down operates when the FORCEON
input is low, and the FORCEOFF input is high. Tying
FORCEON high disables automatic power-down, but
manual power-down is always available via the
overriding FORCEOFF input. Table 2 summarizes the
automatic power-down functionality.
Devices with the automatic power-down feature include
an INVALID output signal, which switches low to indicate
that invalid levels have persisted on all of the receiver
inputs for more than 30µs (see Figure 7). INVALID
switches high 1µs after detecting a valid RS-232 level on
a receiver input. INVALID operates in all modes (forced
or automatic power-down, or forced on), so it is also
useful for systems employing manual power-down
circuitry. When automatic power-down is utilized,
INVALID = 0 indicates that the ICL3221EM is in
power-down mode.
The time to recover from automatic power-down mode is
typically 100µs.
RECEIVER
INPUTS
INVALID
} REGION
TRANSMITTER
OUTPUTS
INVALID
OUTPUT
VCC
0
tINVL
AUTOPWDN
tINVH
PWR UP
V+
VCC
0
V-
FIGURE 7. AUTOMATIC POWER-DOWN AND INVALID
TIMING DIAGRAMS
Receiver ENABLE Control
Several devices also feature an EN input to control the
receiver outputs. Driving EN high disables all the
inverting (standard) receiver outputs placing them in a
FN7552.0
December 17, 2009
ISL3221EM
high impedance state. This is useful to eliminate supply
current, due to a receiver output forward biasing the
protection diode, when driving the input of a powered
down (VCC = GND) peripheral (see Figure 2).
5V/DIV
FORCEOFF
T1
Capacitor Selection
The charge pumps require 0.1µF capacitors for 3.3V
operation. For other supply voltages, refer to Table 3 for
capacitor values. Do not use values smaller than those
listed in Table 3. Increasing the capacitor values (by a
factor of 2) reduces ripple on the transmitter outputs and
slightly reduces power consumption. C2, C3, and C4 can
be increased without increasing C1’s value, however, do
not increase C1 without also increasing C2, C3, and C4 to
maintain the proper ratios (C1 to the other capacitors).
When using minimum required capacitor values, make
sure that capacitor values do not degrade excessively
with temperature. If in doubt, use capacitors with a
larger nominal value. The capacitor’s equivalent series
resistance (ESR) usually rises at low temperatures and it
influences the amount of ripple on V+ and V-.
TABLE 3. REQUIRED CAPACITOR VALUES
VCC
(V)
C1
(µF)
C2, C3, C4
(µF)
3.0 to 3.6
0.1
0.1
Power Supply Decoupling
In most circumstances a 0.1µF bypass capacitor is
adequate. In applications that are particularly sensitive
to power supply noise, decouple VCC to ground with a
capacitor of the same value as the charge-pump
capacitor C1. Connect the bypass capacitor as close as
possible to the IC.
Operation Down to 2.7V
The ICL3221EM transmitter outputs meet RS-562 levels
(±3.7V), at full data rate, with VCC as low as 2.7V.
RS-562 levels typically ensure interoperability with RS232 devices.
2V/DIV
T2
VCC = +3.3V
C1 - C4 = 0.1µF
TIME (20µs/DIV)
FIGURE 8. TRANSMITTER OUTPUTS WHEN EXITING
POWER-DOWN
High Data Rates
The ICL3221EM maintains the RS-232 ±5V minimum
transmitter output voltages even at high data rates.
Figure 9 details a transmitter loopback test circuit, and
Figure 10 illustrates the loopback test result at 120kbps.
For this test, all transmitters were simultaneously driving
RS-232 loads in parallel with 1000pF, at 120kbps.
Figure 11 shows the loopback results for a single
transmitter driving 1000pF and an RS-232 load at
250kbps. The static transmitters were also loaded with
an RS-232 receiver..
VCC
0.1µF
+
C1
9
C1+
C1-
+
C2
VCC
V+
ICL3221EM
C2+
V-
C2TIN
Transmitter Outputs when
Exiting Power-down
Figure 8 shows the response of two transmitter outputs
when exiting power-down mode. As they activate, the
two transmitter outputs properly go to opposite RS-232
levels, with no glitching, ringing, nor undesirable
transients. Each transmitter is loaded with 3kΩ in parallel
with 2500pF. Note that the transmitters enable only
when the magnitude of the supplies exceed
approximately 3V.
+
ROUT
EN
VCC
+
C3
C4
+
TOUT
RIN
1000pF
5k
SHDN OR
FORCEOFF
FIGURE 9. TRANSMITTER LOOPBACK TEST CIRCUIT
FN7552.0
December 17, 2009
ISL3221EM
±15kV ESD Protection
5V/DIV
All pins on ICL3221EM devices include ESD protection
structures, but the ICL3221EM family incorporates
advanced structures which allow the RS-232 pins
(transmitter outputs and receiver inputs) to survive ESD
events up to ±15kV. The RS-232 pins are particularly
vulnerable to ESD damage because they typically
connect to an exposed port on the exterior of the finished
product. Simply touching the port pins, or connecting a
cable, can cause an ESD event that might destroy
unprotected ICs. These new ESD structures protect the
device whether or not it is powered up, protect without
allowing any latch-up mechanism to activate, and don’t
interfere with RS-232 signals as large as ±25V.
T1IN
T1OUT
R1OUT
VCC = +3.3V
C1 - C4 = 0.1µF
5µs/DIV
FIGURE 10. LOOPBACK TEST AT 120kbps
5V/DIV
T1IN
T1OUT
Human Body Model (HBM) Testing
As the name implies, this test method emulates the ESD
event delivered to an IC during human handling. The
tester delivers the charge through a 1.5kΩ current
limiting resistor, making the test less severe than the
IEC61000 test, which utilizes a 330Ω limiting resistor.
The HBM method determines an IC’s ability to withstand
the ESD transients typically present during handling and
manufacturing. Due to the random nature of these
events, each pin is tested with respect to all other pins.
The RS-232 pins on “E” family devices can withstand
HBM ESD events to ±15kV.
IEC61000-4-2 Testing
R1OUT
VCC = +3.3V
C1 - C4 = 0.1µF
2µs/DIV
FIGURE 11. LOOPBACK TEST AT 250kbps
Interconnection with 3V and 5V
Logic
The ICL3221EM directly interfaces with 5V CMOS and TTL
logic families. Nevertheless, with the ICL3221EM at 3.3V,
and the logic supply at 5V, AC, HC, and CD4000 outputs
can drive ICL3221EM inputs, but ICL3221EM outputs do
not reach the minimum VIH for these logic families. See
Table 4 for more information.
TABLE 4. LOGIC FAMILY COMPATIBILITY WITH
VARIOUS SUPPLY VOLTAGES
SYSTEM
POWER-SUPPLY
VOLTAGE
(V)
VCC
SUPPLY
VOLTAGE
(V)
3.3
3.3
AIR-GAP DISCHARGE TEST METHOD
For this test method, a charged probe tip moves toward
the IC pin until the voltage arcs to it. The current
waveform delivered to the IC pin depends on approach
speed, humidity, temperature, etc., so it is difficult to
obtain repeatable results. The “E” device RS-232 pins
withstand ±15kV air-gap discharges.
CONTACT DISCHARGE TEST METHOD
COMPATIBILITY
Compatible with all CMOS
families.
10
The IEC61000 test method applies to finished
equipment, rather than to an individual IC. Therefore,
the pins most likely to suffer an ESD event are those that
are exposed to the outside world (the RS-232 pins in this
case), and the IC is tested in its typical application
configuration (power applied) rather than testing each
pin-to-pin combination. The lower current limiting
resistor coupled with the larger charge storage capacitor
yields a test that is much more severe than the HBM test.
The extra ESD protection built into this device’s RS-232
pins allows the design of equipment meeting level 4
criteria without the need for additional board level
protection on the RS-232 port.
During the contact discharge test, the probe contacts the
tested pin before the probe tip is energized, thereby
eliminating the variables associated with the air-gap
discharge. The result is a more repeatable and
predictable test, but equipment limits prevent testing
devices at voltages higher than ±8kV. All “E” family
devices survive ±8kV contact discharges on the RS-232
pins.
FN7552.0
December 17, 2009
ISL3221EM
VCC = 3.3V, TA = +25°C.
6
25
VOUT+
4
2
0
SLEW RATE (V/µs)
TRANSMITTER OUTPUT VOLTAGE (V)
Typical Performance Curves
1 TRANSMITTER AT 250kbps
1 OR 2 TRANSMITTERS AT 30kbps
-2
15
-SLEW
+SLEW
10
VOUT -
-4
-6
0
20
1000
2000
3000
4000
5
5000
0
1000
LOAD CAPACITANCE (pF)
FIGURE 12. TRANSMITTER OUTPUT VOLTAGE vs LOAD
CAPACITANCE
2000
3000
4000
LOAD CAPACITANCE (pF)
5000
FIGURE 13. SLEW RATE vs LOAD CAPACITANCE
45
SUPPLY CURRENT (mA)
40
35
250kbps
30
25
20
120kbps
15
10
20kbps
5
0
0
1000
2000
3000
4000
5000
LOAD CAPACITANCE (pF)
FIGURE 14. SUPPLY CURRENT vs LOAD CAPACITANCE WHEN TRANSMITTING DATA
Die Characteristics
SUBSTRATE POTENTIAL (POWERED UP):
GND
TRANSISTOR COUNT:
ICL3221EM: 286
PROCESS:
Si Gate CMOS
11
FN7552.0
December 17, 2009
ISL3221EM
Thin Shrink Small Outline Plastic Packages (TSSOP)
M16.173
N
16 LEAD THIN SHRINK SMALL OUTLINE PLASTIC PACKAGE
INDEX
AREA
0.25(0.010) M
E
E1
2
INCHES
GAUGE
PLANE
-B1
B M
SYMBOL
MIN
MAX
MIN
MAX
NOTES
A
-
0.043
-
1.10
-
A1
3
0.05(0.002)
-A-
L
A
D
-C-
e
α
A1
b
0.10(0.004) M
0.25
0.010
SEATING PLANE
c
0.10(0.004)
C A M
0.05
0.15
-
A2
0.033
0.037
0.85
0.95
-
b
0.0075
0.012
0.19
0.30
9
c
0.0035
0.008
0.09
0.20
-
B S
0.002
D
0.193
0.201
4.90
5.10
3
0.169
0.177
4.30
4.50
4
0.026 BSC
E
0.246
L
0.020
N
α
NOTES:
0.006
E1
e
A2
MILLIMETERS
0.65 BSC
0.256
6.25
0.028
0.50
16
0o
-
6.50
-
0.70
6
16
8o
0o
1. These package dimensions are within allowable dimensions of
JEDEC MO-153-AB, Issue E.
7
8o
Rev. 1 2/02
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate
burrs. Mold flash, protrusion and gate burrs shall not exceed
0.15mm (0.006 inch) per side.
4. Dimension “E1” does not include interlead flash or protrusions.
Interlead flash and protrusions shall not exceed 0.15mm (0.006
inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual
index feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Dimension “b” does not include dambar protrusion. Allowable
dambar protrusion shall be 0.08mm (0.003 inch) total in excess
of “b” dimension at maximum material condition. Minimum space
between protrusion and adjacent lead is 0.07mm (0.0027 inch).
10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. (Angles in degrees)
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in the quality certifications found at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications
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12
FN7552.0
December 17, 2009
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