IRFD020, SiHFD020 Datasheet

IRFD020, SiHFD020
Vishay Siliconix
Power MOSFET
FEATURES
PRODUCT SUMMARY
VDS (V)
• For Automatic Insertion
50
RDS(on) ()
VGS = 10 V
Available
• Compact, End Stackable
0.10
RoHS*
• Fast Switching
Qg (Max.) (nC)
24
Qgs (nC)
7.1
• Ease of Paralleling
7.1
• Excellent Temperature Stability
Qgd (nC)
Configuration
• Compliant to RoHS Directive 2002/95/EC
Single
D
HVMDIP
S
COMPLIANT
DESCRIPTION
The HVMDIP technology is the key to Vishay’s advanced
line of power MOSFET transistors. The efficient geometry
and unique processing of the HVMDIP design achieves
very low on-state resistance combined with high
transconductance and extreme device ruggedness.
HVMDIPs feature all of the established advantages of
MOSFETs such as voltage control, very fast switching, ease
of paralleling, and temperature stability of the electrical
parameters.
The HVMDIP 4 pin, dual-in-line package brings the
advantages of HVMDIPs to high volume applications where
automatic PC board insertion is desireable, such as circuit
boards for computers, printers, telecommunications
equipment, and consumer products. Their compatibility with
automatic insertion equipment, low-profile and end
stackable features represent the stat-of-the-art in power
device packaging.
G
G
D
S
N-Channel MOSFET
ORDERING INFORMATION
Package
HVMDIP
IRFD020PbF
SiHFD020-E3
IRFD020
SiHFD020
Lead (Pb)-free
SnPb
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
LIMIT
Drain-Source Voltagea
VDS
50
Gate-Source Voltage
VGS
± 20
Continuous Drain Current
VGS at 10 V
TC = 25 °C
TC = 100 °C
Pulsed Drain Currentb
ID
IDM
Linear Derating Factor
Inductive Current, Clamped
Unclamped Inductive Current (Avalanche Current)c
Maximum Power Dissipation
L = 100 μH
TC = 25 °C
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak Temperature)
for 10 s
UNIT
V
2.4
1.5
A
19
0.0080
W/°C
19
2.2
A
PD
1.0
W
TJ, Tstg
- 55 to + 150
ILM
IL
300d
°C
Notes
a. TJ = 25 °C to 150 °C
b. Repetitive rating; pulse width limited by maximum junction temperature.
c. VDD = 25 V, starting TJ = 25 °C, L = 100 μH, Rg = 25 
d. 1.6 mm from case.
* Pb containing terminations are not RoHS compliant, exemptions may apply
Document Number: 91465
S11-0915-Rev. A, 16-May-11
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This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRFD020, SiHFD020
Vishay Siliconix
THERMAL RESISTANCE RATINGS
PARAMETER
Maximum Junction-to-Ambient
SYMBOL
TYP.
MAX.
UNIT
RthJA
-
120
°C/W
SPECIFICATIONS (TC = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
VDS
VGS = 0 V, ID = 250 μA
50
-
-
V
VGS(th)
VDS = VGS, ID = 250 μA
2.0
-
4.0
V
nA
Static
Drain-Source Breakdown Voltage
Gate-Source Threshold Voltage
Gate-Source Leakage
VGS = ± 20 V
-
-
± 500
VDS = max. rating, VGS = 0 V
-
-
250
VDS = max. rating x 0.8, VGS = 0 V, TC = 125
-
-
1000
2.4
-
-
A
IGSS
Zero Gate Voltage Drain Current
IDSS
On-State Drain Currentb
ID(on)
VGS = 10 V
VDS > ID(on) x RDS(on) max.
RDS(on)
VGS = 10 V
ID = 1.4 A
Drain-Source On-State
Resistanceb
Forward Transconductanceb
gfs
VDS = 20 V, ID = 7.5 A
μA
-
0.080
0.10

4.9
7.3
-
S
-
400
-
-
260
-
-
44
-
Dynamic
Input Capacitance
Ciss
Output Capacitance
Coss
Reverse Transfer Capacitance
Crss
Total Gate Charge
Qg
Gate-Source Charge
Qgs
VGS = 0 V,
VDS = 25 V,
f = 1.0 MHz
VGS = 10 V
ID = 15 A,
VDS = max. rating x 0.8
-
16
24
-
4.7
7.1
Gate-Drain Charge
Qgd
-
4.7
7.1
Turn-On Delay Time
td(on)
-
8.7
13
-
55
83
-
16
24
-
26
39
-
4.0
-
-
6.0
-
-
-
2.4
Rise Time
tr
Turn-Off Delay Time
td(off)
Fall Time
tf
Internal Drain Inductance
LD
Internal Source Inductance
LS
VDD = 25 V, ID = 15 A,
Rg = 18 , RD = 1.7 
Between lead,
6 mm (0.25") from
package and center of
die contact
D
pF
nC
ns
nH
G
S
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current
Pulsed Diode Forward
Currentc
Body Diode Voltagea
IS
ISM
VSD
Body Diode Reverse Recovery Time
trr
Body Diode Reverse Recovery Charge
Qrr
Forward Turn-On Time
ton
MOSFET symbol
showing the
integral reverse
p - n junction diode
D
A
G
S
TC = 25 °C, IS = 2.4 A, VGS = 0 V
TJ = 25 °C, IF = 15 A, dI/dt = 100 A/μs
-
-
19
-
-
1.4
V
57
130
310
ns
0.17
0.34
0.85
μC
Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse width  300 μs; duty cycle  2 %.
c. VDD = 25 V, starting TJ = 25 °C, L = 100 μH, Rg = 25 
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Document Number: 91465
S11-0915-Rev. A, 16-May-11
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRFD020, SiHFD020
Vishay Siliconix
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
Fig. 1 - Typical Output Characteristics
Fig. 2 - Typical Output Characteristics
Document Number: 91465
S11-0915-Rev. A, 16-May-11
Fig. 3 - Typical Transfer Characteristics
Fig. 4 - Normalized On-Resistance vs. Temperature
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This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRFD020, SiHFD020
Vishay Siliconix
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
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Fig. 7 - Typical Source-Drain Diode Forward Voltage
Fig. 8 - Maximum Safe Operating Area
Document Number: 91465
S11-0915-Rev. A, 16-May-11
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRFD020, SiHFD020
Vishay Siliconix
Fig. 9 - Maximum Drain Current vs. Ambient Temperature
Fig. 10 - Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
Fig. 11 - Typical Transconductance vs. Drain Current
Document Number: 91465
S11-0915-Rev. A, 16-May-11
Fig. 12 - Breakdown Voltage vs. Temperature
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This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRFD020, SiHFD020
Vishay Siliconix
Fig. 15a - Unclamped Inductive Load Test Waveforms
Fig. 13 - Typical on-Resistance vs. Drain Current
Fig. 16 - Switching Time Test Circuit
Fig. 14a - Clamped Inductive Test Circuit
Fig. 14b - Clamped Inductive Waveforms
Fig. 17 - Gate Charge Test Circuit
Fig. 15a - Unclamped Inductive Test Circuit
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Document Number: 91465
S11-0915-Rev. A, 16-May-11
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRFD020, SiHFD020
Vishay Siliconix
Fig. 18 - Typical Time to Accumulated 1 % Gate Failure
Fig. 19 - Typical High Temperature Reverse Bias (HTRB) Failure
Rate
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?91465.
Document Number: 91465
S11-0915-Rev. A, 16-May-11
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This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Package Information
Vishay Siliconix
HVM DIP (High voltage)
0.248 [6.29]
0.240 [6.10]
0.043 [1.09]
0.035 [0.89]
0.197 [5.00]
0.189 [4.80]
0.133 [3.37]
0.125 [3.18]
0.180 [4.57]
0.160 [4.06]
0.094 [2.38]
0.086 [2.18]
A
L
0.160 [4.06]
0.140 [3.56]
0° to 15°
2x
0.017 [0.43]
0.013 [0.33]
0.045 [1.14]
2 x 0.035 [0.89]
E min.
0.024 [0.60]
4x
0.020 [0.51]
0.100 [2.54] typ.
E max.
INCHES
MILLIMETERS
DIM.
MIN.
MAX.
MIN.
A
0.310
0.330
7.87
MAX.
8.38
E
0.300
0.425
7.62
10.79
L
0.270
0.290
6.86
7.36
ECN: X10-0386-Rev. B, 06-Sep-10
DWG: 5974
Note
1. Package length does not include mold flash, protrusions or gate burrs. Package width does not include interlead flash or protrusions.
Document Number: 91361
Revision: 06-Sep-10
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Disclaimer
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Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as RoHS-Compliant fulfill the
definitions and restrictions defined under Directive 2011/65/EU of The European Parliament and of the Council
of June 8, 2011 on the restriction of the use of certain hazardous substances in electrical and electronic equipment
(EEE) - recast, unless otherwise specified as non-compliant.
Please note that some Vishay documentation may still make reference to RoHS Directive 2002/95/EC. We confirm that
all the products identified as being compliant to Directive 2002/95/EC conform to Directive 2011/65/EU.
Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as Halogen-Free follow Halogen-Free
requirements as per JEDEC JS709A standards. Please note that some Vishay documentation may still make reference
to the IEC 61249-2-21 definition. We confirm that all the products identified as being compliant to IEC 61249-2-21
conform to JEDEC JS709A standards.
Revision: 02-Oct-12
1
Document Number: 91000