DATASHEET

Single Event Radiation Hardened Quad Voltage
Comparators
IS-139ASRH, IS-139ASEH
Features
The single event effects and total
dose radiation hardened IS-139ASRH,
IS-139ASEH consist of four
independent single or dual supply
voltage comparators on a single
monolithic substrate. The common mode input voltage range
includes ground, even when operated from a single supply, and
the low supply current makes these comparators suitable for
low power applications. These types were designed to directly
interface with TTL and CMOS inputs.
• Electrically Screened to SMD # 5962-01510
The IS-139ASRH, IS-139ASEH are fabricated on our
dielectrically isolated Rad Hard Silicon Gate (RSG) process,
which provides immunity to single event latch-up and the
capability of highly reliable performance in any radiation
environment.
• Quiescent Supply Current . . . . . . . . . . . . . . . . . . . . 3mA (Max)
TM
Specifications for Rad Hard QML devices are controlled by the
Defense Logistics Agency Land and Maritime (DLA). The SMD
numbers listed below must be used when ordering.
• QML Qualified per MIL-PRF-38535 Requirements
• Radiation Hardness
- Total Dose . . . . . . . . . . . . . . . . . . . . . . . . . 300krad(Si) (Max)
- Single Event Latch-up . . . . . . . . . . . . . . . >84MeV/mg/cm2
- Single Event Upset . . . . . . . . . . . . . . . . . . >84MeV/mg/cm2
• Operating Supply Voltage Range . . . . . . . . . . . . . . . 9V to 30V
• Input Offset Voltage (VIO) . . . . . . . . . . . . . . . . . . . . 5mV (Max)
• Differential Input Voltage Range Equal to the Supply Voltage
Applications
• DC-DC Power Conversion
• Pulse Generators
• Timing Circuitry
• Level Shifting
Detailed Electrical Specifications for the IS-139ASRH,
IS-139ASEH are contained in SMD 5962-01510.
• Analog to Digital Conversion
Pin Configuration
IS9-139ASRH, IS9-139ASEH
(FLATPACK CDFP4-F20)
TOP VIEW
NC
1
20
OUTC
OUTB
2
19
OUTD
NC
3
18
NC
OUTA
4
17
GND
NC
5
16
NC
NC
6
15
+IND
VCC
7
14
-IND
-INA
8
13
+INC
+INA
9
12
-INC
-INB
10
11
+INB
Ordering Information
ORDERING
NUMBER
INTERNAL
MKT. NUMBER
TEMP. RANGE
(°C)
PACKAGE
DRAWING NUMBER
5962F0151001VXC
IS9-139ASRH-Q
-55 to +125
K20.A
5962F0151001QXC
IS9-139ASRH-8
-55 to +125
K20.A
5962F0151002VXC
IS9-139ASEH-Q
-55 to +125
K20.A
IS9-139ASRH/PROTO
IS9-139ASRH/PROTO
-55 to +125
K20.A
April 6, 2012
FN9000.4
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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IS-139ASRH, IS-139ASEH
Die Characteristics
DIE DIMENSIONS
Backside Finish
3750µm x 4510µm (148 mils x 178 mils)
483µm ± 25.4µm (19 mils ± 1 mil)
INTERFACE MATERIALS
Silicon
ASSEMBLY RELATED INFORMATION
Substrate Potential
Glassivation
Unbiased (DI)
Type: Silox (SiO2)
Thickness: 8.0kÅ ± 1.0kÅ
ADDITIONAL INFORMATION
Worst Case Current Density
Top Metallization
<2.0 x 105 A/cm2
Type: AlSiCu
Thickness: 16.0kÅ ± 2kÅ
Transistor Count
644
Substrate
Radiation Hardened Silicon Gate, Dielectric Isolation
Metallization Mask Layout
IS-139ASRH, IS-139ASEH
VCC
OUTA
-INA
OUTB
+INA
-INB
OUTC
+INB
-INC
+INC
OUTD
-IND
+IND
GND
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Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems as noted
in the quality certifications found at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time
without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be
accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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2
FN9000.4
April 6, 2012
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