HCTS646MS TM Radiation Hardened Octal Bus Transceiver/Register, Three-State August 1995 Features • • • • • • • • • • • • • • Pinouts 3 Micron Radiation Hardened CMOS SOS Total Dose 200K RAD (Si) SEP Effective LET No Upsets: >100 MEV-cm2/mg Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/ Bit-Day (Typ) Dose Rate Survivability: >1 x 1012 RAD (Si)/s Dose Rate Upset >1010 RAD (Si)/s 20ns Pulse Cosmic Ray Upset Rate 2 x 10-9 Errors/Bit Day Latch-Up Free Under Any Conditions Fanout (Over Temperature Range) - Bus Driver Outputs - 15 LSTTL Loads Military Temperature Range: -55oC to +125 oC Significant Power Reduction Compared to LSTTL ICs DC Operating Voltage Range: 4.5V to 5.5V LSTTL Input Compatibility - VIL = 0.8V Max - VIH = VCC/2 Input Current Levels Ii ≤ 5µA at VOL, VOH 24 LEAD CERAMIC DUAL-IN-LINE METAL SEAL PACKAGE (SBDIP) MIL-STD-1835 CDIP2-T24 TOP VIEW CAB 1 24 VCC SAB 2 23 CBA DIR 3 22 SBA A0 4 21 OE A1 5 20 B0 A2 6 19 B1 A3 7 18 B2 A4 8 17 B3 A5 9 16 B4 A6 10 15 B5 A7 11 14 B6 GND 12 13 B7 Description 24 LEAD CERAMIC METAL SEAL FLATPACK PACKAGE (FLATPACK) MIL-STD-1835 CDFP4-F24 TOP VIEW The Intersil HCTS646MS is a Radiation Hardened ThreeState Octal Bus Tranceiver/Register with Non-Inverting outputs. This device is a bus transceiver with D-type flip-flops which act as internal storage registers. Data on the A bus or the B bus can be clocked into the registers on a High-to-Low transition of either CAB ro CBA clock inputs. Output enable (OE) and Direction (DIR) inputs control the transceiver functions. Data present at the high impedance output can be stored in either register or both but only one of the two buses can be enabled as outputs at any one time. The select controls (SAB and SBA) can multiplex stored and transparent (real time) data. The direction control determines which data bus will receive data when the OE pin is LOW. In the high impedance mode (OE high), A data can be stored in one register and B data in the other register. Data at the A or B terminals can be clocked into the storage flip-flops at any time. The HCTS646MS utilizes advanced CMOS/SOS technology to achieve high-speed operation. This device is a member of radiation hardened, high-speed, CMOS/SOS Logic Family. The HCTS646MS is supplied in a 24 lead Ceramic flatpack (K suffix) or a SBDIP Package (D suffix). CAB SAB DIR A0 A1 A2 A3 A4 A5 A6 A7 GND 24 23 22 21 20 19 18 17 16 15 14 13 1 2 3 4 5 6 7 8 9 10 11 12 VCC CBA SBA OE B0 B1 B2 B3 B4 B5 B6 B7 Ordering Information PART NUMBER TEMPERATURE RANGE SCREENING LEVEL PACKAGE HCTS646DMSR -55oC to +125oC Intersil Class S Equivalent 24 Lead SBDIP HCTS646KMSR -55oC to +125oC Intersil Class S Equivalent 24 Lead Ceramic Flatpack o HCTS646D/Sample +25 C Sample 24 Lead SBDIP HCTS646K/Sample +25oC Sample 24 Lead Ceramic Flatpack Die Die HCTS646HMSR +25 oC CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2002. All Rights Reserved 706 518628 FN3074.1 Spec Number HCTS646MS Functional Diagram CL CL FF Q 4 FF O O Q P P N N 20 PAD PAD A0 22 B0 PAD SBA 2 PAD SAB 23 PAD TO CHANNELS 1 THROUGH 7 CBA 1 PAD CAB 21 PAD OE 3 PAD DIR 3 CHANNEL 0 1 2 3 4 5 6 7 PAD DIR 12 PAD VSS PINS 4 - 20 5 - 19 6 - 18 7 - 17 8 - 16 9 - 15 10 - 14 11 - 13 TRUTH TABLE INPUTS OE DIR X X X X H X H X H or L L L X L L L L CAB DATA I/O* OPERATION OR FUNCTION CBA SAB SBA A0 THRU A7 B0 THRU B7 X X X Input Not Specified Not Specified Input Store A, B Unspecified X X Input Not Specified Input Store B, A Unspecified X X Input Input Store A and B Data H or L X X Input Input Isolation, Hold Storage X X L Output Input Real-Time B Data to A Bus X H or L X H Output Input Stored B Data to A Bus H X X L X Input Output Real-Time A Data to B Bus H H or L X H X Input Output Stored A Data to B Bus X Spec Number 707 518628 Specifications HCTS646MS Absolute Maximum Ratings Reliability Information Supply Voltage (VCC) . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7.0V Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VCC +0.5V DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . . ±10mA DC Drain Current, Any One Output. . . . . . . . . . . . . . . . . . . . . . . ±25mA (All Voltage Reference to the VSS Terminal) Storage Temperature Range (TSTG). . . . . . . . . . . -65oC to +150oC Lead Temperature (Soldering 10sec). . . . . . . . . . . . . . . . . . +265oC Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1 Thermal Resistance θJA θJC SBDIP Package. . . . . . . . . . . . . . . . . . . . 65oC/W 25oC/W Ceramic Flatpack Package . . . . . . . . . . . 89oC/W 24oC/W Maximum Package Power Dissipation at +125oC Ambient SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.77W Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . . . . 0.56W If device power exceeds package dissipation capability, provide heat sinking or derate linearly at the following rate: SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15.4mW/oC Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . 11.2mW/oC CAUTION: As with all semiconductors, stress listed under “Absolute Maximum Ratings” may be applied to devices (one at a time) without resulting in permanent damage. This is a stress rating only. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. The conditions listed under “Electrical Performance Characteristics” are the only conditions recommended for satisfactory device operation. Operating Conditions Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V Input Rise and Fall Times at 4.5V VCC (TR, TF) . . . . . . . 500ns Max Operating Temperature Range (TA) . . . . . . . . . . . . -55oC to +125oC Input Low Voltage (VIL). . . . . . . . . . . . . . . . . . . . . . . . . 0.0V to 0.8V Input High Voltage (VIH) . . . . . . . . . . . . . . . . . . . . . . .VCC/2 to VCC TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS PARAMETER Quiescent Current Output Current (Sink) Output Current (Source) Output Voltage Low Output Voltage High Input Leakage Current Three-State Output Leakage Current Noise Immunity Functional Test TEMPERATURE MIN MAX UNITS 1 +25oC - 40 µA 2, 3 +125oC, -55oC - 750 µA 1 +25oC 7.2 - mA 2, 3 +125oC, -55oC 6.0 - mA 1 +25oC -7.2 - mA 2, 3 +125oC, -55oC -6.0 - mA VCC = 4.5V, VIH = 2.25V, IOL = 50µA, VIL = 0.8V 1, 2, 3 +25oC, +125oC, -55oC - 0.1 V VCC = 5.5V, VIH = 2.75V, IOL = 50µA, VIL = 0.8V 1, 2, 3 +25oC, +125oC, -55oC - 0.1 V VCC = 4.5V, VIH = 2.25V, IOH = -50µA, VIL = 0.8V 1, 2, 3 +25oC, +125oC, -55oC VCC -0.1 - V VCC = 5.5V, VIH = 2.75V, IOH = -50µA, VIL = 0.8V 1, 2, 3 +25oC, +125oC, -55oC VCC -0.1 - V VCC = 5.5V, VIN = VCC or GND 1 +25oC - ±0.5 µA 2, 3 +125oC, -55oC - ±5.0 µA 1 +25oC - ±1 µA 2, 3 +125oC, -55oC - ±50 µA 7, 8A, 8B +25oC, +125oC, -55oC - - - SYMBOL ICC IOL IOH VOL VOH IIN IOZ FN LIMITS GROUP A SUBGROUPS (NOTE 1) CONDITIONS VCC = 5.5V, VIN = VCC or GND VCC = 4.5V, VIH = 4.5V, VOUT = 0.4V, VIL = 0V VCC = 4.5V, VIH = 4.5V, VOUT = VCC - 0.4V, VIL = 0V Applied Voltage = 0V or VCC, VCC = 5.5V VCC = 4.5V, VIH = 2.25V, VIL = 0.8V (Note 2) NOTES: 1. All voltages referenced to device GND. 2. For functional tests, VO ≥ 4.0V is recognized as a logic “1”, and VO ≤ 0.5V is recognized as a logic “0”. Spec Number 708 518628 Specifications HCTS646MS TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS PARAMETER SYMBOL (NOTES 1, 2) CONDITIONS A Data to B Bus (Store) TPLH, TPHL VCC = 4.5V B Data to A Bus (Store) TPLH, TPHL VCC = 4.5V A Data to B Bus TPLH, TPHL VCC = 4.5V TPLH, TPHL VCC = 4.5V TPLH, TPHL VCC = 4.5V TPLZ, TPHZ VCC = 4.5V TPLZ, TPHZ VCC = 4.5V TPZL, TPZH VCC = 4.5V TPZL, TPZH VCC = 4.5V B Data to A Bus Select to Data DIR to Output Enable to Output DIR to Output Enable to Output GROUP A SUBGROUPS LIMITS TEMPERATURE MIN MAX UNITS 9 +25oC 2 31 ns 10, 11 +125oC, -55oC 2 36 ns 9 +25oC 2 32 ns 10, 11 +125oC, -55oC 2 37 ns 9 +25oC 2 24 ns 10, 11 +125oC, -55oC 2 27 ns 9 +25oC 2 24 ns 10, 11 +125oC, -55oC 2 27 ns 9 +25oC 2 30 ns 10, 11 +125oC, -55oC 2 34 ns 9 +25oC 2 28 ns 10, 11 +125oC, -55oC 2 31 ns 9 +25oC 2 28 ns 10, 11 +125oC, -55oC 2 31 ns 9 +25oC 2 28 ns 10, 11 +125oC, -55oC 2 34 ns 9 +25oC 2 30 ns 10, 11 +125oC, -55oC 2 36 ns NOTES: 1. All voltages referenced to device GND. 2. AC measurements assume RL = 500Ω, CL = 50pF, Input TR = TF = 3ns, VIL = GND, VIH = 3V. TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS LIMITS PARAMETER SYMBOL Capacitance Power Dissipation CPD Input Capacitance CIN CONDITIONS NOTES TEMPERATURE MIN MAX UNITS 1 +25oC - 54 pF - 123 pF - 10 pF VCC = 5.0V, f = 1MHz 1 VCC = 5.0V, f = 1MHz Output Transition Time TTHL, TTLH VCC = 4.5V Max Operating Frequency FMAX VCC = 4.5V Setup Time Data to Clock TSU Hold Time Data to Clock TH Pulse Width Clocks TW 1 VCC = 4.5V +25oC o 1 +125 C - 10 pF +25oC - 12 ns - 18 ns - 25 MHz oC, +125 -55oC 1 +25oC 1 +125oC, -55oC - 17 MHz 1 +25oC 12 - ns o o 1 +125 C, -55 C 18 - ns 1 +25oC 5 - ns oC, -55oC 5 - ns 1 +25oC 25 - ns 1 +125oC, -55oC 38 - ns 1 VCC = 4.5V +125 -55oC 1 1 VCC = 4.5V oC, +125 NOTE: 1. The parameters listed in Table 3 are controlled via design or process parameters. Min and Max Limits are guaranteed but not directly tested. These parameters are characterized upon initial design release and upon design changes which affect these characteristics. Spec Number 709 518628 Specifications HCTS646MS TABLE 4. DC POST RADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS PARAMETER Quiescent Current (NOTES 1, 2) CONDITIONS SYMBOL ICC 200K RAD LIMITS TEMPERATURE VCC = 5.5V, VIN = VCC or GND +25 MIN MAX UNITS - 0.75 mA oC Output Current (Sink) IOL VCC = 4.5V, VIN = VCC or GND, VOUT = 0.4V +25o C 6.0 - mA Output Current (Source) IOH VCC = 4.5V, VIN = VCC or GND, VOUT = VCC -0.4V +25oC -6.0 - mA Output Voltage Low VOL VCC = 4.5V or 5.5V, VIH = VCC/2, VIL = 0.8V, IOL = 50µA +25oC - 0.1 V Output Voltage High VOH VCC = 4.5V or 5.5V, VIH = VCC/2, VIL = 0.8V, IOH = -50µA +25oC VCC -0.1 - V Input Leakage Current IIN VCC = 5.5V, VIN = VCC or GND +25oC - ±5 µA Three-State Output Leakage Current IOZ Applied Voltage = 0V or VCC, VCC = 5.5V +25oC - ±50 µA Noise Immunity Functional Test FN VCC = 4.5V, VIH = 2.25V, VIL = 0.8V, (Note 3) +25oC - - - A Data to B Bus (Store) TPLH, TPHL VCC = 4.5V +25oC 2 36 ns B Data to A Bus (Store) TPLH, TPHL VCC = 4.5V +25oC 2 37 ns A Data to B Bus TPLH, TPHL VCC = 4.5V +25oC 2 27 ns B Data to A Bus TPLH, TPHL VCC = 4.5V +25oC 2 27 ns Select to Data TPLH, TPHL VCC = 4.5V +25oC 2 34 ns DIR to Output TPLZ, TPHZ VCC = 4.5V +25oC 2 31 ns Enable to Output TPLZ, TPHZ VCC = 4.5V +25oC 2 31 ns DIR to Output TPZL, TPZH VCC = 4.5V +25oC 2 34 ns Enable to Output TPZL, TPZH VCC = 4.5V +25oC 2 36 ns NOTES: 1. All voltages referenced to device GND. 2. AC measurements assume RL = 500Ω, CL = 50pF, Input TR = TF = 3ns, VIL = GND, VIH = 3V. 3. For functional tests VO ≥ 4.0V is recognized as a logic “1”, and VO ≤ 0.5V is recognized as a logic “0”. TABLE 5. BURN-IN AND OPERATING LIFE TEST, DELTA PARAMETERS (+25oC) GROUP B SUBGROUP DELTA LIMIT ICC 5 12µA IOL/IOH 5 -15% of 0 Hour IOZL/IOZH 5 ±200nA PARAMETER Spec Number 710 518628 Specifications HCTS646MS TABLE 6. APPLICABLE SUBGROUPS CONFORMANCE GROUPS METHOD GROUP A SUBGROUPS Initial Test (Preburn-In) 100%/5004 1, 7, 9 ICC, IOL/H, IOZL/H Interim Test I (Postburn-In) 100%/5004 1, 7, 9 ICC, IOL/H, IOZL/H Interim Test II (Postburn-In) 100%/5004 1, 7, 9 ICC, IOL/H, IOZL/H PDA 100%/5004 1, 7, 9, Deltas Interim Test III (Postburn-In) 100%/5004 1, 7, 9 PDA 100%/5004 1, 7, 9, Deltas Final Test 100%/5004 2, 3, 8A, 8B, 10, 11 Sample/5005 1, 2, 3, 7, 8A, 8B, 9, 10, 11 Subgroup B-5 Sample/5005 1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas Subgroup B-6 Sample/5005 1, 7, 9 Sample/5005 1, 7, 9 Group A (Note 1) Group B Group D READ AND RECORD Subgroups 1, 2, 3, 9, 10, 11 NOTE: 1. Alternate Group A inspection in accordance with Method 5005 of Mil-Std-883 may be exercised. TABLE 7. TOTAL DOSE IRRADIATION TEST CONFORMANCE GROUPS READ AND RECORD METHOD PRE RAD POST RAD PRE RAD POST RAD 5005 1, 7, 9 Table 4 1, 9 Table 4 (Note 1) Group E Subgroup 2 NOTE: Except FN test which will be performed 100% Go/No-Go. TABLE 8. STATIC AND DYNAMIC BURN-IN TEST CONNECTIONS OSCILLATOR GROUND 1/2 VCC = 3V ± 0.5V VCC = 6V ± 0.5V 50kHz 25kHz 1 - 3, 12 - 23 - 24 - - 12 - 1 - 11, 13 - 24 - - 1 - 3, 12, 21, 22 4 - 11 24 23 13 - 20 OPEN STATIC I BURN-IN (Note 1) 4 - 11 STATIC II BURN-IN (Note 1) DYNAMIC BURN-IN (Note 2) NOTES: 1. Each pin except VCC and GND will have a resistor of 10kΩ ± 5% for static burn-in 2. Each pin except VCC and GND will have a resistor of 680Ω ± 5% for dynamic burn-in TABLE 9. IRRADIATION TEST CONNECTIONS OPEN GROUND VCC = 5V ± 0.5V - 12 1 - 11, 13 - 24 NOTE: Each pin except VCC and GND will have a resistor of 47KΩ ± 5% for irradiation testing. Group E, Subgroup 2, sample size is 4 dice/wafer 0 failures. Spec Number 711 518628 HCTS646MS Intersil Space Level Product Flow - ‘MS’ Wafer Lot Acceptance (All Lots) Method 5007 (Includes SEM) 100% Interim Electrical Test 1 (T1) GAMMA Radiation Verification (Each Wafer) Method 1019, 4 Samples/Wafer, 0 Rejects 100% Static Burn-In 2, Condition A or B, 24 hrs. min., +125oC min., Method 1015 100% Nondestructive Bond Pull, Method 2023 100% Interim Electrical Test 2 (T2) Sample - Wire Bond Pull Monitor, Method 2011 100% Delta Calculation (T0-T2) Sample - Die Shear Monitor, Method 2019 or 2027 100% PDA 1, Method 5004 (Notes 1and 2) 100% Internal Visual Inspection, Method 2010, Condition A 100% Dynamic Burn-In, Condition D, 240 hrs., +125oC or Equivalent, Method 1015 100% Delta Calculation (T0-T1) 100% Temperature Cycle, Method 1010, Condition C, 10 Cycles 100% Interim Electrical Test 3 (T3) 100% Constant Acceleration, Method 2001, Condition per Method 5004 100% Delta Calculation (T0-T3) 100% PDA 2, Method 5004 (Note 2) 100% PIND, Method 2020, Condition A 100% Final Electrical Test 100% External Visual 100% Fine/Gross Leak, Method 1014 100% Serialization 100% Radiographic, Method 2012 (Note 3) 100% Initial Electrical Test (T0) 100% Static Burn-In 1, Condition A or B, 24 hrs. min., +125oC min., Method 1015 100% External Visual, Method 2009 Sample - Group A, Method 5005 (Note 4) 100% Data Package Generation (Note 5) NOTES: 1. Failures from Interim electrical test 1 and 2 are combined for determining PDA 1. 2. Failures from subgroup 1, 7, 9 and deltas are used for calculating PDA. The maximum allowable PDA = 5% with no more than 3% of the failures from subgroup 7. 3. Radiographic (X-Ray) inspection may be performed at any point after serialization as allowed by Method 5004. 4. Alternate Group A testing may be performed as allowed by MIL-STD-883, Method 5005. 5. Data Package Contents: • Cover Sheet (Intersil Name and/or Logo, P.O. Number, Customer Part Number, Lot Date Code, Intersil Part Number, Lot Number, Quantity). • Wafer Lot Acceptance Report (Method 5007). Includes reproductions of SEM photos with percent of step coverage. • GAMMA Radiation Report. Contains Cover page, disposition, Rad Dose, Lot Number, Test Package used, Specification Numbers, Test equipment, etc. Radiation Read and Record data on file at Intersil. • X-Ray report and film. Includes penetrometer measurements. • Screening, Electrical, and Group A attributes (Screening attributes begin after package seal). • Lot Serial Number Sheet (Good units serial number and lot number). • Variables Data (All Delta operations). Data is identified by serial number. Data header includes lot number and date of test. • The Certificate of Conformance is a part of the shipping invoice and is not part of the Data Book. The Certificate of Conformance is signed by an authorized Quality Representative. Spec Number 712 518628 HCTS646MS AC Timing Diagrams AC Load Circuit VIH DUT INPUT VS TEST POINT VIL CL TPLH RL TPHL VOH VS OUTPUT CL = 50pF VOL RL = 500Ω VOH TTLH TTHL 80% VOL 20% 80% 20% OUTPUT AC VOLTAGE LEVELS PARAMETER HCTS UNITS VCC 4.50 V VIH 3.00 V VS 1.30 V VIL 0 V GND 0 V Spec Number 713 518628 HCTS646MS Three-State Low Timing Diagrams Three-State Load Circuit VCC VIH VS INPUT RL VIL TPZL TEST POINT DUT TPLZ VOZ CL VT VW OUTPUT VOL CL = 50pF RL = 500Ω THREE-STATE LOW VOLTAGE LEVELS PARAMETER HCTS UNITS VCC 4.50 V VIH 3.00 V VS 1.30 V VT 1.30 V VW 0.90 V 0 V GND Three-State Load Circuit Three-State High Timing Diagrams DUT TEST POINT VIH VS INPUT CL RL VIL TPZH TPHZ VOH CL = 50pF VT RL = 500Ω VW OUTPUT VOZ THREE-STATE HIGH VOLTAGE LEVELS PARAMETER HCTS UNITS VCC 4.50 V VIH 3.00 V VS 1.30 V VT 1.30 V VW 3.60 V 0 V GND Spec Number 714 518628 HCTS646MS Die Characteristics DIE DIMENSIONS: 124 x 110 mils METALLIZATION: Type: SiAl Metal Thickness: 11kÅ ± 1kÅ GLASSIVATION: Type: SiO2 Thickness: 13kÅ ± 2.6kÅ WORST CASE CURRENT DENSITY: <2.0 x 105A/cm2 BOND PAD SIZE: 100µm x 100µm 4 mils x 4 mils Metallization Mask Layout HCTS646MS DIR (3) SAB (2) CAB (1) VCC (24) CBA (23) SBA (22) OE (21) A0 (4) (20) B0 A1 (5) (19) B1 A2 (6) (18) B2 A3 (7) (17) B3 A4 (8) (16) B4 A5 (9) (15) B5 (10) A6 (11) A7 (12) GND (13) B7 (14) B6 NOTE: The die diagram is a generic plot from a similar HCS device. It is intended to indicate approximate die size and bond pad location. The mask series for the HCTS646 is TA14420A. All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com Spec Number 715 518628