DATASHEET

HS-22620RH
Data Sheet
August 1999
Rad Hard Dual, Wideband, High Input
Impedance Uncompensated Operational
Amplifier
File Number
4349.1
Features
• Electrically Screened to SMD # 5962-97512
• QML Qualified per MIL-PRF-38535 Requirements
The HS-22620RH is a radiation hardened, dual bipolar
operational amplifier that features very high input impedance
coupled with wideband AC performance. The high
resistance of the input stage is complemented by low offset
voltage (6mV Max at 25oC) and low bias current (50nA Max
at 25oC) to facilitate accurate signal processing. Offset
voltage can be reduced further by means of an external
nulling potentiometer. The stable closed loop gains greater
than 10, the 20V/µs minimum slew rate at 25oC and the
80kV/V minimum open loop gain at 25oC, enable the
HS-22620RH to perform high gain amplification of very fast,
wideband signals. These dynamic characteristics, coupled
with fast settling times, make these amplifiers ideally suited
to pulse amplification designs as well as high frequency or
video applications. The frequency response of the amplifier
can be tailored to exact design requirements by means of an
external bandwidth control capacitor.
• High Input Impedance . . . . . . . . . . . . . . . . . . 65MΩ (Min)
• High Gain . . . . . . . . . . . . . . . . . . . . . . . . . . . 80kV/V (Min)
• High Slew Rate . . . . . . . . . . . . . . . . . . . . . . 20V/µs (Min)
• Low Input Bias Current . . . . . . . . . . . . . . . . . . 50nA (Max)
• Low Input Offset Voltage . . . . . . . . . . . . . . . . . 6mV (Max)
• Wide Gain Bandwidth Product (AV ≥ 10) . . . . .100MHz (Typ)
• Output Short Circuit Protection
• Total Dose . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 x 105 RAD(Si)
Applications
• Video and RF Amplifiers
• Pulse Amplifiers
• High-Q Active Filters
Specifications for Rad Hard QML devices are controlled
by the Defense Supply Center in Columbus (DSCC). The
SMD numbers listed here must be used when ordering.
• High Speed Comparators
Ordering Information
Detailed Electrical Specifications for these devices are
contained in SMD 5962-97512. A “hot-link” is provided
on our homepage for downloading.
www.intersil.com/spacedefense/space.asp
INTERNAL
MKT. NUMBER
ORDERING NUMBER
TEMP. RANGE
(oC)
5962F9751201V9A
HS0-22620RH-Q
25
5962F9751201VXC
HS9-22620RH-Q
-55 to 125
HS9-22620RH/PROTO
HS9-22620RH/PROTO
-55 to 125
Pinout
HS-22620RH
(FLATPACK)
TOP VIEW
(1) BAL 2A
VCC A (18)
(2) BAL 1A
VEE A (17)
(3) +IN A
(4) -IN A
OUT A (16)
+
-
COMP A (15)
(5) OPEN
(6) -IN B
(7) +IN B
WEB (14)
+
COMP B (13)
OUT B (12)
(8) BAL 1B
VEE B (11)
(9) BAL 2B
VCC B (10)
NOTE: Refer to SMD, Figure 1
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
HS-22620RH
Test Circuits and Waveforms
VAC IN
VAC OUT
+
50Ω
1.8K
50pF
200Ω
FIGURE 1. SIMPLIFIED TEST CIRCUIT (APPLIES TO SMD TABLE 1)
+5.0V
+0.5V
+0.5V
INPUT
+5.0V
∆V
-5.0V
-5.0V
-0.5V
-0.5V
+SL
∆V
OUTPUT
-SL
∆T
SR =
∆V
∆T
∆T
NOTE: Includes stray capacitances.
FIGURE 2. SLEW RATE WAVEFORM
OUTPUT
VFINAL = +400mV
VPEAK
80%
INPUT
20%
0V
+40mV
0V
20%
0V
tr
80%
0V
-40mV
tr, +OS
tf , -OS
tf
NOTE: Measured on both positive and negative transitions. Capacitance at Compensation pin should be minimized.
FIGURE 3. OVERSHOOT, RISE AND FALL TIME WAVEFORMS
2
VPEAK
-400mV
HS-22620RH
Dynamic Burn-In Circuit
HS9-22620RH-Q FLATPACK
V1
R1
1
18
2
17
3
16
+
-
4
FO
15
5
R1
R2
R1
R2
14
6
R1
C1
13
+
7
12
8
11
9
10
C1
V2
NOTES:
1. V1 = +15V ±0.5V.
2. V2 = -15V ±0.5V.
3. R1 = 2.2kΩ, 1/8W min (5%).
4. R2 = 50Ω, 1/8W min (2%).
5. C1 = 0.1µF, 10%, one cap per V per socket.
6. F0 = 10kHz, ±10%, 50% duty cycle.
7. VIH = +100mV ±10mV.
8. VIL = -100mV ±10mV.
Radiation Exposure Circuit
V1
R2
1
18
2
17
3
4
16
+
-
15
5
6
R2
7
8
9
C1
R1
R2
R1
R2
14
+
13
12
C1
11
10
V2
NOTES:
9. V1 = +15V ±0.5V.
10. V2 = -15V ±0.5V.
11. R1 = 2.2kΩ, 1/8W min (5%).
12. R2 = 50Ω, 1/8W min (2%).
13. C1 = 0.1µF, ±10%, one cap per V per socket.
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
3
HS-22620RH
Die Characteristics
DIE DIMENSIONS:
ASSEMBLY RELATED INFORMATION:
145 mils x 116 mils x 19 mils ±1 mil
3670µm x 2950µm x 483µm ±25.4µm
Substrate Potential (Powered Up):
Unbiased Silicon
(WEB pad provided for substrate tie-off.)
INTERFACE MATERIALS:
Glassivation:
ADDITIONAL INFORMATION:
Type: Nitride (S13N4) over Silox (SIO2, 5% Phos.)
Silox Thickness: 12kÅ ±2kÅ
Nitride Thickness: 3.5kÅ ±1.5kÅ
Worst Case Current Density:
<2 x 105 A/cm2
Transistor Count:
Top Metallization:
184
Type: Al, 1% Cu
Thickness: 14kÅ ±2kÅ
Substrate:
Bipolar Bonded Wafer (EBHF)
Backside Finish:
Silicon
Metallization Mask Layout
HS-22620RH
BAL1A
(2)
BAL2A
(1)
VCCA
(18)
VEEA
(17)
+INA (3)
(16) OUTA
-INA (4)
(15) COMPA
(14) WEB
(13) COMPB
-INB (6)
(12) OUTB
+INB (7)
(8)
BAL1B
4
(9)
BAL2B
(10)
VCCB
(11)
VEEB
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