DATASHEET

ACS08MS
Radiation Hardened
Quad 2-Input AND Gate
July 1998
Features
Description
• QML Qualified Per MIL-PRF-38535 Requirements
The Radiation Hardened ACS08MS is a Quad 2-Input AND
Gate. For each gate, a HIGH level on both the A and B
inputs results in a HIGH level on the Y output. A LOW level
on either the A or B input results in a LOW level on the Y
output. All inputs are buffered and the outputs are designed
for balanced propagation delay and transition times.
• 1.25Micron Radiation Hardened SOS CMOS
• Radiation Environment
- Latch-up Free Under any Conditions
- Total Dose . . . . . . . . . . . . . . . . . . . . . . 3 x 105 RAD(Si)
- SEU Immunity . . . . . . . . . . . <1 x 10-10 Errors/Bit/Day
- SEU LET Threshold . . . . . . . . . . . >100MeV/(mg/cm2)
The ACS08MS is fabricated on a CMOS Silicon on
Sapphire (SOS) process, which provides an immunity to
Single Event Latch-up and the capability of highly reliable
performance in any radiation environment. These devices
offer significant power reduction and faster performance
when compared to ALSTTL types.
• Input Logic Levels . . .VIL = (0.3)(VCC), VIH = (0.7)(VCC)
• Output Current . . . . . . . . . . . . . . . . . . . . . . . ±8mA (Min)
• Quiescent Supply Current. . . . . . . . . . . . . 100µA (Max)
Specifications for Rad Hard QML devices are controlled
by the Defense Supply Center in Columbus (DSCC). The
SMD numbers listed below must be used when ordering.
• Propagation Delay . . . . . . . . . . . . . . . . . . . . .15ns (Max)
Applications
Detailed Electrical Specifications for the ACS08 are
contained in SMD 5962-95651. A “hot-link” is provided
on our homepage with instructions for downloading.
www.intersil.com/data/sm/index.asp
• High Speed Control Circuits
• Sensor Monitoring
• Low Power Designs
Ordering Information
ORDERING NUMBER
TEMP. RANGE (oC)
INTERNAL MARKETING NUMBER
5962F9565101VCC
ACS08DMSR
ACS08D/SAMPLE
ACS08D/SAMPLE
5962F9565101VXC
ACS08KMSR
ACS08K/SAMPLE
5962F9565101V9A
PACKAGE
DESIGNATOR
-55 to 125
14 Ld SBDIP
CDIP2-T14
25
14 Ld SBDIP
CDIP2-T14
-55 to 125
14 Ld Flatpack
CDFP4-F14
ACS08K/SAMPLE
25
14 Ld Flatpack
CDFP4-F14
ACS08HMSR
25
Die
N/A
Pinouts
ACS08 (SBDIP)
TOP VIEW
ACS08 (FLATPACK)
TOP VIEW
A1 1
14 VCC
A1
1
14
VCC
B1 2
13 B4
B1
2
13
B4
Y1 3
12 A4
Y1
3
12
A4
A2
4
11
Y4
B2
5
10
B3
Y2
6
9
A3
GND
7
8
Y3
A2 4
11 Y4
B2 5
10 B3
Y2 6
9 A3
GND 7
8 Y3
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
1
File Number
3993.1
ACS08MS
Die Characteristics
PASSIVATION
DIE DIMENSIONS:
Type: Phosphorous Silicon Glass (PSG)
Thickness: 1.30µm ±0.15µm
Size: 2390µm x 2390µm (94 mils x 94 mils)
Thickness: 525µm ±25µm (20.6 mils ±1 mil)
Bond Pad: 110µm x 110µm (4.3 mils x 4.3 mils)
SPECIAL INSTRUCTIONS:
METALLIZATION: Al
Metal 1 Thickness: 0.7µm ±0.1µm
Metal 2 Thickness: 1.0µm ±0.1µm
Bond VCC First
ADDITIONAL INFORMATION:
Worst Case Density: <2.0 x 105 A/cm2
Transistor Count: 176
SUBSTRATE POTENTIAL:
Unbiased Insulator
Metallization Mask Layout
ACS08MS
B1
A1
VCC
B4
Y1
A4
A2
Y4
NC
NC
B2
B3
Y2
GND
Y3
A3
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Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice.
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result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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