AN1465

AN1465
Digitally Addressable Lighting Interface (DALI) Communication
Author:
Shaima Husain
Microchip Technology Inc.
The Digitally Addressable Lighting Interface (DALI) has
emerged as a standard in Europe to address growing
power issues, mostly for commercial and industrial
purposes. DALI is part of the IEC 60929 specification,
and relates specifically to digitally controlled dimmable
fluorescent ballasts. DALI type ballasts can run at lower
power levels than standard magnetic ballasts.
Commercial development of DALI started around 1998.
DALI consists of a two-wire serial bus and requires a
special DALI power supply. The Master sends 16-bit
Manchester encoded data packets, and the ballasts
can respond with an 8-bit Manchester encoded data
packet. Multi-Masters are allowed, and two Masters
can share the same ballast. There are 64 channels, or
individual addresses, available for the ballasts to be
connected to one interface line. Each DALI bus can
have 16 groups at the maximum, and there are 16
scenes available. There is no error checking in the
DALI protocol. This application note describes the
basic communication between the control device and
the control gear, which includes explanation of
electrical specifications, timing, packet formats and
Manchester encoding/decoding.
FIGURE 1:
TERMINOLOGY
• Control Gear: Ballast or Sensor/Receiver
• Control Device: Controller/Transmitter
• Forward Frame: Packet sent from the control
device to the control gear
• Backward Frame: Response packet sent from
the control gear to the control device
• Short Address: Address of an individual control
gear in the system
• Group Address: Address to a group of control
gear
• Broadcast: Address used to address all the
control gears at once
• Direct Arc Power: Power level sent to an individual ballast or sent as a broadcast to all control
gear, to immediately set the lamps to that power
level
PHYSICAL LAYER
Topology
Unlike analog systems, DALI does not require any hardwired power circuit control groups. The combination of
individual ballast addressing with digital switching
eliminates vertical switch wiring. DALI has a free-form
layout (Figure 1). Daisy chain, star topology and multidrop are all allowed. A combination of two or more
topologies is also allowed.
DALI FREE-FORM LAYOUT
 2012 Microchip Technology Inc.
DS01465A-page 1
AN1465
Electrical Specifications
FIGURE 2:
The physical low level or active state for DALI has been
defined with the interface voltage of < 9.5V. The highlevel condition, or DALI idle, is an interface voltage
between 9.5V to 22.5V, most common being 16V.
Maximum system current is limited to 250 mA.
Response time of the current limiter circuit is < 10 µs.
Each component connected to the interface may
consume a maximum of 2 mA. Connectors are nonpolarized at the receiver. DALI is usually optically
isolated from the microcontroller and has a data
transfer rate of 1200 bits per second.
DALI ELECTRICAL
SPECIFICATIONS
Connectors
There are no specific connectors dedicated for the
DALI interface. Two-wire connectors with common
screw terminals or push fit suffice (Figure 3).
FIGURE 3:
TWO-WIRE CONNECTORS
Cabling
Due to the transmission rate, there is no need for special cables or wires. Two-wire standard electrical
cables can get the job done. 18 AWG, class 1 or 2
cables (solid or stranded) are commonly used on many
fixtures. They are often purple in color and usually
rated 600V. A maximum voltage drop of up to 2V is
allowed across the connecting wires from the interface
supply to each system component. The maximum
distance between two communicating units should be
300 meters (984 feet).
DALI CIRCUITS
There is no specification or recommendations on how
to implement the circuit design for DALI. The following
optically isolated circuit interfaces a PIC16F1947 to the
DALI bus.
DS01465A-page 2
 2012 Microchip Technology Inc.
AN1465
FIGURE 4:
ISOLATED COMMUNICATIONS CIRCUIT
FIGURE 5:
ISOLATED COMMUNICATIONS CIRCUIT DIAGRAM
DALI BUS
4
2
4
1
U2
R4
+5V
R6
2.2K
1
3
1
R5
330R
D4
MM5Z5V1
D5
U1
4
Q2
MMBT2222A-TP
DALI TX
(Any GPIO)
2
3
TCLT1000
120R
R7
R8
10K
1K
DALI RX
(Interrupt Pin)
BGX 50A E6327
2
3
TCLT1000
DALI Power Supply Circuits
DALI Transmission
DALI power supply needs fast response time and
efficient current limiting. This simple circuit works well.
DALI uses Manchester (bi-phase) encoding to send the
Start bit and the information bits. The information rate
is 1200 bps with an acceptable range of ± 10%. One bit
time is 833.33 µs. The Most Significant bit (MSb) is sent
out first (Figure 7).
FIGURE 6:
CIRCUIT
+12-22V DC
Out DALI+ (D)
 2012 Microchip Technology Inc.
DS01465A-page 3
AN1465
FIGURE 7:
DALI TRANSMISSION
Forward Frame (control device –› control
gear)
Forward frame is the packet sent by the control device
to the control gear. It consists of one Start bit, eight
address bits, eight data bits and two Stop bits. The bits
are sent MSb first.
FIGURE 8:
FORWARD FRAME
s = Start bit which is a logical 1
YAAA AAAS = Address byte
XXXX XXXX = Data byte
I = Stop bit (Idle line)
DS01465A-page 4
 2012 Microchip Technology Inc.
AN1465
Addressing scheme for Address byte ‘YAAA AAAS’:
Y = 0 indicate individual or short address.
Address byte for Short Address: 0AAA AAAS (0-63)
Y = 1 indicate group address or broadcast.
Address byte for group address: 100A AAAS (0-15)
Address byte for broadcast: 1111 111S
S = Selector bit:
If ‘0’ data byte = direct arc power level
If ‘1’ data byte = command
Special Commands:
1010 0000 to 1111 1101
Backward Frame (control gear –› control
device)
Backward frame is the response packet sent by the
control gear back to the control device. It consists of
one Start bit, eight data bits and two Stop bits. The bits
are sent MSb first.
FIGURE 9:
BACKWARD FRAME
s = Start bit, which is a logical 1
Timing
XXXX XXXX = Data byte
As mentioned previously, the bit transfer rate for DALI
is 1200 bits per second with room for an error of ±10%.
‘Te’ is used to indicate half-bit time, which is 416.67 µs.
A forward packet lasts for 38 Te, which is equal to 15.83
ms. A backward frame takes 22 Te or 9.17 msec. The
time between two consecutive forward frames is at
least 22 Te. The time between forward frame and backward frame is greater than or equal to 7 Te, and less
than or equal to 22 Te. The time between backward
frame and forward frame is at least 22 Te.
I = Stop bit (Idle line)
Backward frame data byte: In a response frame
(Backward frame) ‘0xFF’ is considered a ‘Yes’. If a
response is expected and the line stays Idle, response
is considered a ‘No’ from the control gear. Other values
vary depending on the command the control gear is
responding to.
FIGURE 10:
FRAME TIMING
 2012 Microchip Technology Inc.
DS01465A-page 5
AN1465
Manchester Encoding/Decoding
Any packet sent between the control device and control
gear is a bi-phase Manchester encoded packet. The
packet is then decoded, and the address and
messages are then processed accordingly. Our lighting
communication board has a PIC16F1947 microcontroller unit along with an isolated DALI communication
circuit interface and a simple power supply. Please see
“Appendix A” for the schematic details.
1
0
bit-time
Since the signal from the DALI bus is inverted by the
opto-coupler, the following explanation is how the PIC®
microcontroller views the Manchester encoding/decoding.
Manchester Encoding
The outgoing message is encoded using Timer1, and
the packet is sent out using the RC5 pin. An interrupt is
generated using Timer1 every Te, which is 416.67 µs.
Te is the half-bit time, and this is where we want to
change the phase of the signal. If we were sending out
a ‘1’ as our bit, the first half is ‘1’ and at the interrupt the
signal is reversed and vice versa. As a result, the output is a Manchester encoded packet, ready to be
decoded by the control gear if sent by the control
device, or decoded by the control device if sent as a
response by the control gear back to the control device.
The Manchester code is a digital encoding format in
which symbol ‘1’ is represented by a falling edge (high
followed by low), and symbol ‘0’ is represented by a
rising edge (low followed by high). Both the high and
low pulses have equal width, which is equal to half the
bit period.
FIGURE 12:
MANCHESTER
ENCODING OF A BIT
FIGURE 11:
MANCHESTER ENCODING
IDLE
1
1
0
1
0
0
1
0
IDLE
CLK
Signal
Manchester
encoded
DS01465A-page 6
 2012 Microchip Technology Inc.
AN1465
Sample Code
EXAMPLE 1:
void TransmitFrame(void)
{
static uint8_t bitcount = 0;
if (TxFlag.TransmitMode && TE_TMR_INT_ENABLE)
{
switch (makeframe)
{
case start:
......................................
......................................
break;
case alldata:
if (TxFlag.Secondhalf)
{
DATA_OUT ^= 1;
TxFlag.Secondhalf = CLEAR;
bitcount++;
if (bitcount > 15)
{
makeframe=stop;
bitcount = 0;
}
}
else
{
if (FwdFrame.Word & 0x8000) DATA_OUT = DALI_LO;
else DATA_OUT=DALI_HI;
FwdFrame.Word <<= 1;
TxFlag.Secondhalf = SET;
makeframe=alldata;
}
break;
case stop:
..........................................
..........................................
break;
..........................................
..........................................
}
 2012 Microchip Technology Inc.
DS01465A-page 7
AN1465
Manchester Decoding
Manchester decoding is more complicated than
Manchester encoding. As the reception starts, the
receiver, whether it be the control gear or the control
device, makes sure the packet is received in its entirety
starting with the Start bit, then an 8- or 16-bit message
and, finally, at least two idles to indicate the Stop bit.
The decoding is done using the external interrupt pin
RB0 on the PIC16F1947. This pin is specially used to
generate an interrupt every time the phase of the
incoming signal changes. Timer1 is used to generate
interrupt every 3/4th of the bit, so the value is measured
at that point, and that decides whether the bit is a ‘0’ or
a ‘1’. Timer1 is reset and reloaded in the middle of the
bit when the external interrupt happens, and that keeps
the error due to drifting in check.
MANCHESTER DECODING
FIGURE 13:
0
1
1
0
0
Manchester
encoded
¾ bit-time
¾ bit-time
¾ bit-time
¾ bit-time
Manchester
decoded
0
DS01465A-page 8
1
1
0
0
 2012 Microchip Technology Inc.
AN1465
Sample Code
EXAMPLE 2:
void ReceiveFrame(void)
{
static uint16_t count = 0;
static uint16_t HalfBitTime=0;
static uint16_t LoadHalfBitTime=0;
if (RxFlag.ReceiveMode)
{
switch (makeframe)
{
case start:
............................
............................
break;
case address:
if (count <= 7)
{
if (TE_TMR_INT_ENABLE && TE_TMR_INT_FLAG)
{
TE_TMR_INT_FLAG = CLEAR;
TE_TMR_ON=CLEAR;
receivebuff <<= 1;
if (DATA_IN_INT== DALI_LO)
{
SET_INT_FALLING_EDGE();
receivebuff |= 0x01;
}
else SET_INT_RISING_EDGE();
TE_TMR_INT_ENABLE = CLEAR;
TE_TMR_ON = CLEAR;
EDGE_INT_ENABLE= SET;
}
else if (EDGE_INT_ENABLE)
{
EDGE_INT_ENABLE = CLEAR;
TE_TMR_INT_ENABLE = SET;
TE_TMR_VALUE = TMRLoadVal;
TE_TMR_ON = SET;
count++;
}
else
{
RxFlag.Error = SET;
RxFlag.ListenMode = SET;
break;
}
if (count <= 7)
makeframe = address;
else
{
count = 0;
makeframe = data;
EDGE_INT_ENABLE = CLEAR;
EDGE_INT_FLAG = CLEAR;
TE_TMR_INT_ENABLE = SET;
TE_TMR_VALUE = TMRLoadVal;
TE_TMR_ON = SET;
FwdFrame.Byte.Address = receivebuff;
receivebuff = CLEAR;
}
}
break;
.............................................
.............................................
}
 2012 Microchip Technology Inc.
DS01465A-page 9
AN1465
CONCLUSION
The DALI circuit with simple power supply and
Manchester encoded/decoded communication implemented using PIC16F1947 along with the ‘C’ code,
provides a solid foundation for implementing DALI
commissioning and commands for both the control
device, as well as the control gear.
REFERENCES:
[1] International Standard CEI IEC 60929, Third
edition 2006-01
[2] International Standard IEC 62386-101, Edition
1.0 2009-06
[3] International Standard IEC 62386-102, Edition
1.0 2009-06
DS01465A-page 10
 2012 Microchip Technology Inc.
IN
LOOP
IN
J6
1
2
J9
1
2
ED130/2DS EDSTL130/02
TB2
ED130/2DS EDSTL130/02
DALI Bus
TB1
RJSSE-5080-02
J3
1
3
2
J1
U2
3
4
TCLT1000
2
1
R6
2.2K
D4
MM5Z5V1
2
4
6
8
10
12
14
16
INT/RB0
DALI IN
R8
1K
10K
120R
R4
1K
1/4W
R3
PZT2222A
Q1
3
D3
U1
2
1
BAV99-7-F
TCLT1000
4
1
10R
1W
R2
2
330R
R5
J4
INT/RB0 DALI IN
+5V DALI LIMITED CURRENT SUPPLY
Q2
MMBT2222A-TP
P1
R1
0R
R7
+5V
Polarized 1
3
DALI OUT SDO/RC5
5
7
9
11
13
15
SUPPLY
POWER
BGX 50A E6327
1
D5
SS23-TP
D1
POWER
LOOP
1
2
LOOP
3
TX+ B1
TX- B2
RX+ B3
B4
B5
RX- B6
GND B7
GND B8
A1
TX+
TX- A2
A3
RX+
A4
A5
A6
RXGND A7
GND A8
2
4
1
 2012 Microchip Technology Inc.
2
SDO/RC5 DALI OUT
J5
FIGURE 14:
1
2
J2
AN1465
APPENDIX A
DALI SCHEMATICS
DS01465A-page 11
AN1465
NOTES:
DS01465A-page 12
 2012 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
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Printed on recycled paper.
ISBN: 9781620765715
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 2012 Microchip Technology Inc.
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DS01465A-page 13
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DS01465A-page 14
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