DATASHEET

ACTS240MS
High Reliability, Radiation Hardened
Octal Buffer/Line Driver, Three-State
January 1996
tle
TS
MS
-
Features
Pinouts
• Devices QML Qualified in Accordance with MIL-PRF-38535
20 PIN CERAMIC DUAL-IN-LINE
MIL-STD-1835 DESIGNATOR CDIP2-T20,
LEAD FINISH C
TOP VIEW
• Detailed Electrical and Screening Requirements are Contained in
SMD# 5962-96717 and Intersil’s QM Plan
• 1.25 Micron Radiation Hardened SOS CMOS
h
ity,
iadl
er/
er,
ee)
hor
• Total Dose . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . >300K RAD (Si)
• Single Event Upset (SEU) Immunity: <1 x
(Typ)
10-10
Errors/Bit/Day
• SEU LET Threshold . . . . . . . . . . . . . . . . . . . . . . . >100 MEV-cm2/mg
• Dose Rate Upset . . . . . . . . . . . . . . . . >1011 RAD (Si)/s, 20ns Pulse
• Dose Rate Survivability . . . . . . . . . . . >1012 RAD (Si)/s, 20ns Pulse
• Latch-Up Free Under Any Conditions
pon,
ior,
ia-
1
20 VCC
AI1
2
19 BEN
BO4
3
18 AO1
AI2
4
17 BI4
BO3
5
16 AO2
AI3
6
15 BI3
BO2
7
14 AO3
AI4
8
13 BI2
BO1
9
12 AO4
GND 10
• Military Temperature Range . . . . . . . . . . . . . . . . . . -55oC to +125oC
11 BI1
• Significant Power Reduction Compared to ALSTTL Logic
• DC Operating Voltage Range . . . . . . . . . . . . . . . . . . . . 4.5V to 5.5V
20 PIN CERAMIC FLATPACK
MIL-STD-1835 DESIGNATOR CDFP4-F20,
LEAD FINISH C
TOP VIEW
• Input Logic Levels
- VIL = 0.8V Max
- VIH = VCC/2 Min
• Input Current ≤ 1µA at VOL, VOH
ds
r-
AEN
• Fast Propagation Delay . . . . . . . . . . . . . . . 17.5ns (Max), 12ns (Typ)
Description
The Intersil ACTS240MS is a Radiation Hardened High Reliability, HighSpeed CMOS/SOS having two active low enable inputs.
The ACTS240MS utilizes advanced CMOS/SOS technology to achieve
high-speed operation. This device is a member of a radiation hardened,
high-speed, CMOS/SOS Logic Family.
AEN
1
20
VCC
AI1
2
19
BEN
BO4
3
18
AO1
AI2
4
17
BI4
BO3
5
16
AO2
AI3
6
15
BI3
BO2
7
14
AO3
AI4
8
13
BI2
BO1
9
12
AO4
GND
10
11
BI1
The ACTS240MS is supplied in a 20 lead Ceramic Flatpack (K suffix) or
a Dual-In-Line Ceramic Package (D suffix).
Ordering Information
d,
PART NUMBER
TEMPERATURE RANGE
SCREENING LEVEL
PACKAGE
5962F9671701VRC
-55oC to +125oC
MIL-PRF-38535 Class V
20 Lead SBDIP
5962F9671701VXC
-55oC to +125oC
MIL-PRF-38535 Class V
20 Lead Ceramic Flatpack
ACTS240D/Sample
25oC
Sample
20 Lead SBDIP
ACTS240K/Sample
25oC
Sample
20 Lead Ceramic Flatpack
ACTS240HMSR
25oC
Die
Die
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
1
Spec Number
File Number
518783
3186.1
ACTS240MS
Functional Diagram
NOTE: (1 of 2)
AE
1(19)
P
AO1
N 18(9)
AI1
2(11)
P
AO2
N 16(7)
AI2
4(13)
P
AO3
N 14(5)
AI3
6(15)
P
AO4
N 12(3)
AI4
8(17)
TRUTH TABLE
INPUTS
OUTPUT
AE, BE
AIn, BIn
AOn, BOn
L
L
H
L
H
L
H
X
Z
NOTE: H = High Voltage Level, L = Low Voltage Level,
X = Immaterial, Z = High Impedance
Spec Number
2
518783
ACTS240MS
Die Characteristics
DIE DIMENSIONS:
100 mils x 100 mils
2.54mm x 2.54mm
METALLIZATION:
Type: AlSi
Metal 1 Thickness: 7.125kÅ ±1.125kÅ
Metal 2 Thickness: 9kÅ ±1kÅ
GLASSIVATION:
Type: SiO2
Thickness: 8kÅ ±1kÅ
WORST CASE CURRENT DENSITY:
< 2.0 x 105A/cm2
BOND PAD SIZE:
110µm x 110µm
4.4 mils x 4.4 mils
Metallization Mask Layout
ACTS240MS
AI1
(2)
AEN
(1)
VCC
(20)
VCC
(20)
BEN
(19)
(18) AO1
BO4 (3)
(17) BI4
AI2 (4)
(16) AO2
BO3 (5)
(15) BI3
AI3 (6)
(14) AO3
BO2 (7)
(13) BI2
AI4 (8)
BO1 (9)
AO4 (12)
(10) (10)
GND GND
(11)
BI1
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice.
Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may
result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
Spec Number
3
518783
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