CD4514BMS CD4515BMS CMOS 4-Bit Latch/4-to-16 Line Decoders July 14, 2006 Features Pinout • High-Voltage Types (20-Volt Rating) CD4514BMS, CD4515BMS TOP VIEW • CD4514BMS Output “High” on Select • CD4515BMS Output “Low” on Select 24 VDD STROBE 1 DATA 1 2 23 INHIBIT DATA 2 3 22 DATA 4 S7 4 21 DATA 3 • 100% Tested for Quiescent Current at 20V S6 5 20 S10 • Maximum Input Current of 1µA at 18V Over Full Package Temperature Range; 100nA at 18V and 25oC S5 6 19 S11 S4 7 18 S8 S3 8 17 S9 S1 9 16 S14 S2 10 15 S15 S0 11 14 S12 VSS 12 13 S13 • Strobed Input Latch • Inhibit Control • Noise Margin (Full Package-Temperature Range): - 1V at VDD = 5V - 2V at VDD = 10V - 2.5V at VDD = 15V • 5V, 10V, and 15V Parametric Ratings • Standardized, Symmetrical Output Characteristics • Meets all Requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of ‘B’ Series CMOS Devices" Functional Diagram Applications VDD = 24 VSS = 12 • Digital Multiplexing • Address Decoding • Hexadecimal/BCD Decoding DATA 1 2 DATA 2 3 DATA 3 21 DATA 4 22 • Program-counter Decoding • Control Decoder Description CD4514BMS and CD4515BMS consist of a 4-bit strobed latch and a 4-to-16-line decoder. The latches hold the last input data presented prior to the strobe transition from 1 to 0. Inhibit control allows all outputs to be placed at 0(CD4514BMS) or 1(CD4515BMS) regardless of the state of the data or strobe inputs. STROBE 1 INHIBIT 23 LATCH A B C D 4 TO 16 DECODER 11 9 10 8 7 6 5 4 18 17 20 19 14 13 16 15 S0 S1 S2 S3 S4 S5 S6 S7 S8 S9 S10 S11 S12 S13 S14 S15 The decode truth table indicates all combinations of data inputs and appropriate selected outputs. These devices are similar to industry types MC14514 and MC14515. The CD4514BMS and CD4515BMS are supplied in these 24 lead outline packages: Braze Seal DIP Frit Seal DIP Ceramic Flatpack H4V H1Z H4P CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Copyright © Intersil Corporation 1999, 2006 1 FN3195.1 Specifications CD4514BMS, CD4515BMS Absolute Maximum Ratings Reliability Information DC Supply Voltage Range, (VDD) . . . . . . . . . . . . . . . -0.5V to +20V (Voltage Referenced to VSS Terminals) Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VDD +0.5V DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . . ±10mA Operating Temperature Range. . . . . . . . . . . . . . . . -55oC to +125oC Package Types D, F, K, H Storage Temperature Range (TSTG). . . . . . . . . . . -65oC to +150oC Lead Temperature (During Soldering) . . . . . . . . . . . . . . . . . +265oC At Distance 1/16 ± 1/32 Inch (1.59mm ± 0.79mm) from case for 10s Maximum Thermal Resistance . . . . . . . . . . . . . . . . θja θjc Ceramic DIP and FRIT Package . . . . . 80oC/W 20oC/W Flatpack Package . . . . . . . . . . . . . . . . 70oC/W 20oC/W o Maximum Package Power Dissipation (PD) at +125 C For TA = -55oC to +100oC (Package Type D, F, K). . . . . . 500mW For TA = +100oC to +125oC (Package Type D, F, K) . . . . . Derate Linearity at 12mW/oC to 200mW Device Dissipation per Output Transistor . . . . . . . . . . . . . . . 100mW For TA = Full Package Temperature Range (All Package Types) Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS PARAMETER Supply Current Input Leakage Current Input Leakage Current SYMBOL IDD IIL IIH CONDITIONS (NOTE 1) VDD = 20V, VIN = VDD or GND LIMITS GROUP A SUBGROUPS TEMPERATURE MIN MAX UNITS 1 +25oC - 10 µA o 2 +125 C - 1000 µA VDD = 18V, VIN = VDD or GND 3 -55oC - 10 µA VIN = VDD or GND 1 +25oC -100 - nA 2 +125oC -1000 - nA VDD = 18V 3 -55oC -100 - nA VDD = 20 1 +25oC - 100 nA 2 +125oC - 1000 nA - 100 nA - 50 mV VIN = VDD or GND VDD = 20 VDD = 18V -55oC 3 oC, +125oC, -55oC Output Voltage VOL15 VDD = 15V, No Load 1, 2, 3 +25 Output Voltage VOH15 VDD = 15V, No Load (Note 3) 1, 2, 3 +25oC, +125oC, -55oC 14.95 - V Output Current (Sink) IOL5 VDD = 5V, VOUT = 0.4V 1 +25oC 0.53 - mA Output Current (Sink) IOL10 VDD = 10V, VOUT = 0.5V 1 +25oC 1.4 - mA oC Output Current (Sink) IOL15 VDD = 15V, VOUT = 1.5V 1 +25 3.5 - mA Output Current (Source) IOH5A VDD = 5V, VOUT = 4.6V 1 +25oC - -0.53 mA Output Current (Source) IOH5B VDD = 5V, VOUT = 2.5V 1 +25oC - -1.8 mA Output Current (Source) IOH10 VDD = 10V, VOUT = 9.5V 1 +25oC - -1.4 mA o Output Current (Source) IOH15 VDD = 15V, VOUT = 13.5V 1 +25 C - -3.5 mA N Threshold Voltage VNTH VDD = 10V, ISS = -10µA 1 +25oC -2.8 -0.7 V P Threshold Voltage VPTH VSS = 0V, IDD = 10µA 1 +25oC 0.7 2.8 V VDD = 2.8V, VIN = VDD or GND 7 +25oC Functional F o VDD = 20V, VIN = VDD or GND 7 +25 C VDD = 18V, VIN = VDD or GND 8A +125oC VDD = 3V, VIN = VDD or GND 8B -55oC VOH > VOL < VDD/2 VDD/2 V Input Voltage Low (Note 2) VIL VDD = 5V, VOH > 4.5V, VOL < 0.5V 1, 2, 3 +25oC, +125oC, -55oC - 1.5 V Input Voltage High (Note 2) VIH VDD = 5V, VOH > 4.5V, VOL < 0.5V 1, 2, 3 +25oC, +125oC, -55oC 3.5 - V Input Voltage Low (Note 2) VIL VDD = 15V, VOH > 13.5V, VOL < 1.5V 1, 2, 3 +25oC, +125oC, -55oC - 4 V Input Voltage High (Note 2) VIH VDD = 15V, VOH > 13.5V, VOL < 1.5V 1, 2, 3 +25oC, +125oC, -55oC 11 - V NOTES: 1. All voltages referenced to device GND, 100% testing being implemented. 2. Go/No Go test with limits applied to inputs. 2 3. For accuracy, voltage is measured differentially to VDD. Limit is 0.050V max. Specifications CD4514BMS, CD4515BMS TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS PARAMETER Propagation Delay Strobe or Data SYMBOL TPHL1 TPLH1 CONDITIONS (NOTE 1, 2) GROUP A SUBGROUPS TEMPERATURE VDD = 5V, VIN = VDD or GND 10, 11 Propagation Delay Inhibit TPHL2 TPLH2 VDD = 5V, VIN = VDD or GND Transition Time TTHL TTLH VDD = 5V, VIN = VDD or GND +25oC 9 +125 -55oC +25oC 9 10, 11 oC, +125oC, -55oC LIMITS MIN MAX UNITS - 970 ns - 1310 ns - 500 ns - 675 ns 9 +25oC - 200 ns 10, 11 +125oC, -55oC - 270 ns NOTES: 1. CL = 50pF, RL = 200K, Input TR, TF < 20ns. 2. -55oC and +125oC limits guaranteed, 100% testing being implemented. TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS LIMITS PARAMETER Supply Current SYMBOL IDD CONDITIONS VDD = 5V, VIN = VDD or GND NOTES TEMPERATURE MIN MAX UNITS 1, 2 -55oC, +25oC - 5 µA - 150 µA +125 VDD = 10V, VIN = VDD or GND VDD = 15V, VIN = VDD or GND 1, 2 1, 2 oC o o -55 C, +25 C - 10 µA +125oC - 300 µA oC, - 10 µA -55 +25oC o +125 C - 600 µA Output Voltage VOL VDD = 5V, No Load 1, 2 +25oC, +125oC, -55oC - 50 mV Output Voltage VOL VDD = 10V, No Load 1, 2 +25oC, +125oC, -55oC - 50 mV Output Voltage VOH VDD = 5V, No Load 1, 2 +25oC, +125oC, -55oC 4.95 - V Output Voltage VOH VDD = 10V, No Load 1, 2 +25oC, +125oC, -55oC 9.95 - V Output Current (Sink) IOL5 VDD = 5V, VOUT = 0.4V 1, 2 +125oC 0.36 - mA -55 C 0.64 - mA +125oC 0.9 - mA 1.6 - mA o Output Current (Sink) IOL10 VDD = 10V, VOUT = 0.5V 1, 2 -55 Output Current (Sink) Output Current (Source) IOL15 IOH5A VDD = 15V, VOUT = 1.5V 1, 2 VDD = 5V, VOUT = 4.6V 1, 2 o +125 C 2.4 - mA -55oC 4.2 - mA +125oC - -0.36 mA - -0.64 mA - -1.15 mA - -2.0 mA - -0.9 mA - -1.6 mA -55 Output Current (Source) IOH5B VDD = 5V, VOUT = 2.5V 1, 2 IOH10 VDD = 10V, VOUT = 9.5V 1, 2 oC +125oC -55 Output Current (Source) oC oC +125oC o -55 C Output Current (Source) IOH15 VDD =15V, VOUT = 13.5V 1, 2 oC - -2.4 mA -55oC - -4.2 mA +125 Input Voltage Low VIL VDD = 10V, VOH > 9V, VOL < 1V 1, 2 +25oC, +125oC, -55oC - 3 V Input Voltage High VIH VDD = 10V, VOH > 9V, VOL < 1V 1, 2 +25oC, +125oC, -55oC +7 - V 3 Specifications CD4514BMS, CD4515BMS TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued) LIMITS PARAMETER SYMBOL CONDITIONS NOTES TEMPERATURE MIN MAX UNITS 1, 2, 3 +25oC - 370 ns Propagation Delay Strobe or Datat TPHL1 TPLH1 VDD = 10V VDD = 15V 1, 2, 3 +25 C - 270 ns Propagation Delay Inhibit TPHL2 TPLH2 VDD = 10V 1, 2, 3 +25oC - 220 ns o - 170 ns o Transition Time Minimum Data Setup Time Minimum Strobe Pulse Width VDD = 15V TTHL TTLH TS VDD = 10V 1, 2, 3 +25 C - 100 ns VDD = 15V 1, 2, 3 +25oC - 80 ns o - 150 ns o CIN +25 C 1, 2, 3 VDD = 10V 1, 2, 3 +25 C - 70 ns VDD = 15V 1, 2, 3 +25oC - 40 ns o VDD = 5V 1, 2, 3 +25 C - 250 ns VDD = 10V 1, 2, 3 +25oC - 100 ns 1, 2, 3 +25 oC - 75 ns +25 oC - 7.5 pF VDD = 15V Input Capacitance +25 C 1, 2, 3 VDD = 5V TW o Any Input 1, 2 NOTES: 1. All voltages referenced to device GND. 2. The parameters listed on Table 3 are controlled via design or process and are not directly tested. These parameters are characterized on initial design release and upon design changes which would affect these characteristics. 3. CL = 50pF, RL = 200K, Input TR, TF < 20ns. TABLE 4. POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS LIMITS PARAMETER Supply Current N Threshold Voltage SYMBOL IDD VNTH N Threshold Voltage Delta ∆VTN P Threshold Voltage VTP P Threshold Voltage Delta Functional ∆VTP F CONDITIONS NOTES VDD = 20V, VIN = VDD or GND VDD = 10V, ISS = -10µA TEMPERATURE MIN MAX UNITS o - 25 µA o -2.8 -0.2 V o +25 C 1, 4 +25 C 1, 4 VDD = 10V, ISS = -10µA 1, 4 +25 C - ±1 V VSS = 0V, IDD = 10µA 1, 4 +25oC 0.2 2.8 V 1, 4 oC - ±1 V VSS = 0V, IDD = 10µA VDD = 18V, VIN = VDD or GND +25 1 +25oC VOH > VDD/2 VOL < VDD/2 V 1, 2, 3, 4 +25oC - 1.35 x +25oC Limit ns VDD = 3V, VIN = VDD or GND Propagation Delay Time TPHL TPLH VDD = 5V 3. See Table 2 for +25oC limit. NOTES: 1. All voltages referenced to device GND. 2. CL = 50pF, RL = 200K, Input TR, TF < 20ns. 4. Read and Record TABLE 5. BURN-IN AND LIFE TEST DELTA PARAMETERS +25oC PARAMETER Supply Current - MSI-2 Output Current (Sink) Output Current (Source) SYMBOL DELTA LIMIT IDD ± 1.0µA IOL5 ± 20% x Pre-Test Reading IOH5A ± 20% x Pre-Test Reading 4 Specifications CD4514BMS, CD4515BMS TABLE 6. APPLICABLE SUBGROUPS MIL-STD-883 METHOD GROUP A SUBGROUPS Initial Test (Pre Burn-In) 100% 5004 1, 7, 9 IDD, IOL5, IOH5A Interim Test 1 (Post Burn-In) 100% 5004 1, 7, 9 IDD, IOL5, IOH5A IDD, IOL5, IOH5A CONFORMANCE GROUP Interim Test 2 (Post Burn-In) PDA (Note 1) Interim Test 3 (Post Burn-In) PDA (Note 1) Final Test 1, 7, 9 1, 7, 9, Deltas 100% 5004 1, 7, 9 100% 5004 1, 7, 9, Deltas IDD, IOL5, IOH5A 100% 5004 2, 3, 8A, 8B, 10, 11 Sample 5005 1, 2, 3, 7, 8A, 8B, 9, 10, 11 Subgroup B-5 Sample 5005 1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas Subgroup B-6 Sample 5005 1, 7, 9 Sample 5005 1, 2, 3, 8A, 8B, 9 Group A Group B 100% 5004 100% 5004 Group D READ AND RECORD Subgroups 1, 2, 3, 9, 10, 11 Subgroups 1, 2 3 NOTE: 1. 5% Parameteric, 3% Functional; Cumulative for Static 1 and 2. TABLE 7. TOTAL DOSE IRRADIATION CONFORMANCE GROUPS Group E Subgroup 2 TEST READ AND RECORD MIL-STD-883 METHOD PRE-IRRAD POST-IRRAD PRE-IRRAD POST-IRRAD 5005 1, 7, 9 Table 4 1, 9 Table 4 TABLE 8. BURN-IN AND IRRADIATION TEST CONNECTIONS OSCILLATOR FUNCTION OPEN GROUND VDD Static Burn-In 1 (Note 1) 4-11, 13-20 1-3, 12, 21-23 24 Static Burn-In 2 (Note 1) 4-11, 13-20 12 1-3, 21-24 Dynamic BurnIn (Note 1) - 2, 3, 12 21, 22, 24 9V ± -0.5V 50kHz 25kHz 4-11, 13-20 1 23 Irradiation (Note 2) NOTES: 1. Each pin except VDD and GND will have a series resistor of 10K ± 5%, VDD = 18V ± 0.5V 2. Each pin except VDD and GND will have a series resistor of 47K ± 5%; Group E, Subgroup 2, sample size is 4 dice/wafer, 0 failures, VDD = 10V ± 0.5V 5 CD4514BMS, CD4515BMS Logic Diagram A B C D VDD A B C D A B C D A B C D VSS DATA 1 2 DATA 2 3 A B C D * S Q R Q * S Q R Q S Q R Q S Q R Q * DATA 3 21 * DATA 4 22 STROBE 1 A A B C D A B C D B A B C D A B C D A B C D C A B C D A B C D D A B C D * A B C D * A B C D INHIBIT 23 A B C D 9 FIGURE 1. LOGIC DIAGRAM TRUTH TABLE DECODER INPUTS INHIBIT D C B A SELECTED OUTPUT CD4514BMS = LOGIC 1 (HIGH) CD4515BMS = LOGIC 0 (LOW) 0 0 0 0 0 S0 0 0 0 0 1 S1 0 0 0 1 0 S2 0 0 0 1 1 S3 0 0 1 0 0 S4 0 0 1 0 1 S5 0 0 1 1 0 S6 0 0 1 1 1 S7 0 1 0 0 0 S8 0 1 0 0 1 S9 0 1 0 1 0 S10 0 1 0 1 1 S11 0 1 1 0 0 S12 0 1 1 0 1 S13 0 1 1 1 0 S14 0 1 1 1 1 S15 1 X X X X 0 = LOW LEVEL 6 All Outputs = 0, CD4514BMS All Outputs = 1, CD4515BMS X = DON’T CARE S1 10 S2 8 S3 7 S4 6 S5 5 S6 4 S7 18 S8 17 S9 20 S10 19 S11 14 S12 13 S13 16 S14 15 S15 THESE INVENTERS USED ONLY ON CD4515BMS * All inputs protected by CMOS protection network. 1 = HIGH LEVEL 11 S0 CD4514BMS, CD4515BMS AMBIENT TEMPERATURE (TA) = +25oC GATE-TO-SOURCE VOLTAGE (VGS) = 15V 25 20 15 10V 10 5 5V 0 5 10 AMBIENT TEMPERATURE (TA) = +25oC 15.0 GATE-TO-SOURCE VOLTAGE (VGS) = 15V 12.5 10.0 10V 7.5 5.0 2.5 15 5V 0 5 DRAIN-TO-SOURCE VOLTAGE (VDS) (V) FIGURE 2. TYPICAL OUTPUT LOW (SINK) CURRENT CHARACTERISTICS AMBIENT TEMPERATURE (TA) = +25oC GATE-TO-SOURCE VOLTAGE (VGS) = -5V 0 -5 -15 -20 -25 -15V DRAIN-TO-SOURCE VOLTAGE (VDS) (V) -15 -10 -5 0 -10 -10V -30 AMBIENT TEMPERATURE (TA) = +25oC -10V -15V INHIBIT PROPAGATION DELAY TIME (tPHL, tPLH) - ns STROBE OR DATA PROPAGATION DELAY TIME (tPHL, tPLH) - ns 450 400 350 300 250 200 10V 15V 100 50 0 20 40 60 80 LOAD CAPACITANCE (CL) (pF) -10 -15 FIGURE 5. MINIMUM OUTPUT HIGH (SOURCE) CURRENT CHARACTERISTICS SUPPLY VOLTAGE (VDD) = 5V 150 0 -5 AMBIENT TEMPERATURE (TA) = +25oC 500 0 GATE-TO-SOURCE VOLTAGE (VGS) = -5V FIGURE 4. TYPICAL OUTPUT HIGH (SOURCE) CURRENT CHARACTERISTICS 550 15 FIGURE 3. MINIMUM OUTPUT LOW (SINK) CURRENT CHARACTERISTICS OUTPUT HIGH (SOURCE) CURRENT (IOH) (mA) DRAIN-TO-SOURCE VOLTAGE (VDS) (V) -15 -10 -5 10 DRAIN-TO-SOURCE VOLTAGE (VDS) (V) OUTPUT HIGH (SOURCE) CURRENT (IOH) (mA) 30 OUTPUT LOW (SINK) CURRENT (IOL) (mA) OUTPUT LOW (SINK) CURRENT (IOL) (mA) Typical Performance Characteristics 100 AMBIENT TEMPERATURE (TA) = +25oC 350 300 SUPPLY VOLTAGE (VDD) = 5V 250 200 150 10V 100 15V 50 0 20 40 60 80 LOAD CAPACITANCE (CL) (pF) 100 FIGURE 7. TYPICAL INHIBIT PROPAGATION DELAY TIME vs LOAD CAPACITANCE FIGURE 6. TYPICAL STROBE OR DATA PROPAGATION DELAY TIME vs LOAD CAPACITANCE 7 CD4514BMS, CD4515BMS Typical Performance Characteristics STROBE OR DATA PROPAGATION DELAY TIME (tPLH, tPHL) - ns) (Continued) TRANSITION TIME (fTHL, fTLH) (ns) AMBIENT TEMPERATURE (TA) = +25oC 200 SUPPLY VOLTAGE (VDD) = 5V 150 100 10V 15V 50 0 0 20 AMBIENT TEMPERATURE (TA) = +25oC LOAD CAPACITANCE (CL) = 50pF 500 400 300 200 100 0 0 40 60 80 100 LOAD CAPACITANCE (CL) (pF) FIGURE 8. TYPICAL LOW-TO-HIGH TRANSITION TIME vs LOAD CAPACITANCE 106 10 15 20 LOAD CAPACITANCE (CL) (pF) FIGURE 9. TYPICAL STROBE OR DATA PROPAGATION DELAY TIME vs SUPPLY VOLTAGE AMBIENT TEMPERATURE (TA) = +25oC SUPPLY VOLTAGE (VDD) = 15V 105 POWER DISSIPATION (PD) - µW 5 10V 10V 104 5V 103 102 10 CL = 50pF CL = 15pF 2 1 4 6 8 2 4 68 2 101 102 FREQUENCY (f) (kHz) 4 6 8 103 2 4 68 10. TYPICAL POWER DISSIPATION vs FREQUENCY Waveforms DATA 50% tr, tf = 20ns tS STROBE 50% tW FIGURE 11. WAVEFORMS FOR SETUP TIME AND STROBE PULSE WIDTH 8 104 25 CD4514BMS, CD4515BMS Chip Dimensions and Pad Layouts 0 10 20 30 40 50 60 70 80 90 100 110 112 74 70 60 50 71-79 (1.804-2.006) 40 30 20 10 0 4-10 (0.102-0.254) 109-117 (2.769-2.971) Dimensions in parentheses are in milimeters and are derived from the basic inch dimensions as indicated. Grid graduations are in mils (10-3 inch.) METALLIZATION: Thickness: 11kÅ − 14kÅ, PASSIVATION: AL. 10.4kÅ - 15.6kÅ, Silane BOND PADS: 0.004 inches X 0.004 inches MIN DIE THICKNESS: 0.0198 inches - 0.0218 inches All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com 9