DATASHEET

HCS138MS
®
Data Sheet
September 12, 2005
Radiation Hardened Inverting
3-to-8 Line Decoder/Demultiplexer
FN2473.3
Features
• 3 Micron Radiation Hardened SOS CMOS
The Intersil HCS138MS is a Radiation Hardened 3-to-8 line
Decoder/Demultiplexer. The outputs are active in the low
state. Two active low and one active high enables (E1, E2,
E3) are provided. If the device is enabled, the binary inputs
(A0, A1, A2) determine which one of the eight normally high
outputs will go to a low logic level.
The HCS138MS utilizes advanced CMOS/SOS technology
to achieve high-speed operation. This device is a member of
radiation hardened, high-speed, CMOS/SOS Logic Family.
The HCS138MS is supplied in a 16 lead Ceramic flatpack
(K suffix) or a SBDIP Package (D suffix).
• Total Dose 200K RAD (Si)
• SEP Effective LET No Upsets: >100 MEV-cm2/mg
• Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/BitDay (Typ)
• Latch-Up Free Under Any Conditions
• Fanout (Over Temperature Range)
- Standard Outputs - 10 LSTTL Loads
• Military Temperature Range: -55oC to +125oC
• Significant Power Reduction Compared to LSTTL ICs
• DC Operating Voltage Range: 4.5V to 5.5V
Pinouts
• Input Logic Levels
- VIL = 0.3 VCC Max
- VIH = 0.7 VCC Min
16 LEAD CERAMIC DUAL-IN-LINE
METAL SEAL PACKAGE (SBDIP)
MIL-STD-1835 CDIP2-T16
TOP VIEW
• Input Current Levels Ii ≤ 5µA at VOL, VOH
A0
1
16 VCC
A1
2
15 Y0
A2
3
14 Y1
E1
4
13 Y2
E2
5
12 Y3
PART NUMBER
E3
6
11 Y4
Y7
7
10 Y5
GND
8
9 Y6
Ordering Information
16 LEAD CERAMIC METAL SEAL
FLATPACK PACKAGE (FLATPACK)
MIL-STD-1835 CDFP4-F16
TOP VIEW
A0
1
16
VCC
A1
2
15
Y0
A2
3
14
Y1
E1
4
13
Y2
E2
5
12
Y3
E3
6
11
Y4
Y7
7
10
Y5
GND
8
9
Y6
1
TEMP
RANGE
SCREENING
LEVEL
HCS138DMSR
-55oC to
+125oC
Intersil Class S
Equivalent
16 Lead
SBDIP
HCS138KMSR
-55oC to
+125oC
Intersil Class S
Equivalent
16 Lead
Ceramic
Flatpack
HCS138HMSR
+25oC
Die
PACKAGE
Die
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 1995, 1999, 2005. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
HCS138MS
Functional Diagram
1
A0
15
Y0
14
2
Y1
A1
13
Y2
12
3
Y3
A2
11
Y4
4
E1
10
Y5
5
9
E2
Y6
6
7
E3
Y7
TRUTH TABLE
INPUTS
ENABLE
OUTPUTS
E3
E2
E1
A2
A1
A0
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
X
X
H
X
X
X
H
H
H
H
H
H
H
H
L
X
X
X
X
X
H
H
H
H
H
H
H
H
X
H
X
X
X
X
H
H
H
H
H
H
H
H
H
L
L
L
L
L
L
H
H
H
H
H
H
H
H
L
L
L
L
H
H
L
H
H
H
H
H
H
H
L
L
L
H
L
H
H
L
H
H
H
H
H
H
L
L
L
H
H
H
H
H
L
H
H
H
H
H
L
L
H
L
L
H
H
H
H
L
H
H
H
H
L
L
H
L
H
H
H
H
H
H
L
H
H
H
L
L
H
H
L
H
H
H
H
H
H
L
H
H
L
L
H
H
H
H
H
H
H
H
H
H
L
H = High Level, L = Low Level, X = Don’t Care
2
FN2473.3
September 12, 2005
Specifications HCS138MS
Absolute Maximum Ratings
Reliability Information
Supply Voltage (VCC) . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7.0V
Input Voltage Range, All Inputs . . . . . . . . . . . . . -0.5V to VCC +0.5V
DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . . ±10mA
DC Drain Current, Any One Output. . . . . . . . . . . . . . . . . . . . . . . ±25mA
(All Voltage Reference to the VSS Terminal)
Storage Temperature Range (TSTG) . . . . . . . . . . -65oC to +150oC
Lead Temperature (Soldering 10sec) . . . . . . . . . . . . . . . . . .+265oC
Junction Temperature (TJ). . . . . . . . . . . . . . . . . . . . . . . . . . .+175oC
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
Thermal Resistance
θJA
θJC
SBDIP Package . . . . . . . . . . . . . . . . . . . .
73oC/W
24oC/W
Ceramic Flatpack Package . . . . . . . . . . . 114oC/W 29oC/W
Maximum Package Power Dissipation at +125oC Ambient
SBDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.68W
Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . . . .0.44W
If device power exceeds package dissipation capability, provide
heat sinking or derate linearly at the following rate:
SBDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13.7mW/oC
Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . .8.8mW/oC
CAUTION: As with all semiconductors, stress listed under “Absolute Maximum Ratings” may be applied to devices (one at a time) without resulting in permanent damage. This is a stress rating only. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. The conditions listed under “Electrical Performance Characteristics” are the only conditions recommended for satisfactory device operation..
Operating Conditions
Supply Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V
Input Rise and Fall Times at VCC = 4.5V (TR, TF) . . . . . 500ns Max
Operating Temperature Range (TA) . . . . . . . . . . . -55oC to +125oC
Input Low Voltage (VIL) . . . . . . . . . . . . . . . . . . . 0.0V to 30% of VCC
Input High Voltage (VIH) . . . . . . . . . . . . . . . . . .70% of VCC to VCC
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER
Quiescent Current
Output Current (Sink)
Output Current
(Source)
Output Voltage Low
Output Voltage High
Input Leakage
Current
Noise Immunity
Functional Test
TEMPERATURE
MIN
MAX
UNITS
1
+25oC
-
40
µA
2, 3
+125oC, -55oC
-
750
µA
1
+25oC
7.2
-
mA
2, 3
+125oC, -55oC
6.0
-
mA
1
+25oC
-7.2
-
mA
2, 3
+125oC, -55oC
-6.0
-
mA
VCC = 4.5V, VIH = 3.15V,
IOL = 50µA, VIL = 1.35V
1, 2, 3
+25oC, +125oC, -55oC
-
0.1
V
VCC = 5.5V, VIH = 3.85V,
IOL = 50µA, VIL = 1.65V
1, 2, 3
+25oC, +125oC, -55oC
-
0.1
V
VCC = 4.5V, VIH = 3.15V,
IOH = -50µA, VIL = 1.35V
1, 2, 3
+25oC, +125oC, -55oC
VCC
-0.1
-
V
VCC = 5.5V, VIH = 3.85V,
IOH = -50µA, VIL = 1.65V
1, 2, 3
+25oC, +125oC, -55oC
VCC
-0.1
-
V
VCC = 5.5V, VIN = VCC or
GND
1
+25oC
-
±0.5
µA
2, 3
+125oC, -55oC
-
±5.0
µA
7, 8A, 8B
+25oC, +125oC, -55oC
-
-
-
SYMBOL
ICC
IOL
IOH
VOL
VOH
IIN
FN
LIMITS
GROUP A
SUBGRO
UPS
(NOTE 1)
CONDITIONS
VCC = 5.5V,
VIN = VCC or GND
VCC = 4.5V, VIH = 4.5V,
VOUT = 0.4V, VIL = 0V
VCC = 4.5V, VIH = 4.5V,
VOUT = VCC -0.4V,
VIL = 0V
VCC = 4.5V,
VIH = 0.70(VCC),
VIL = 0.30(VCC) (Note 2)
NOTES:
1. All voltages reference to device GND.
2. For functional tests VO ≥ 4.0V is recognized as a logic “1”, and VO ≤ 0.5V is recognized as a logic “0”.
3
FN2473.3
September 12, 2005
Specifications HCS138MS
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER
Address to Output
(NOTES 1, 2)
CONDITIONS
SYMBOL
TPLH
Enable to Output
TEMPERATURE
MIN
MAX
UNITS
9
+25oC
2
28
ns
10, 11
+125oC, -55oC
2
34
ns
9
+25oC
2
28
ns
10, 11
+125oC, -55oC
2
34
ns
9
+25oC
2
27
ns
10, 11
+125oC, -55oC
2
33
ns
9
+25oC
2
27
ns
10, 11
+125oC, -55oC
2
33
ns
VCC = 4.5V
TPHL
VCC = 4.5V
TPLH
VCC = 4.5V
TPHL
LIMITS
GROUP A
SUBGRO
UPS
VCC = 4.5V
NOTES:
1. All voltages referenced to device GND.
2. AC measurements assume RL = 500Ω, CL = 50pF, Input TR = TF = 3ns, VIL = GND, VIH = VCC.
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS
LIMITS
PARAMETER
Capacitance Power
Dissipation
Input Capacitance
Output Transition
Time
SYMBOL
CPD
CIN
TTHL
TTLH
CONDITIONS
NOTES
TEMPERATURE
MIN
MAX
UNITS
1
+25oC
-
78
pF
1
+125oC
-
113
pF
1
+25oC
-
10
pF
1
+125oC
-
10
pF
1
+25oC
-
15
ns
1
+125oC
-
22
ns
VCC = 5.0V, f = 1MHz
VCC = 5.0V, f = 1MHz
VCC = 4.5V
NOTE:
1. The parameters listed in Table 3 are controlled via design or process parameters. Min and Max Limits are guaranteed but not directly tested.
These parameters are characterized upon initial design release and upon design changes which affect these characteristics.
TABLE 4. DC POST RADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS
200K RAD
LIMITS
PARAMETER
SYMBOL
(NOTES 1, 2)
CONDITIONS
TEMPERATURE
MIN
MAX
UNITS
Quiescent Current
ICC
VCC = 5.5V, VIN = VCC or GND
+25oC
-
0.75
mA
Output Current (Sink)
IOL
VCC = 4.5V, VIN = VCC or GND,
VOUT = 0.4V
+25oC
6.0
-
mA
Output Current (Source)
IOH
VCC = 4.5V, VIN = VCC or GND,
VOUT = VCC -0.4V
+25oC
-6.0
-
mA
4
FN2473.3
September 12, 2005
Specifications HCS138MS
TABLE 4. DC POST RADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)
200K RAD
LIMITS
PARAMETER
(NOTES 1, 2)
CONDITIONS
SYMBOL
TEMPERATURE
MIN
MAX
UNITS
Output Voltage Low
VOL
VCC = 4.5V and 5.5V, VIH = 0.70(VCC),
VIL = 0.30(VCC), IOL = 50µA
+25oC
-
0.1
V
Output Voltage High
VOH
VCC = 4.5V and 5.5V, VIH = 0.70(VCC),
VIL = 0.30(VCC), IOH = -50µA
+25oC
VCC
-0.1
-
V
Input Leakage Current
IIN
VCC = 5.5V, VIN = VCC or GND
+25oC
-
±5
µA
Noise Immunity
Functional Test
FN
VCC = 4.5V, VIH = 0.70(VCC),
VIL = 0.30(VCC), (Note 3)
+25oC
-
-
-
TPLH
VCC = 4.5V
+25oC
2
34
ns
TPHL
VCC = 4.5V
+25oC
2
34
ns
TPLH
VCC = 4.5V
+25oC
2
33
ns
TPHL
VCC = 4.5V
+25oC
2
33
ns
Address to Output
Enable to Output
NOTES:
1. All voltages referenced to device GND.
2. AC measurements assume RL = 500Ω, CL = 50pF, Input TR = TF = 3ns, VIL = GND, VIH = VCC.
3. For functional tests VO ≥ 4.0V is recognized as a logic “1”, and VO ≤ 0.5V is recognized as a logic “0”.
TABLE 5. BURN-IN AND OPERATING LIFE TEST, DELTA PARAMETERS (+25oC)
GROUP B
SUBGROUP
DELTA LIMIT
ICC
5
12µA
IOL/IOH
5
-15% of 0 Hour
PARAMETER
TABLE 6. APPLICABLE SUBGROUPS
CONFORMANCE GROUPS
METHOD
GROUP A SUBGROUPS
Initial Test (Preburn-In)
100%/5004
1, 7, 9
ICC, IOL/H
Interim Test I (Postburn-In)
100%/5004
1, 7, 9
ICC, IOL/H
Interim Test II (Postburn-In)
100%/5004
1, 7, 9
ICC, IOL/H
PDA
100%/5004
1, 7, 9, Deltas
Interim Test III (Postburn-In)
100%/5004
1, 7, 9
PDA
100%/5004
1, 7, 9, Deltas
Final Test
100%/5004
2, 3, 8A, 8B, 10, 11
Sample/5005
1, 2, 3, 7, 8A, 8B, 9, 10, 11
Subgroup B-5
Sample/5005
1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas
Subgroup B-6
Sample/5005
1, 7, 9
Sample/5005
1, 7, 9
Group A (Note 1)
Group B
Group D
READ AND RECORD
ICC, IOL/H
Subgroups 1, 2, 3, 9, 10, 11
NOTE:
1. Alternate group A inspection in accordance with method 5005 of MIL-STD-883 may be exercised.
5
FN2473.3
September 12, 2005
Specifications HCS138MS
TABLE 7. TOTAL DOSE IRRADIATION
TEST
CONFORMANCE GROUPS
READ AND RECORD
METHOD
PRE RAD
POST RAD
PRE RAD
POST RAD
5005
1, 7, 9
Table 4
1, 9
Table 4 (Note 1)
Group E Subgroup 2
NOTE:
1. Except FN test which will be performed 100% Go/No-Go.
TABLE 8. STATIC AND DYNAMIC BURN-IN TEST CONNECTIONS
OSCILLATOR
OPEN
GROUND
1/2 VCC = 3V ± 0.5V
VCC = 6V ± 0.5V
50kHz
25kHz
STATIC BURN-IN I TEST CONNECTIONS (Note 1)
7, 9 - 15
1 - 6, 8
16
STATIC BURN-IN II TEST CONNECTIONS (Note 1)
7, 9 - 15
8
-
1 - 6, 16
-
-
7, 9 - 15
3, 6, 16
2
1
DYNAMIC BURN-IN TEST CONNECTIONS (Note 2)
-
4, 5, 8
NOTES:
1. Each pin except VCC and GND will have a resistor of 10KΩ ± 5% for static burn-in
2. Each pin except VCC and GND will have a resistor of 680Ω ± 5% for dynamic burn-in
TABLE 9. IRRADIATION TEST CONNECTIONS
OPEN
GROUND
VCC = 5V ± 0.5V
7, 9 - 15
8
1 - 6, 16
NOTE: Each pin except VCC and GND will have a resistor of 47KΩ ± 5% for irradiation testing.
Group E, Subgroup 2, sample size is 4 dice/wafer 0 failures.
6
FN2473.3
September 12, 2005
HCS138MS
Intersil Space Level Product Flow - ‘MS’
Wafer Lot Acceptance (All Lots) Method 5007
(Includes SEM)
100% Interim Electrical Test 1 (T1)
GAMMA Radiation Verification (Each Wafer) Method 1019,
4 Samples/Wafer, 0 Rejects
100% Static Burn-In 2, Condition A or B, 24 hrs. min.,
+125oC min., Method 1015
100% Nondestructive Bond Pull, Method 2023
100% Interim Electrical Test 2 (T2)
Sample - Wire Bond Pull Monitor, Method 2011
100% Delta Calculation (T0-T2)
Sample - Die Shear Monitor, Method 2019 or 2027
100% PDA 1, Method 5004 (Notes 1and 2)
100% Internal Visual Inspection, Method 2010, Condition A
100% Dynamic Burn-In, Condition D, 240 hrs., +125oC or
Equivalent, Method 1015
100% Temperature Cycle, Method 1010, Condition C,
10 Cycles
100% Constant Acceleration, Method 2001, Condition per
Method 5004
100% PIND, Method 2020, Condition A
100% External Visual
100% Delta Calculation (T0-T1)
100% Interim Electrical Test 3 (T3)
100% Delta Calculation (T0-T3)
100% PDA 2, Method 5004 (Note 2)
100% Final Electrical Test
100% Fine/Gross Leak, Method 1014
100% Serialization
100% Initial Electrical Test (T0)
100% Static Burn-In 1, Condition A or B, 24 hrs. min.,
+125oC min., Method 1015
100% Radiographic, Method 2012 (Note 3)
100% External Visual, Method 2009
Sample - Group A, Method 5005 (Note 4)
100% Data Package Generation (Note 5)
NOTES:
1. Failures from Interim electrical test 1 and 2 are combined for determining PDA 1.
2. Failures from subgroup 1, 7, 9 and deltas are used for calculating PDA. The maximum allowable PDA = 5% with no more than 3% of the failures
from subgroup 7.
3. Radiographic (X-Ray) inspection may be performed at any point after serialization as allowed by Method 5004.
4. Alternate Group A testing may be performed as allowed by MIL-STD-883, Method 5005.
5. Data Package Contents:
• Cover Sheet (Intersil Name and/or Logo, P.O. Number, Customer Part Number, Lot Date Code, Intersil Part Number, Lot Number, Quantity).
• Wafer Lot Acceptance Report (Method 5007). Includes reproductions of SEM photos with percent of step coverage.
• GAMMA Radiation Report. Contains Cover page, disposition, Rad Dose, Lot Number, Test Package used, Specification Numbers, Test
equipment, etc. Radiation Read and Record data on file at Intersil.
• X-Ray report and film. Includes penetrometer measurements.
• Screening, Electrical, and Group A attributes (Screening attributes begin after package seal).
• Lot Serial Number Sheet (Good units serial number and lot number).
• Variables Data (All Delta operations). Data is identified by serial number. Data header includes lot number and date of test.
• The Certificate of Conformance is a part of the shipping invoice and is not part of the Data Book. The Certificate of Conformance is signed
by an authorized Quality Representative.
7
FN2473.3
September 12, 2005
HCS138MS
AC Timing Diagrams
VIH
INPUT
VS
VIL
TPLH
TPHL
VOH
VS
OUTPUT
VOL
TTLH
VOH
TTHL
80%
20%
VOL
80%
20%
OUTPUT
AC VOLTAGE LEVELS
PARAMETER
HCS
UNITS
VCC
4.50
V
VIH
4.50
V
VS
2.25
V
VIL
0
V
GND
0
V
AC Load Circuit
DUT
TEST
POINT
CL
RL
CL = 50pF
RL = 500Ω
8
FN2473.3
September 12, 2005
HCS138MS
GLASSIVATION:
Type: SiO2
Thickness: 13kÅ ± 2.6kÅ
Die Characteristics
DIE DIMENSIONS:
85 x 101 mils
WORST CASE CURRENT DENSITY:
<2.0 x 105A/cm2
METALLIZATION:
Type: SiAl
Metal Thickness: 11kÅ ± 1kÅ
BOND PAD SIZE:
100µm x 100µm
4 x 4 mils
Metallization Mask Layout
HCS138MS
A1
(2)
A0
(1)
VCC
(16)
Y0
(15)
(14) Y1
A2 (3)
NC
NC
(13) Y2
E1 (4)
(12) Y3
E2 (5)
E3 (6)
(11) Y4
NC
NC
(7)
Y7
NOTE:
(8)
GND
(9)
Y6
(10)
Y5
The die diagram is a generic plot from a similar HCS device. It is intended to indicate approximate die size and bond pad location. The
mask series for the HCS138 is TA14361A.
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
9
FN2473.3
September 12, 2005
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