DATASHEET

HCS154MS
Features
The Intersil HCS154MS is a Radiation Hardened 4 to 16
line Decoder/Demultiplexer with two enable inputs. A
high on either enable input forces the output to a high
state. The Demultiplexing function is performed by using
the four input lines A0 to A3 to select the desired output
states.
•
•
•
•
The HCS154MS utilizes advanced CMOS/SOS technology
to achieve high-speed operation. This device is a
member of radiation hardened, high-speed, CMOS/SOS
Logic Family.
The HCS154MS is supplied in a 24 lead Ceramic flatpack
(K suffix) or a SBDIP Package (D suffix).
•
•
•
•
•
•
•
•
3 Micron Radiation Hardened SOS CMOS
Total Dose 200k RAD (Si)
SEP Effective LET No Upsets: >100 MEV-cm2/mg
Single Event Upset (SEU) Immunity < 2 x 10-9
Errors/Bit-Day (Typ)
Dose Rate Survivability: >1 x 1012 Rads (Si)/s
Dose Rate Upset >1010 RAD(Si)/s 20ns Pulse
Cosmic Ray Upset Immunity < 2 x 10-9 Errors/Gate Day
(Typ)
Latch-Up Free Under Any Conditions
Military Temperature Range: -55oC to +125oC
Significant Power Reduction Compared to LSTTL ICs
DC Operating Voltage Range: 4.5V to 5.5V
Input Logic Levels
- VIL = 30% of VCC Max
- VIH = 70% of VCC Min
• Input Current Levels Ii ≤ 5µA at VOL, VOH
Pin Configurations
24 LEAD CERAMIC METAL SEAL
FLATPACK PACKAGE (FLATPACK)
MIL-STD-1835 CDFP4-F24
TOP VIEW
24 LEAD CERAMIC DUAL-IN-LINE
METAL SEAL PACKAGE (SBDIP)
MIL-STD-1835 CDIP2-T24
TOP VIEW
Y0
1
24 VCC
Y0
1
24
VCC
Y1
2
23 A0
Y1
2
Y2
3
22 A1
Y2
3
23
22
Y3
4
21 A2
Y3
4
Y4
5
20 A3
Y4
5
19 E2
Y5
6
Y5
6
A0
A1
A2
A3
E2
Y6
7
Y6
7
18 E1
Y7
8
Y7
8
17 Y15
9
Y8
Y8
Y9
9
16 Y14
Y9 10
15 Y13
Y10 11
14 Y12
GND 12
13 Y11
Y10
GND
21
20
19
18
17
16
11
15
14
12
13
10
E1
Y15
Y14
Y13
Y12
Y11
Ordering Information
ORDERING
NUMBER
INTERNAL
MKT. NUMBER
PART
MARKING
TEMP. RANGE
(°C)
SCREENING
LEVEL
PACKAGE
PKG.
DWG. #
5962R9572901VJC HCS154DMSR
Q 5962R95 72901VJC -55oC to +125oC Intersil Class S 24 Ld SBDIP
Equivalent
5962R9572901VXC HCS154KMSR
Q 5962R95 72901VXC -55oC to +125oC Intersil Class S 24 Ld Ceramic Flatpack K24.A
Equivalent
January 6, 2011
FN2479.3
1
D24.6
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 1995, 2011. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
HCS154MS
Radiation Hardened 4 to 16 Line
Decoder/Demultiplexer
HCS154MS
Functional Diagram
TABLE 1. TRUTH TABLE
INPUTS
OUTPUTS
E1
E2
A3
A2
A1
A0
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
Y9
Y10 Y11 Y12 Y13 Y14 Y15
L
L
L
L
L
L
L
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
L
L
L
L
H
H
L
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
L
L
L
H
L
H
H
L
H
H
H
H
H
H
H
H
H
H
H
H
H
L
L
L
L
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
H
H
H
L
L
L
H
L
L
H
H
H
H
L
H
H
H
H
H
H
H
H
H
H
H
L
L
L
H
L
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
H
L
L
L
H
H
L
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
L
L
L
H
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
L
L
H
L
L
L
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
L
L
H
L
L
H
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
L
L
H
L
H
L
H
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
L
L
H
L
H
H
H
H
H
H
H
H
H
H
H
H
H
L
H
H
H
H
L
L
H
H
L
L
H
H
H
H
H
H
H
H
H
H
H
H
L
H
H
H
L
L
H
H
L
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
H
H
L
L
H
H
H
L
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
H
L
L
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
L
H
X
X
X
X
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
X
X
X
X
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
X
X
X
X
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
NOTE: H = High Level, L = Low Level, X = Immaterial
2
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January 6, 2011
HCS154MS
Absolute Maximum Ratings
Reliability Information
Supply Voltage. . . . . . . . . . . . . . . . . . . . . . -0.5V to +7.0V
Input Voltage Range, All Inputs . . . . . . . -0.5V to VCC +0.5V
DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . ±10mA
DC Drain Current, Any One Output. . . . . . . . . . . . . . . . . . . . ±25mA
(All Voltage Reference to the VSS Terminal)
Storage Temperature Range (TSTG) . . . . . . -65°C to +150°C
Lead Temperature (Soldering 10sec) . . . . . . . . . . . +265°C
Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . . +175°C
ESD Classification. . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
Thermal Resistance
θJA
θJC
SBDIP Package . . . . . . . . . . . . . . 63°C/W
23°C/W
Ceramic Flatpack Package . . . . . . . 87°C/W
23°C/W
Maximum Package Power Dissipation at +125oC Ambient
SBDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . 0.79W
Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . 0.57W
If device power exceeds package dissipation capability,
provide heat sinking or derate linearly at the following rate:
SBDIP Package . . . . . . . . . . . . . . . . . . . . . . 15.9mW/°C
Ceramic Flatpack Package . . . . . . . . . . . . . . . 11.5mW/°C
Operating Conditions
Supply Voltage . . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V
Input Rise and Fall Times at 4.5V VCC (TR, TF) . . . . . 100ns
MaxOperating Temperature Range (TA) . . . -55°C to +125°C
Input Low Voltage (VIL) . . . . . . . . . . . . 0.0V to 30% of VCC
Input High Voltage (VIH) . . . . . . . . . . . . 70% of VCC to VCC
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact
product reliability and result in failures not covered by warranty.
DC Electrical Specifications
SYMBOL
ICC
IOL
IOH
VOL
VOH
IIN
FN
CONDITIONS
(Note 1)
LIMITS
GROUP A
SUBGROUPS
TEMPERATURE
1
+25°C
-
40
µA
2, 3
+125°C, -55°C
-
750
µA
1
+25°C
4.8
-
mA
2, 3
+125°C, -55°C
4.0
-
mA
1
+25°C
-4.8
-
mA
2, 3
+125°C, -55°C
-4.0
-
mA
Output Voltage Low VCC = 4.5V, VIH = 3.15V,
IOL = 50μA, VIL = 1.35V
1, 2, 3
+25°C, +125°C, -55°C
-
0.1
V
VCC = 5.5V, VIH = 3.85V,
IOL = 50μA, VIL = 1.65V
1, 2, 3
+25°C, +125°C, -55°C
-
0.1
V
VCC = 4.5V, VIH = 3.15V,
IOH = -50μA, VIL = 1.35V
1, 2, 3
+25°C, +125°C, -55°C VCC
-0.1
-
V
VCC = 5.5V, VIH = 3.85V,
IOH = -50μA, VIL = 1.65V
1, 2, 3
+25°C, +125°C, -55°C VCC
-0.1
-
V
Input Leakage
Current
VCC = 5.5V, VIN = VCC or
GND
1
+25°C
-
±0.5
µA
2, 3
+125°C, -55°C
-
±5.0
µA
Noise Immunity
Functional Test
VCC = 4.5V,
VIH = 0.70(VCC), (Note 2)
VIL = 0.30(VCC)
7, 8A, 8B
+25°C, +125°C, -55°C
-
-
-
PARAMETERS
Quiescent Current
VCC = 5.5V,
VIN = VCC or GND
Output Current
(Sink)
VCC = 4.5V, VIH = 4.5V,
VOUT = 0.4V, VIL = 0V
Output Current
(Source)
VCC = 4.5V, VIH = 4.5V,
VOUT = VCC -0.4V,
VIL = 0V
Output Voltage
High
MIN MAX UNITS
NOTES:
1. All voltages reference to device GND.
2. For functional tests, VO ≥ 4.0V is recognized as a logic “1”, and VO ≤ 0.5V is recognized as a logic “0”.
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FN2479.3
January 6, 2011
HCS154MS
AC Electrical Specifications
SYMBOL
TPLH
CONDITIONS
(Notes 3, 4)
PARAMETER
Address to Output
TPHL
VCC = 4.5V
VCC = 4.5V
TPLH TPHL Enable to Output
VCC = 4.5V
LIMITS
GROUP A
SUBGROUPS
TEMPERATURE
MIN
MAX
UNITS
9
+25°C
2
29
ns
10, 11
+125°C, -55°C
2
34
ns
9
+25°C
2
27
ns
10, 11
+125°C, -55°C
2
31
ns
9
+25°C
2
27
ns
10, 11
+125°C, -55°C
2
27
ns
NOTES:
3. All voltages referenced to device GND.
4. AC measurements assume RL = 500Ω, CL = 50pF, Input TR = TF = 3ns, VIL = GND, VIH = VCC.
Electrical Specifications
The following parameters are controlled via design or process parameters. Min and Max
Limits are guaranteed but not directly tested. These parameters are characterized upon
initial design release and upon design changes which affect these characteristics.
LIMITS
SYMBOL
CPD
CIN
TTHL
TTLH
PARAMETER
CONDITIONS
Capacitance Power
Dissipation
VCC = 5.0V, f = 1MHz
Input Capacitance
VCC = 5.0V, f = 1MHz
Output Transition
Time
NOTES
TEMPERATURE
MIN
MAX
UNITS
1
+25°C
-
66
pF
1
+125°C, -55°C
-
74
pF
1
+25°C
-
10
pF
1
+125°C
-
10
pF
1
+25°C
-
15
ns
1
+125°C
-
22
ns
VCC = 4.5V
DC Post Radiation Electrical Performance Characteristics
CONDITIONS
(Notes 5, 6)
200k RAD
LIMITS
TEMPERATURE
MIN
MAX
UNITS
ICC
Quiescent Current
VCC = 5.5V, VIN = VCC or GND
+25°C
-
0.75
mA
IOL
Output Current (Sink)
VCC = 4.5V, VIN = VCC or GND,
VOUT = 0.4V
+25°C
4.0
-
mA
IOH
Output Current
(Source)
VCC = 4.5V, VIN = VCC or GND,
VOUT = VCC -0.4V
+25°C
-4.0
-
mA
VOL
Output Voltage Low
VCC = 4.5V and 5.5V, VIH = 0.70(VCC),
VIL = 0.30(VCC), IOL = 50μA
+25°C
-
0.1
V
VOH
Output Voltage High
VCC = 4.5V or 5.5V, VIH = 0.70(VCC),
VIL = 0.30(VCC), IOH = -50μA
+25°C
VCC
-0.1
-
V
SYMBOL
PARAMETERS
IIN
Input Leakage Current
VCC = 5.5V, VIN = VCC or GND
+25°C
-
±5
µA
FN
Noise Immunity
Functional Test
VCC = 4.5V, VIH = 0.70(VCC),
VIL = 0.30(VCC), (Note 7)
+25°C
-
-
-
Address to Output
VCC = 4.5V
+25°C
2
34
ns
VCC = 4.5V
+25°C
2
31
ns
VCC = 4.5V
+25°C
2
27
ns
TPLH
TPHL
TPLH TPHL Enable to Output
NOTES:
5. All voltages referenced to device GND.
6. AC measurements assume RL = 500Ω, CL = 50pF, Input TR = TF = 3ns, VIL = GND, VIH = VCC.
7. For functional tests, VO ≥ 4.0V is recognized as a logic “1”, and VO ≤ 0.5V is recognized as a logic “0”.
4
FN2479.3
January 6, 2011
HCS154MS
TABLE 5. BURN-IN AND OPERATING LIFE TEST, DELTA PARAMETERS (+25°C)
GROUP B SUBGROUP
DELTA LIMIT
ICC
PARAMETER
5
12μA
IOL/IOH
5
-15% of 0 Hour
TABLE 6. APPLICABLE SUBGROUPS
CONFORMANCE GROUPS
METHOD
GROUP A SUBGROUPS
READ AND RECORD
Initial Test (Preburn-In)
100%/5004
1, 7, 9
ICC, IOL/H
Interim Test I (Postburn-In)
100%/5004
1, 7, 9
ICC, IOL/H
Interim Test II (Postburn-In)
100%/5004
1, 7, 9
ICC, IOL/H
PDA
100%/5004
1, 7, 9, Deltas
Interim Test III (Postburn-In)
100%/5004
1, 7, 9
PDA
100%/5004
1, 7, 9, Deltas
Final Test
100%/5004
2, 3, 8A, 8B, 10, 11
Sample/5005
1, 2, 3, 7, 8A, 8B, 9, 10, 11
Subgroup B-5
Sample/5005
1, 2, 3, 7, 8A, 8B, 9, 10, 11,
Deltas
Subgroup B-6
Sample/5005
1, 7, 9
Sample/5005
1, 7, 9
Group A (Note 8)
Group B
ICC, IOL/H
Group D
Subgroups 1, 2, 3, 9, 10, 11
NOTE:
8. Alternate Group A testing in accordance with Method 5005 of MIL-STD-883 may be exercised.
TABLE 7. TOTAL DOSE IRRADIATION
CONFORMANCE
GROUPS
Group E Subgroup 2
TEST
READ AND RECORD
METHOD
PRE RAD
POST RAD
PRE RAD
POST RAD
5005
1, 7, 9
See “DC Post Radiation
Electrical Performance
Characteristics” table on page 4
1, 9
See “DC Post Radiation Electrical
Performance Characteristics” table
on page 4 (Note 9)
NOTE:
9. Except FN test which will be performed 100% Go/No-Go.
TABLE 8. STATIC AND DYNAMIC BURN-IN TEST CONNECTIONS
OSCILLATOR
OPEN
GROUND
1/2 VCC = 3V ± 0.5V
VCC = 6V ± 0.5V
50kHz
25kHz
-
24
-
-
-
18 - 24
-
-
1 - 11, 13 - 17
24
23
22
STATIC BURN-IN I TEST CONDITIONS (Note 10)
1 - 11, 13 - 17
12, 18 - 23
STATIC BURN-IN II TEST CONNECTIONS (Note 10)
1 - 11, 13 - 17
12
DYNAMIC BURN-IN I TEST CONNECTIONS (Note 11)
-
12, 18 - 21
NOTES:
10. Each pin except VCC and GND will have a resistor of 10kΩ ± 5% for static burn-in.
11. Each pin except VCC and GND will have a resistor of 1kΩ ± 5% for dynamic burn-in.
TABLE 9. IRRADIATION TEST CONNECTIONS
OPEN
GROUND
VCC = 5V ± 0.5V
1 - 11, 13 - 17
12
18 - 24
NOTE: Each pin except VCC and GND will have a resistor of 47kΩ ± 5% for irradiation testing. Group E, Subgroup 2, sample size
is 4 dice/wafer 0 failures.
5
FN2479.3
January 6, 2011
HCS154MS
Intersil Space Level Product Flow - ‘MS’
Wafer Lot Acceptance (All Lots) Method 5007
(Includes SEM)
GAMMA Radiation Verification (Each Wafer) Method 1019,
4 Samples/Wafer, 0 Rejects
100% Nondestructive Bond Pull, Method 2023
Sample - Wire Bond Pull Monitor, Method 2011
Sample - Die Shear Monitor, Method 2019 or 2027
100% Internal Visual Inspection, Method 2010, Condition A
100% Temperature Cycle, Method 1010, Condition C,
10 Cycles
100% Constant Acceleration, Method 2001, Condition per
Method 5004
100% PIND, Method 2020, Condition A
100% Interim Electrical Test 1 (T1)
100% Delta Calculation (T0-T1)
100% Static Burn-In 2, Condition A or B, 24 hrs. min.,
+125°C min., Method 1015
100% Interim Electrical Test 2 (T2)
100% Delta Calculation (T0-T2)
100% PDA 1, Method 5004 (Notes 12 and 13)
100% Dynamic Burn-In, Condition D, 240 hrs., +125°C
or Equivalent, Method 1015
100% Interim Electrical Test 3 (T3)
100% Delta Calculation (T0-T3)
100% PDA 2, Method 5004 (Note 13)
100% Final Electrical Test
100% External Visual
100% Fine/Gross Leak, Method 1014
100% Serialization
100% Initial Electrical Test (T0)
100% Static Burn-In 1, Condition A or B, 24 hrs. min.,
+125°C min., Method 1015
100% Radiographic, Method 2012 (Note 14)
100% External Visual, Method 2009
Sample - Group A, Method 5005 (Note 15)
100% Data Package Generation (Note 16)
NOTES:
12. Failures from Interim electrical test 1 and 2 are combined for determining PDA 1.
13. Failures from subgroup 1, 7, 9 and deltas are used for calculating PDA. The maximum allowable PDA = 5% with no more than
3% of the failures from subgroup 7.
14. Radiographic (X-Ray) inspection may be performed at any point after serialization as allowed by Method 5004.
15. Alternate Group A testing may be performed as allowed by MIL-STD-883, Method 5005.
16. Data Package Contents:
• Cover Sheet (Intersil Name and/or Logo, P.O. Number, Customer Part Number, Lot Date Code, Intersil Part Number, Lot Number, Quantity).
• Wafer Lot Acceptance Report (Method 5007). Includes reproductions of SEM photos with percent of step coverage.
• GAMMA Radiation Report. Contains Cover page, disposition, Rad Dose, Lot Number, Test Package used, Specification Numbers,
Test
equipment, etc. Radiation Read and Record data on file at Intersil.
• X-Ray report and film. Includes penetrometer measurements.
• Screening, Electrical, and Group A attributes (Screening attributes begin after package seal).
• Lot Serial Number Sheet (Good units serial number and lot number).
• Variables Data (All Delta operations). Data is identified by serial number. Data header includes lot number and date of test.
• The Certificate of Conformance is a part of the shipping invoice and is not part of the Data Book. The Certificate of Conformance is signed by an authorized Quality Representative.
6
FN2479.3
January 6, 2011
HCS154MS
AC Timing Diagrams
AC Load Circuit
DUT
TEST
POINT
VIH
INPUT
VS
CL
RL
VIL
TPLH
TPHL
VOH
CL = 50pF
VS
RL = 500Ω
OUTPUT
VOL
TTHL
TTLH
VOH
80%
20%
VOL
80%
20%
OUTPUT
TABLE 10. AC VOLTAGE LEVELS
PARAMETER
HCS
UNITS
VCC
4.50
V
VIH
4.50
V
VS
2.25
V
VIL
0
V
GND
0
V
7
FN2479.3
January 6, 2011
HCS154MS
Die Characteristics
GLASSIVATION:
Type: SiO2
Thickness: 13kÅ ± 2.6kÅ
DIE DIMENSIONS:
85 x 101 mils
2.16 x 2.57mm
WORST CASE CURRENT DENSITY:
2.0 x 105A/cm2
METALLIZATION:
Type: AlSi
Metal Thickness: 11kÅ ± 1kÅ
BOND PAD SIZE:
100µm x 100µm
4 x 4 mils
Metallization Mask Layout
HCS154MS
Y1
(2)
Y0
(1)
VCC
(24)
A0
(23)
A1
(22)
Y2 (3)
Y3 (4)
(21) A2
Y4 (5)
(20) A3
(19) E2
Y5 (6)
Y6 (7)
(18) E1
Y7 (8)
(17) Y15
Y8 (9)
(16) Y14
Y9 (10)
(11)
Y10
(12)
GND
(13)
Y11
(14)
Y12
(15)
Y13
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Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems as noted
in the quality certifications found at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications
at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by
Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any
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patent or patent rights of Intersil or its subsidiaries.
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8
FN2479.3
January 6, 2011
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