DATASHEET

CD4069UBMS
CMOS Hex Inverter
December 1992
Features
Pinout
• High Voltage Types (20V Rating)
CD4069UBMS
TOP VIEW
• Standardized Symmetrical Output Characteristics
• Medium Speed Operation: tPHL, tPLH = 30ns (typ) at
10V
14 VDD
A 1
G=A 2
• 100% Tested for Quiescent Current at 20V
13 F
B 3
• Maximum Input Current of 1µA at 18V Over Full Package Temperature Range; 100nA at 18V and +25oC
12 L = F
H=B 4
• Meets All Requirements of JEDEC Tentative Standard
No. 13B, “Standard Specifications for Description of
‘B’ Series CMOS Devices”
11 E
C 5
10 K = E
I=C 6
9 D
VSS 7
8 J=D
Applications
• Logic Inversion
• Pulse Shaping
Functional Diagram
• Oscillators
• High-Input-Impedance Amplifiers
1
Description
G=A
3
CD4069UBMS types consist of six CMOS inverter circuits.
These devices are intended for all general-purpose inverter
applications where the medium-power TTL-drive and logiclevel conversion capabilities of circuits such as the CD4009
and CD4049 Hex Inverter/Buffers are not required.
B
The CD4069UBMS is supplied in these 14 lead outline packages:
D
Braze Seal DIP
H4H
Frit Seal DIP
H1B
Ceramic Flatpack
H3W
2
A
4
H=B
5
6
C
I=C
9
8
J=D
11
10
E
VSS = 7
VDD = 14
K=E
13
F
12
L=F
Schematic Diagram
VDD
VDD
G=A
G
A
1(3, 5, 9, 11, 13)
2(4, 6, 8, 10, 12)
VSS
FIGURE 1. SCHEMATIC DIAGRAM OF 1 OF 6 IDENTICAL INVERTERS
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
7-464
File Number
3321
Specifications CD4069UBMS
Absolute Maximum Ratings
Reliability Information
DC Supply Voltage Range, (VDD) . . . . . . . . . . . . . . . -0.5V to +20V
(Voltage Referenced to VSS Terminals)
Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VDD +0.5V
DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .±10mA
Operating Temperature Range . . . . . . . . . . . . . . . . -55oC to +125oC
Package Types D, F, K, H
Storage Temperature Range (TSTG) . . . . . . . . . . . -65oC to +150oC
Lead Temperature (During Soldering) . . . . . . . . . . . . . . . . . +265oC
At Distance 1/16 ± 1/32 Inch (1.59mm ± 0.79mm) from case for
10s Maximum
Thermal Resistance . . . . . . . . . . . . . . . .
θja
θjc
Ceramic DIP and FRIT Package . . . . . 80oC/W
20oC/W
Flatpack Package . . . . . . . . . . . . . . . . 70oC/W
20oC/W
o
Maximum Package Power Dissipation (PD) at +125 C
For TA = -55oC to +100oC (Package Type D, F, K) . . . . . . 500mW
For TA = +100oC to +125oC (Package Type D, F, K) . . . . . Derate
Linearity at 12mW/oC to 200mW
Device Dissipation per Output Transistor . . . . . . . . . . . . . . . 100mW
For TA = Full Package Temperature Range (All Package Types)
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER
Supply Current
SYMBOL
IDD
CONDITIONS (NOTE 1)
VDD = 20V, VIN = VDD or GND
LIMITS
GROUP A
SUBGROUPS
TEMPERATURE
MIN
MAX
UNITS
1
+25oC
-
0.5
µA
-
50
µA
-
0.5
µA
2
VDD = 18V, VIN = VDD or GND
Input Leakage Current
Input Leakage Current
IIL
IIH
VIN = VDD or GND
VIN = VDD or GND
VDD = 20
+125
oC
-55oC
3
o
1
+25 C
-100
-
nA
2
+125oC
-1000
-
nA
VDD = 18V
3
-55oC
-100
-
nA
VDD = 20
1
+25oC
-
100
nA
2
+125oC
-
1000
nA
3
-55oC
-
100
nA
-
50
mV
-
V
VDD = 18V
Output Voltage
VOL15
VDD = 15V, No Load
1, 2, 3
+25oC,
+125oC,
-55oC
Output Voltage
VOH15
VDD = 15V, No Load (Note 3)
1, 2, 3
+25oC, +125oC, -55oC 14.95
Output Current (Sink)
IOL5
VDD = 5V, VOUT = 0.4V
1
+25oC
0.53
-
mA
Output Current (Sink)
IOL10
VDD = 10V, VOUT = 0.5V
1
+25oC
1.4
-
mA
Output Current (Sink)
IOL15
VDD = 15V, VOUT = 1.5V
1
+25oC
3.5
-
mA
Output Current (Source)
IOH5A
VDD = 5V, VOUT = 4.6V
1
+25oC
-
-0.53
mA
-
-1.8
mA
-
-1.4
mA
Output Current (Source)
IOH5B
VDD = 5V, VOUT = 2.5V
1
+25oC
Output Current (Source)
IOH10
VDD = 10V, VOUT = 9.5V
1
+25oC
-
-3.5
mA
-2.8
-0.7
V
0.7
2.8
V
Output Current (Source)
IOH15
VDD = 15V, VOUT = 13.5V
1
+25oC
N Threshold Voltage
VNTH
VDD = 10V, ISS = -10µA
1
+25oC
VSS = 0V, IDD = 10µA
1
+25oC
VDD = 2.8V, VIN = VDD or GND
7
+25oC
VDD = 20V, VIN = VDD or GND
7
+25oC
VDD = 18V, VIN = VDD or GND
8A
+125oC
VDD = 3V, VIN = VDD or GND
8B
P Threshold Voltage
Functional
VPTH
F
Input Voltage Low
(Note 2)
VIL
VDD = 5V, VOH > 4.5V, VOL < 0.5V
1, 2, 3
Input Voltage High
(Note 2)
VIH
VDD = 5V, VOH > 4.5V, VOL < 0.5V
1, 2, 3
Input Voltage Low
(Note 2)
VIL
VDD = 15V, VOH > 13.5V,
VOL < 1.5V
Input Voltage High
(Note 2)
VIH
VDD = 15V, VOH > 13.5V,
VOL < 1.5V
7-465
V
-55oC
+25oC,
NOTES: 1. All voltages referenced to device GND, 100% testing being
implemented.
2. Go/No Go test with limits applied to inputs.
VOH > VOL <
VDD/2 VDD/2
+125oC, -55oC
-
1.0
V
+25oC, +125oC, -55oC
4.0
-
V
1, 2, 3
+25oC, +125oC, -55oC
-
2.5
V
1, 2, 3
+25oC, +125oC, -55oC
12.5
-
V
3. For accuracy, voltage is measured differentially to VDD. Limit
is 0.050V max.
Specifications CD4069UBMS
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER
Propagation Delay
Transition Time
SYMBOL
TPHL
TPLH
CONDITIONS (NOTES 1, 2)
GROUP A
SUBGROUPS TEMPERATURE
VDD = 5V, VIN = VDD or GND
9
10, 11
TTHL
TTLH
VDD = 5V, VIN = VDD or GND
9
10, 11
+25oC
+125oC,
-55oC
+25oC
+125oC,
-55oC
LIMITS
MIN
MAX
UNITS
-
110
ns
-
149
ns
-
200
ns
-
270
ns
NOTES:
1. CL = 50pF, RL = 200K, Input TR, TF < 20ns.
2. -55oC and +125oC limits guaranteed, 100% testing being implemented.
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS
LIMITS
PARAMETER
Supply Current
SYMBOL
IDD
CONDITIONS
NOTES
VDD = 5V, VIN = VDD or GND
VDD = 10V, VIN = VDD or GND
1, 2
1, 2
TEMPERATURE
MIN
MAX
UNITS
-55 C, +25 C
-
0.25
µA
+125oC
-
7.5
µA
-55oC, +25oC
-
0.5
µA
-
15
µA
o
o
+125
VDD = 15V, VIN = VDD or GND
1, 2
oC
-
0.5
µA
+125oC
-
30
µA
-55oC,
+25oC
Output Voltage
VOL
VDD = 5V, No Load
1, 2
+25oC, +125oC,
-55oC
-
50
mV
Output Voltage
VOL
VDD = 10V, No Load
1, 2
+25oC, +125oC,
-55oC
-
50
mV
Output Voltage
VOH
VDD = 5V, No Load
1, 2
+25oC, +125oC,
-55oC
4.95
-
V
Output Voltage
VOH
VDD = 10V, No Load
1, 2
+25oC, +125oC,
-55oC
9.95
-
V
Output Current (Sink)
IOL5
VDD = 5V, VOUT = 0.4V
1, 2
+125oC
0.36
-
mA
-55oC
0.64
-
mA
+125 C
0.9
-
mA
-55oC
1.6
-
mA
+125oC
2.4
-
mA
-55oC
4.2
-
mA
+125oC
-
-0.36
mA
-55oC
-
-0.64
mA
+125oC
-
-1.15
mA
-55oC
-
-2.0
mA
+125oC
-
-0.9
mA
Output Current (Sink)
Output Current (Sink)
Output Current (Source)
Output Current (Source)
Output Current (Source)
Output Current (Source)
Input Voltage Low
IOL10
IOL15
IOH5A
IOH5B
IOH10
IOH15
VIL
VDD = 10V, VOUT = 0.5V
1, 2
VDD = 15V, VOUT = 1.5V
1, 2
VDD = 5V, VOUT = 4.6V
1, 2
VDD = 5V, VOUT = 2.5V
1, 2
VDD = 10V, VOUT = 9.5V
1, 2
VDD =15V, VOUT = 13.5V
1, 2
VDD = 10V, VOH > 9V, VOL < 1V
1, 2
o
-55oC
-
-2.6
mA
+125oC
-
-2.4
mA
-55oC
-
-4.2
mA
+25oC, +125oC,
-
2
V
8
-
V
-55oC
Input Voltage High
VIH
VDD = 10V, VOH > 9V, VOL < 1V
7-466
1, 2
+25oC, +125oC,
-55oC
Specifications CD4069UBMS
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)
LIMITS
PARAMETER
SYMBOL
Propagation Delay
TPHL
TPLH
Transition Time
VDD = 10V
TTHL
TTLH
Input Capacitance
CONDITIONS
TEMPERATURE
MIN
MAX
UNITS
1, 2, 3
+25oC
-
60
ns
o
VDD = 15V
1, 2, 3
+25 C
-
50
ns
VDD = 10V
1, 2, 3
+25oC
-
100
ns
1, 2, 3
oC
-
80
ns
+25oC
-
15
pF
VDD = 15V
CIN
NOTES
Any Input
+25
1, 2
NOTES:
1. All voltages referenced to device GND.
2. The parameters listed on Table 3 are controlled via design or process and are not directly tested. These parameters are characterized on
initial design release and upon design changes which would affect these characteristics.
3. CL = 50pF, RL = 200K, Input TR, TF < 20ns.
TABLE 4. POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS
LIMITS
PARAMETER
SYMBOL
CONDITIONS
NOTES
TEMPERATURE
MIN
MAX
UNITS
IDD
VDD = 20V, VIN = VDD or GND
1, 4
+25oC
-
2.5
µA
1, 4
+25oC
-2.8
-0.2
V
VDD = 10V, ISS = -10µA
1, 4
+25oC
-
±1
V
VSS = 0V, IDD = 10µA
1, 4
+25oC
0.2
2.8
V
1, 4
+25oC
-
±1
V
1
+25oC
VOH >
VDD/2
VOL <
VDD/2
V
1, 2, 3, 4
+25oC
-
1.35 x
+25oC
Limit
ns
Supply Current
N Threshold Voltage
VNTH
N Threshold Voltage
Delta
∆VTN
P Threshold Voltage
VTP
P Threshold Voltage
Delta
∆VTP
Functional
F
VDD = 10V, ISS = -10µA
VSS = 0V, IDD = 10µA
VDD = 18V, VIN = VDD or GND
VDD = 3V, VIN = VDD or GND
Propagation Delay Time
TPHL
TPLH
VDD = 5V
3. See Table 2 for +25oC limit.
NOTES: 1. All voltages referenced to device GND.
2. CL = 50pF, RL = 200K, Input TR, TF < 20ns.
4. Read and Record
TABLE 5. BURN-IN AND LIFE TEST DELTA PARAMETERS +25OC
PARAMETER
SYMBOL
DELTA LIMIT
Supply Current - SSI
IDD
±0.1µA
Output Current (Sink)
IOL5
± 20% x Pre-Test Reading
IOH5A
± 20% x Pre-Test Reading
Output Current (Source)
TABLE 6. APPLICABLE SUBGROUPS
MIL-STD-883
METHOD
GROUP A SUBGROUPS
Initial Test (Pre Burn-In)
100% 5004
1, 7, 9
IDD, IOL5, IOH5A
Interim Test 1 (Post Burn-In)
100% 5004
1, 7, 9
IDD, IOL5, IOH5A
Interim Test 2 (Post Burn-In)
100% 5004
1, 7, 9
IDD, IOL5, IOH5A
100% 5004
1, 7, 9, Deltas
100% 5004
1, 7, 9
CONFORMANCE GROUP
PDA (Note 1)
Interim Test 3 (Post Burn-In)
PDA (Note 1)
Final Test
Group A
100% 5004
1, 7, 9, Deltas
100% 5004
2, 3, 8A, 8B, 10, 11
Sample 5005
1, 2, 3, 7, 8A, 8B, 9, 10, 11
7-467
READ AND RECORD
IDD, IOL5, IOH5A
Specifications CD4069UBMS
TABLE 6. APPLICABLE SUBGROUPS (Continued)
MIL-STD-883
METHOD
GROUP A SUBGROUPS
Subgroup B-5
Sample 5005
1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas
Subgroup B-6
Sample 5005
1, 7, 9
Sample 5005
1, 2, 3, 8A, 8B, 9
CONFORMANCE GROUP
Group B
Group D
READ AND RECORD
Subgroups 1, 2, 3, 9, 10, 11
Subgroups 1, 2 3
NOTE: 1. 5% Parameteric, 3% Functional; Cumulative for Static 1 and 2.
TABLE 7. TOTAL DOSE IRRADIATION
CONFORMANCE GROUPS
TEST
READ AND RECORD
MIL-STD-883
METHOD
PRE-IRRAD
POST-IRRAD
PRE-IRRAD
POST-IRRAD
5005
1, 7, 9
Table 4
1, 9
Table 4
Group E Subgroup 2
TABLE 8. BURN-IN AND IRRADIATION TEST CONNECTIONS
OSCILLATOR
OPEN
GROUND
VDD
Static Burn-In 1
(Note 1)
FUNCTION
2, 4, 6, 8, 10, 12
1, 3, 5, 7, 9, 11,
13
14
Static Burn-In 2
(Note 1)
2, 4, 6, 8, 10, 12
7
1, 3, 5, 9, 11, 13,
14
Dynamic Burn-In
(Note 1)
-
7
14
2, 4, 6, 8, 10, 12
7
1, 3, 5, 9, 11, 13,
14
Irradiation
(Note 2)
9V ± -0.5V
50kHz
2, 4, 6, 8, 10, 12
1, 3, 5, 9, 11, 13
25kHz
NOTES:
1. Each pin except VDD and GND will have a series resistor of 10K ± 5%, VDD = 18V ± 0.5V
2. Each pin except VDD and GND will have a series resistor of 47K ± 5%; Group E, Subgroup 2, sample size is 4 dice/wafer, 0 failures,
VDD = 10V ± 0.5V
Typical Performance Characteristics
17.5
VI
VO
15.0
12.5
10V
10.0
7.5
5V
5.0
SUPPLY VOLTAGE
(VDD) = 15V
15.0
AMBIENT TEMPERATURE (TA)
= +125oC
12.5
10V
+125oC
5V
5.0
7.5
10.0 12.5
INPUT VOLTAGE (VI) (V)
0
15.0
-55oC
5.0
2.5
2.5
-55oC
7.5
2.5
0
-55oC
10.0
+125oC
SUPPLY VOLTAGE
(VDD) = 15V
OUTPUT VOLTAGE (VO) (V)
OUTPUT VOLTAGE (VO) (V)
AMBIENT TEMPERATURE (TA) = +25oC
2.5
5.0
7.5
10.0
12.5 15.0
17.5 20.0
INPUT VOLTAGE (VI) (V)
FIGURE 2. MINIMUM AND MAXIMUM VOLTAGE TRANSFER
CHARACTERISTICS
FIGURE 3. TYPICAL VOLTAGE TRANSFER CHARACTERISTICS AS A FUNCTION OF TEMPERATURE
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate
and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which
may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
468
CD4069UBMS
Typical Performance Characteristics (Continued)
SUPPLY VOLTAGE
(VDD) = 15V
12.5
15.0
12.5
10V
ID
10.0
10.0
15V
7.5
7.5
5V
5.0
5.0
10V
2.5
2.5
5V
0
2.5
0
5.0
30
GATE-TO-SOURCE VOLTAGE (VGS) = 15V
25
20
15
10V
10
5
5V
0
5
10
15
DRAIN-TO-SOURCE VOLTAGE (VDS) (V)
7.5
10.0 12.5 15.0
INPUT VOLTAGE (VI) (V)
FIGURE 4. TYPICAL CURRENT AND VOLTAGE TRANSFER
CHARACTERISTICS)
OUTPUT LOW (SINK) CURRENT (IOL) (mA)
AMBIENT TEMPERATURE (TA) = +25oC
FIGURE 5. TYPICAL OUTPUT LOW (SINK) CURRENT
CHARACTERISTICS
DRAIN-TO-SOURCE VOLTAGE (VDS) (V)
-15
-10
-5
AMBIENT TEMPERATURE (TA) = +25oC
AMBIENT TEMPERATURE (TA) = +25oC
GATE-TO-SOURCE VOLTAGE (VGS) = -5V
15.0
GATE-TO-SOURCE VOLTAGE (VGS) = 15V
0
0
-5
-10
12.5
-15
10.0
-10V
10V
7.5
-20
-25
5.0
-15V
2.5
-30
5V
0
5
10
15
DRAIN-TO-SOURCE VOLTAGE (VDS) (V)
AMBIENT TEMPERATURE (TA) = +25oC
0
0
GATE-TO-SOURCE VOLTAGE (VGS) = -5V
-5
-10V
-15V
-10
-15
OUTPUT HIGH (SOURCE) CURRENT (IOH) (mA)
DRAIN-TO-SOURCE VOLTAGE (VDS) (V)
-15
-10
-5
FIGURE 7. TYPICAL OUTPUT HIGH (SOURCE) CURRENT
CHARACTERISTICS
PROPAGATION DELAY TIME (tPLH, tPHL) (ns)
FIGURE 6. MINIMUM OUTPUT LOW (SINK) CURRENT
CHARACTERISTICS
OUTPUT HIGH (SOURCE) CURRENT (IOH) (mA)
OUTPUT VOLTAGE (VO) (V)
15.0
17.5
OUTPUT LOW (SINK) CURRENT (IOL) (mA)
AMBIENT TEMPERATURE (TA) = +25oC
SUPPLY CURRENT (IDD) (mA)
17.5
AMBIENT TEMPERATURE (TA) = +25oC
100
SUPPLY VOLTAGE (VDD) = 5V
80
60
10V
40
15V
20
0
FIGURE 8. MINIMUM OUTPUT HIGH (SOURCE) CURRENT
CHARACTERISTICS
20
40
60
80
100
LOAD CAPACITANCE (CL) (pF)
FIGURE 9. TYPICAL PROPAGATION DELAY TIME vs LOAD
CAPACITANCE
7-469
CD4069UBMS
AMBIENT TEMPERATURE (TA) = +25oC
AMBIENT TEMPERATURE (TA) = +25oC
TRANSITION TIME (tTHL, tTLH) (ns)
PROPAGATION DELAY TIME (tPHL, tPLH) (ns)
Typical Performance Characteristics (Continued)
120
100
80
60
40
LOAD CAPACITANCE (CL) = 50pF
20
200
SUPPLY VOLTAGE (VDD) = 5V
150
100
10V
15V
50
15pF
0
5
10
15
SUPPLY VOLTAGE (VDD) (V)
0
0
20
FIGURE 10. TYPICAL PROPAGATION DELAY TIME vs SUPPLY
VOLTAGE
20
40
60
80
100
LOAD CAPACITANCE (CL) (pF)
FIGURE 11. TYPICAL TRANSITION TIME vs LOAD
CAPACITANCE
6
4
NORMALIZED PROPAGATION DELAY TIME
(tPHL, tPLH)
POWER DISSIPATION PER INVERTER (µW)
105 8
SUPPLY VOLTAGE (VDD) = 15V
2
104
8
6
4
2
103 8
10V
6
4
10V
2
102
5V
8
6
4
LOAD CAPACITANCE (CL) = 50pF
(11pF FIXTURE + 39pF EXT)
CL = 15pF (11pF FIXTURE +4pF EXT)
AMBIENT TEMPERATURE (TA) = +25oC
2
10
2
4 6 8
2
4 6 8
2
4 6 8
103
104
102
INPUT FREQUENCY (fI) (kHz)
10
2
AMBIENT TEMPERATURE (TA) = -40oC TO +125oC
5
4
3
2
1
4 6 8
2
105
FIGURE 12. TYPICAL DYNAMIC POWER DISSIPATION vs
FREQUENCY
4
6
8
10
12
SUPPLY VOLTAGE (VDD) VOLTS
14
FIGURE 13. VARIATION OF NORMALIZED PROPAGATION DELAY
TIME (tPHL AND tPLH) WITH SUPPLY VOLTAGE
VDD
PULSE GEN.
tr = tf = 20ns
IN
50Ω
1
14
2
13
3
12
4
11
5
10
6
9
7
8
tr
tf
VDD
90%
50%
10%
INPUT
tTHL
OUT
CL = 50pF
16
tTLH
200kΩ
tPHL
tPLH
FIGURE 14. DYNAMIC ELECTRICAL CHARACTERISTICS TEST CIRCUIT AND WAVEFORMS
7-470
VDD
90%
50%
10%
INVERTING
OUTPUT
0
0
CD4069UBMS
1/3 CD4069
1/6 CD4069
OUT
IN
RT
RS
CT
FOR TYPICAL COMPONENT
VALUES AND CIRCUIT PERFORMANCE,
SEE APPLICATION NOTE AN-6466
Rf ≈ 10 MEG
FIGURE 15. HIGH-INPUT IMPEDANCE AMPLIFIER
FIGURE 16. TYPICAL RC OSCILLATOR CIRCUIT
1/3 CD4069
RS
IN
1/6 CD4069
FOR TYPICAL COMPONENT
VALUES AND CIRCUIT
PERFORMANCE, SEE
APPLICATION NOTES:
AN-6086 AND AN-6539
Rf
XTAL
CS
OUT
Rf
UPPER SWITCHING POINT
RS
VP ≈
RS + Rf
VDD
Rf
2
•
LOWER SWITCHING POINT
CT
VN ≈
VDD
Rf - RS
2
Rf
Rf > RS
FIGURE 17. TYPICAL CRYSTAL OSCILLATOR CIRCUIT
•
FIGURE 18. INPUT PULSE SHAPING CIRCUIT
(SCHMITT TRIGGER)
Chip Dimensions and Pad Layout
6
5
4
3
2
7
1
14
8
13
9
10
11
12
Dimension in parenthesis are in millimeters and are
derived from the basic inch dimensions as indicated.
Grid graduations are in mils (10-3 inch).
METALLIZATION:
PASSIVATION:
Thickness: 11kÅ − 14kÅ,
AL.
10.4kÅ - 15.6kÅ, Silane
BOND PADS: 0.004 inches X 0.004 inches MIN
DIE THICKNESS: 0.0198 inches - 0.0218 inches
7-471
DIE SIZE:
48 X 48 (45 - 53)
(1.143 - 1.346)
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