TSOP572.., TSOP574.. www.vishay.com Vishay Semiconductors IR Receiver Modules for Remote Control Systems FEATURES • Improved immunity against HF and RF noise • Height of 0.8 mm • ± 75° half angle sensitivity • Low supply current • Photo detectors and preamplifier in one package 22531-1 • Internal filter for PCM frequency • Supply voltage: 2.5 V to 5.5 V, typically even 2.0 V to 5.5 V is possible • Improved immunity against optical noise • Insensitive to supply voltage ripple and noise • Material categorization: for definitions of compliance please see www.vishay.com/doc?99912 ORDERING CODE Taping: DESCRIPTION TSOP57...TT1 - top view taped The TSOP57... series are miniaturized SMD IR receiver modules for infrared remote control systems. A PIN diode and a preamplifier are assembled on a PCB, the epoxy package contains an IR filter. TSOP57...TT2 - top view taped The demodulated output signal can be directly connected to a microprocessor for decoding. The TSOP574.. series devices are optimized to suppress almost all spurious pulses from Wi-Fi and CFL sources. They may suppress some data signals if continuously transmitted. The TSOP572.. series devices are provided primarily for compatibility with old AGC2 designs. New designs should prefer the TSOP574.. series containing the newer AGC4. These components have not been qualified according to automotive specifications. PARTS TABLE LEGACY, FOR LONG BURST REMOTE CONTROLS (AGC2) RECOMMENDED FOR LONG BURST CODES (AGC4) 36 kHz TSOP57236 TSOP57436 (1)(2)(3) 38 kHz TSOP57238 TSOP57438 (4)(5) 40 kHz TSOP57240 TSOP57440 56 kHz TSOP57256 TSOP57456 (6)(7) AGC Carrier frequency Package Belobog Pinning 1 = OUT, 2, 3, 6, 7, 8 = GND, 4, 5 = VS Dimensions (mm) 3.95 W x 3.95 H x 0.8 D Mounting SMD Application Best remote control code Rev. 1.9, 10-Nov-15 Remote control (1) RC-5 (2) RC-6 (3) Panasonic 1 (4) NEC (5) Sharp (6) r-step (7) Thomson RCA Document Number: 82434 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 TSOP572.., TSOP574.. www.vishay.com Vishay Semiconductors BLOCK DIAGRAM APPLICATION CIRCUIT 17170-10 4, 5 Transmitter with TSALxxxx VS 33 kΩ Input OUT Demodulator Band pass AGC VS VO GND GND Control circuit µC OUT 2, 3, 6, 7, 8 PIN + VS C1 Circuit 1 R1 IR receiver GND The external components R1 and C1 are optional to improve the robustness against electrical overstress (typical values are R1 = 100 Ω, C1 = 0.1 µF). 20445-6 ABSOLUTE MAXIMUM RATINGS PARAMETER SYMBOL VALUE Supply voltage TEST CONDITION VS -0.3 to +6 V Supply current IS 5 mA Output voltage VO -0.3 to (VS + 0.3) V Output current IO 5 mA Junction temperature Tj 100 °C Tstg -25 to +85 °C Tamb -25 to +85 °C Ptot 10 mW Storage temperature range Operating temperature range Power consumption Tamb ≤ 85 °C UNIT Note • Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect the device reliability. ELECTRICAL AND OPTICAL CHARACTERISTICS (Tamb = 25 °C, unless otherwise specified) PARAMETER TEST CONDITION SYMBOL MIN. TYP. MAX. VS 2.5 - 5.5 V VS = 5 V, Ev = 0 ISD 0.55 0.7 0.9 mA Ev = 40 klx, sunlight ISH - 0.8 - mA Ev = 0, IR diode TSAL6200, IF = 250 mA, test signal see fig. 1 d - 40 - m Output voltage low IOSL = 0.5 mA, Ee = 0.7 mW/m2, test signal see fig. 1 VOSL - - 100 mV Minimum irradiance Pulse width tolerance: tpi - 5/fo < tpo < tpi + 6/fo, test signal see fig. 1 Ee min. - 0.2 0.4 mW/m2 Maximum irradiance tpi - 5/fo < tpo < tpi + 6/fo, test signal see fig. 1 Ee max. 50 - - W/m2 Directivity Angle of half transmission distance ϕ1/2 - ± 75 - deg Supply voltage Supply current Transmission distance Rev. 1.9, 10-Nov-15 2 UNIT Document Number: 82434 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 TSOP572.., TSOP574.. www.vishay.com Vishay Semiconductors TYPICAL CHARACTERISTICS (Tamb = 25 °C, unless otherwise specified) Optical Test Signal 0.8 (IR diode TSAL6200, IF = 0.4 A, 30 pulses, f = f0, t = 10 ms) ton, toff - Output Pulse Width (ms) Ee t tpi * * tpi T 10/f0 is recommended for optimal function Output Signal VO 1) 7/f0 < td < 15/f0 2) t - 5/f < t < t + 6/f pi 0 po pi 0 VOH VOL 16110 ton 0.7 0.6 0.5 0.3 0.2 0 0.1 td 1) tpo 2) 102 103 104 105 1.2 Ee min./Ee - Relative Responsivity tpo - Output Pulse Width (ms) 10 Fig. 4 - Output Pulse Diagram Output pulse width 0.9 0.8 Input burst length 0.7 0.6 0.5 0.4 0.3 0.2 λ = 950 nm, optical test signal, fig.1 0.1 0 0.1 1 Ee - Irradiance (mW/m2) t 1.0 1.0 0.8 0.6 0.4 f = f0 ± 5 % Δf(3 dB) = f0/10 0.2 0.0 1 10 102 103 104 0.7 Ee - Irradiance (mW/m2) 0.9 1.1 1.3 f/f0 - Relative Frequency 16925 Fig. 2 - Pulse Length and Sensitivity in Dark Ambient Fig. 5 - Frequency Dependance of Responsivity Ee min. - Threshold Irradiance (mW/m2) Optical Test Signal 600 µs t 600 µs t = 60 ms VO λ = 950 nm, optical test signal, fig. 3 0.1 Fig. 1 - Output Active Low Ee toff 0.4 94 8134 Output Signal, (see fig. 4) VOH VOL t on t off Correlation with ambient light sources: 4.5 10 W/m2 = 1.4 klx (std. illum. A, T = 2855 K) 2 4.0 10 W/m = 8.2 klx (daylight, T = 5900 K) 3.5 3.0 Wavelength of ambient illumination: λ = 950 nm 2.5 2.0 1.5 1.0 0.5 0 0.01 0.1 1 10 100 Ee - Ambient DC Irradiance (W/m2) t Fig. 3 - Output Function Rev. 1.9, 10-Nov-15 5.0 Fig. 6 - Sensitivity in Bright Ambient 3 Document Number: 82434 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 TSOP572.., TSOP574.. Vishay Semiconductors 1.0 1.0 S(λ)rel - Relative Spectral Sensitivity Ee min. - Threshold Irradiance (mW/m2) www.vishay.com f = f0 0.9 0.8 0.7 f = 30 kHz 0.6 0.5 f = 20 kHz 0.4 f = 10 kHz 0.3 0.2 0.1 f = 100 Hz 0 1 10 100 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 750 800 850 900 950 1000 1050 1100 1150 1000 ΔVsRMS - AC Voltage on DC Supply Voltage (mV) λ - Wavelength (nm) Fig. 7 - Sensitivity vs. Supply Voltage Disturbances Fig. 10 - Relative Spectral Sensitivity vs. Wavelength 0.8 Max. Envelope Duty Cycle 0.7 -20° 0.6 -10° 0° 10° 20° -30° TSOP572.. 30° -40° 0.5 40° -50° 0.4 50° 60° -60° 0.3 -70° 0.2 TSOP574.. 70° -80° 80° 0.1 2 0 f = 38 kHz, Ee = 2 mW/m 0 21396_15 20 40 60 80 100 0.1 21947 120 0.8 0.35 0.7 Ee min. - Sensitivity (mW/m2) Ee min. - Sensitivity (mW/m2) 0.7 0.9 Fig. 11 - Horizontal Directivity 0.40 0.30 0.25 0.20 0.15 0.10 0.05 -10 10 30 50 70 0.6 0.5 0.4 0.3 0.2 0.1 0 1.5 90 Tamb - Ambient Temperature (°C) 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 VS - Supply Voltage (V) Fig. 9 - Sensitivity vs. Ambient Temperature Rev. 1.9, 10-Nov-15 0.5 Burst Length (number of cycles/burst) Fig. 8 - Max. Envelope Duty Cycle vs. Burst Length 0 -30 0.3 Fig. 12 - Sensitivity vs. Supply Voltage 4 Document Number: 82434 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 TSOP572.., TSOP574.. www.vishay.com Vishay Semiconductors SUITABLE DATA FORMAT IR Signal The TSOP572.., TSOP574.. series is designed to suppress spurious output pulses due to noise or disturbance signals. The devices can distinguish data signals from noise due to differences in frequency, burst length, and envelope duty cycle. The data signal should be close to the device’s band-pass center frequency (e.g. 38 kHz) and fulfill the conditions in the table below. When a data signal is applied to the TSOP572.., TSOP574.. in the presence of a disturbance, the sensitivity of the receiver is automatically reduced by the AGC to insure that no spurious pulses are present at the receiver’s output. Some examples which are suppressed are: 0 • DC light (e.g. from tungsten bulbs sunlight) 5 • Continuous signals at any frequency 10 15 20 Time (ms) 16920 Fig. 13 - IR Signal from Fluorescent Lamp with Low Modulation • Strongly or weakly modulated patterns from fluorescent lamps with electronic ballasts (see fig. 13 or fig. 14) IR Signal • 2.4 GHz and 5 GHz Wi-Fi 0 16921 5 10 15 20 Time (ms) Fig. 14 - IR Signal from Fluorescent Lamp with High Modulation TSOP572.. TSOP574.. Minimum burst length 10 cycles/burst 10 cycles/burst After each burst of length a minimum gap time is required of 10 to 70 cycles ≥ 10 cycles 10 to 42 cycles ≥ 10 cycles 70 cycles > 4 x burst length 42 cycles > 10 x burst length For bursts greater than a minimum gap time in the data stream is needed of Maximum number of continuous short bursts/second 800 1300 NEC code Yes Preferred RC5/RC6 code Yes Preferred Thomson 56 kHz code Yes Preferred Mild disturbance patterns are suppressed (example: signal pattern of fig. 13) Complex and critical disturbance patterns are suppressed (example: signal pattern of fig. 14 or highly dimmed LCDs) Suppression of interference from fluorescent lamps Note • For data formats with short bursts please see the datasheet for TSOP573.. Rev. 1.9, 10-Nov-15 5 Document Number: 82434 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 TSOP572.., TSOP574.. www.vishay.com Vishay Semiconductors PACKAGE DIMENSIONS in millimeters 4 x 0.75 = 3 Not indicated tolerances ± 0.1 0.475 0.55 (0.7) (0.95) (0.3) (0.3) technical drawings according to DIN specifications (1.8) 0.75± 0.05 Pinning from topview 6 GND (GND) GND (0.3) (0.4) 7(2) 8 (8 x) 0.55 0.35± 0.05 1.5 0.15 (GND) Vs 1 (Vs) Out Pin 1 identification (GND) 0.8 3 2 3 4 5 (2) (2) (2) Proposed pad layout from component side (dim. for reference only) 3.95 (3.4)(1) (2.75) (0.8)(4x) (3.95) 3.95 (1)(2.75) (1)(1.9) (3.95) (3) Pin 1 Identification marking area (0.35) (4 x) Drawing-No.: 6.550-5315.01-4 Issue: 2; 12.02.14 Notes (1) Optically effective area (2) Pins connected internally. It is not necessary to connect externally. Rev. 1.9, 10-Nov-15 6 Document Number: 82434 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 TSOP572.., TSOP574.. www.vishay.com Vishay Semiconductors ASSEMBLY INSTRUCTIONS Reflow Soldering Manual Soldering • Reflow soldering must be done within 168 h while stored under a max. temperature of 30 °C, 60 % RH after opening the dry pack envelope • Use a soldering iron of 25 W or less. Adjust the temperature of the soldering iron below 300 °C • Set the furnace temperatures for pre-heating and heating in accordance with the reflow temperature profile as shown in the diagram. Exercise extreme care to keep the maximum temperature below 260 °C. The temperature shown in the profile means the temperature at the device surface. Since there is a temperature difference between the component and the circuit board, it should be verified that the temperature of the device is accurately being measured • Handle products only after the temperature has cooled off • Finish soldering within 3 s • Handling after reflow should be done only after the work surface has been cooled off VISHAY LEAD (Pb)-FREE REFLOW SOLDER PROFILE 300 max. 260 °C 245 °C 255 °C 240 °C 217 °C 250 T (°C) 200 max. 20 s 150 max. 100 s max. 120 s 100 max. Ramp Up 3 °C/s max. Ramp Down 6 °C/s 50 0 0 19800 50 100 150 t (s) 200 250 300 max. 2 cycles allowed ORDERING INFORMATION ORDERING CODE TSOP57..TT1 TSOP57..TT2 PACKAGING Tape and reel VOLUME (1) MOQ: 1800 pcs MOQ: 7000 pcs REMARKS 3.95 mm x 3.95 mm x 0.75 mm Note (1) MOQ: minimum order quantity Rev. 1.9, 10-Nov-15 7 Document Number: 82434 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 TSOP572.., TSOP574.. www.vishay.com Vishay Semiconductors TAPING VERSION TSOP57... DIMENSIONS in millimeters Tape and reel dimensions: Unreel direction TT1 Ø 180 ± 2 = 1800 pcs. TT2 Ø 330 ± 2 = 7000 pcs. Tape position coming out from reel 2± Ø 60 min. Reel size "Y" ØY 0.5 Ø 21 ± 0.8 Ø 13 ± 0.2 Label posted here (12.4) 18.4 max. Empty leader 400 mm min. Parts mounted 100 mm min. with cover tape Leader and trailer tape: Empty trailer 200 mm min. Direction of pulling out Technical drawings according to DIN specifications (Ø 1.5) (2) (5.5) (0.3) (4) Drawing-No.: 9.700-5347.01-4 Issue: 1; 14.11.11 Rev. 1.9, 10-Nov-15 12 ± 0.3 (8) (1.2) (1.75) X 2:1 Not indicated tolerances ± 0.1 8 Document Number: 82434 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 TSOP572.., TSOP574.. www.vishay.com Vishay Semiconductors LABEL Standard bar code labels for finished goods The standard bar code labels are product labels and used for identification of goods. The finished goods are packed in final packing area. The standard packing units are labeled with standard bar code labels before transported as finished goods to warehouses. The labels are on each packing unit and contain Vishay Semiconductor GmbH specific data. VISHAY SEMICONDUCTOR GmbH STANDARD BAR CODE PRODUCT LABEL (finished goods) PLAIN WRITING ABBREVIATION LENGTH Item-description - 18 Item-number INO 8 Selection-code SEL 3 BATCH 10 Data-code COD 3 (YWW) Plant-code PTC 2 Quantity QTY 8 Accepted by ACC - Packed by PCK - LOT-/serial-number Mixed code indicator Origin Long bar code top MIXED CODE - xxxxxxx+ Company logo Type Length Item-number N 8 Plant-code N 2 Sequence-number X 3 Quantity N 8 Total length - 21 Short bar code bottom Type Length Selection-code X 3 Data-code N 3 Batch-number X 10 Filter - 1 Total length - 17 DRY PACKING RECOMMENDED METHOD OF STORAGE The reel is packed in an anti-humidity bag to protect the devices from absorbing moisture during transportation and storage. Dry box storage is recommended as soon as the aluminum bag has been opened to prevent moisture absorption. The following conditions should be observed, if dry boxes are not available: Aluminum bag • Storage temperature 10 °C to 30 °C • Storage humidity ≤ 60 % RH max. Label After more than 168 h under these conditions moisture content will be too high for reflow soldering. In case of moisture absorption, the devices will recover to the former condition by drying under the following condition: Reel FINAL PACKING 192 h at 40 °C + 5 °C / - 0 °C and < 5 % RH (dry air / nitrogen) or 96 h at 60 °C + 5 °C and < 5 % RH for all device containers or 24 h at 125 °C + 5 °C not suitable for reel or tubes. The sealed reel is packed into a cardboard box. A secondary cardboard box is used for shipping purposes. An EIA JEDEC® standard J-STD-020 level 3 label is included on all dry bags. 15973 Rev. 1.9, 10-Nov-15 9 Document Number: 82434 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 TSOP572.., TSOP574.. www.vishay.com Vishay Semiconductors Caution This bag contains MOISTURE-SENSITIVE DEVICES VISHAY SEMICONDUCTORS STANDARD BAR CODE LABELS LEVEL 3 The Vishay Semiconductors standard bar code labels are printed at final packing areas. The labels are on each packing unit and contain Vishay Semiconductors specific data. If blank, see adjacent bar code label 1. Calculated shelf life in sealed bag: 12 months at <40°C and <90% relative humidity (RH) 260 2. Peak package body temperature:_______________________°C If blank, see adjacent bar code label BAR CODE PRODUCT LABEL (example) 3. After bag is opened, devices that will be subjected to reflow solder or other high temperature process must be 168 a) Mounted within:___________________hours of factory conditions If blank, see adjacent bar code label ≤30°C/60% RH, or b) Stored per J-STD-033 4. Devices require bake, before mounting, if: a) Humidity Indicator Card reads > 10% for level 2a - 5a devices or >60% for level 2 devices when read at 23±5°C b) 3a or 3b are not met 5. If baking is required, refer to IPC/JEDEC J-STD-033 for bake procedure 22178 Bag Seal Date:_________________________________________ If blank, see adjacent bar code label Note: Level and body temperature defined by IPC/JEDEC J-STD-020 22650 EIA JEDEC standard J-STD-020 level 3 label is included on all dry bags ESD PRECAUTION Proper storage and handling procedures should be followed to prevent ESD damage to the devices especially when they are removed from the antistatic shielding bag. Electrostatic sensitive devices warning labels are on the packaging. Rev. 1.9, 10-Nov-15 10 Document Number: 82434 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Legal Disclaimer Notice www.vishay.com Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other disclosure relating to any product. Vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or the continuing production of any product. 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Parameters provided in datasheets and/or specifications may vary in different applications and performance may vary over time. All operating parameters, including typical parameters, must be validated for each customer application by the customer’s technical experts. Product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed therein. Except as expressly indicated in writing, Vishay products are not designed for use in medical, life-saving, or life-sustaining applications or for any other application in which the failure of the Vishay product could result in personal injury or death. Customers using or selling Vishay products not expressly indicated for use in such applications do so at their own risk. Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications. 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Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as Halogen-Free follow Halogen-Free requirements as per JEDEC JS709A standards. Please note that some Vishay documentation may still make reference to the IEC 61249-2-21 definition. We confirm that all the products identified as being compliant to IEC 61249-2-21 conform to JEDEC JS709A standards. Revision: 02-Oct-12 1 Document Number: 91000