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March 2007
Features
HCTS14MS
Radiation Hardened
HEX Inverting Schmitt Trigger
Pinouts
• 3 Micron Radiation Hardened SOS CMOS
14 LEAD CERAMIC DUAL-IN-LINE
METAL SEAL PACKAGE (SBDIP)
MIL-STD-1835 CDIP2-T14
TOP VIEW
• Total Dose 200K RAD (Si)
• SEP Effective LET No Upsets: >100 MEV-cm2/mg
• Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/Bit-Day
(Typ)
A1 1
14 VCC
• Dose Rate Survivability: >1 x 1012 RAD (Si)/s
Y1 2
13 A6
• Dose Rate Upset >1010 RAD (Si)/s 20ns Pulse
A2 3
12 Y6
-9
• Cosmic Ray Upset Rate 2 x 10 Errors/Bit Day
Y2 4
11 A5
• Latch-Up Free Under Any Conditions
A3 5
10 Y5
• Military Temperature Range: -55oC to +125oC
Y3 6
9 A4
GND 7
8 Y4
• Significant Power Reduction Compared to LSTTL ICs
• DC Operating Voltage Range: 4.5V to 5.5V
• Input Current Levels Ii ≤ 5μA at VOL, VOH
14 LEAD CERAMIC METAL SEAL
FLATPACK PACKAGE (FLATPACK)
MIL-STD-1835 CDFP3-F14
TOP VIEW
Description
The Intersil HCTS14MS is a Radiation Hardened HEX Inverting
Schmitt trigger. A high on any input forces the output to a Low
state.
A1
1
14
VCC
Y1
2
13
A6
The HCTS14MS utilizes advanced CMOS/SOS technology to
achieve high-speed operation. This device is a member of
radiation hardened, high-speed, CMOS/SOS Logic Family.
A2
3
12
Y6
Y2
4
11
A5
A3
5
10
Y5
The HCTS14MS is supplied in a 14 lead Ceramic flatpack
Package (K suffix) or a 14 lead SBDIP Package (D suffix).
Y3
6
9
A4
GND
7
8
Y4
TRUTH TABLE
Ordering Information
PART
NUMBER
TEMPERATURE
RANGE
SCREENING
LEVEL
HCTS14DMSR
-55oC to +125oC
Intersil Class
S Equivalent
14 Lead SBDIP
HCTS14KMSR
-55oC to +125oC
Intersil Class
S Equivalent
14 Lead Ceramic
Flatpack
PACKAGE
HCTS14D/
Sample
+25oC
Sample
14 Lead SBDIP
HCTS14K/
Sample
+25oC
Sample
14 Lead Ceramic
Flatpack
HCTS14HMSR
+25oC
OUTPUTS
Yn
L
H
H
L
NOTE: L = Logic Level Low,
H = Logic level High
Functional Diagram
An
Yn
Die
DB NA
Die
INPUTS
An
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC
Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a trademark of Intersil
Americas Inc. Copyright © Intersil Americas Inc. 2002, 2007. All Rights Reserved
Spec Number
1
FN
518607
3205.2
Specifications HCTS14MS
Absolute Maximum Ratings
Reliability Information
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7.0V
Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VCC +0.5V
DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . . ±10mA
DC Drain Current, Any One Output. . . . . . . . . . . . . . . . . . . . . . . ±25mA
(All Voltage Reference to the VSS Terminal)
Storage Temperature Range (TSTG). . . . . . . . . . . -65oC to +150oC
Lead Temperature (Soldering 10sec). . . . . . . . . . . . . . . . . . +265oC
Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
Thermal Resistance
θJA
θJC
SBDIP Package. . . . . . . . . . . . . . . . . . . .
74oC/W
24oC/W
Ceramic Flatpack Package . . . . . . . . . . . 116oC/W 30oC/W
Maximum Package Power Dissipation at +125oC Ambient
SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.66W
Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . . . . 0.43W
If device power exceeds package dissipation capability, provide
heat sinking or derate linearly at the following rate:
SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13.5mW/oC
Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . 8.6mW/oC
CAUTION: As with all semiconductors, stress listed under “Absolute Maximum Ratings” may be applied to devices (one at a time) without resulting in permanent
damage. This is a stress rating only. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. The conditions listed
under “Electrical Performance Characteristics” are the only conditions recommended for satisfactory device operation..
Operating Conditions
Input Low Voltage (VIL). . . . . . . . . . . . . . . . . . . . . . . . . 0.0V to 0.5V
Input High Voltage (VIH) . . . . . . . . . . . . . . . . . . . . . . .VCC/2 to VCC
Supply Voltage (VCC) . . . . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V
Input Rise and Fall Times at 4.5V VCC (TR, TF) . . . . Unlimited Max
Operating Temperature Range (TA) . . . . . . . . . . . . -55oC to +125oC
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER
Quiescent Current
Output Current
(Sink)
SYMBOL
ICC
IOL
Output Current
(Source)
IOH
Output Voltage Low
VOL
Output Voltage High
Input Leakage
Current
Noise Immunity
Functional Test
(NOTE 1)
CONDITIONS
VOH
IIN
FN
LIMITS
GROUP
A SUBGROUPS
TEMPERATURE
MIN
MAX
UNITS
1
+25oC
-
10
μA
-
200
μA
4.8
-
mA
VCC = 5.5V,
VIN = VCC or GND
2, 3
VCC = 4.5V, VIH = 4.5V,
VOUT = 0.4V, VIL = 0V
+125oC,
+25oC
1
VCC = 4.5V, VIH = 4.5V,
VOUT = VCC -0.4V,
VIL = 0V
-55oC
o
o
2, 3
+125 C, -55 C
4.0
-
mA
1
+25oC
-4.8
-
mA
-4.0
-
mA
2, 3
+125oC,
-55oC
VCC = 4.5V, VIH = 2.25V,
IOL = 50μA, VIL = 0.5V
1, 2, 3
+25oC, +125oC, -55oC
-
0.1
V
VCC = 5.5V, VIH = 2.75V,
IOL = 50μA, VIL = 0.5V
1, 2, 3
+25oC, +125oC, -55oC
-
0.1
V
VCC = 4.5V, VIH = 2.25V,
IOH = -50μA, VIL = 0.5V
1, 2, 3
+25oC, +125oC, -55oC
VCC
-0.1
-
V
VCC = 5.5V, VIH = 2.75V,
IOH = -50μA, VIL = 0.5V
1, 2, 3
+25oC, +125oC, -55oC
VCC
-0.1
-
V
VCC = 5.5V, VIN = VCC or
GND
1
+25oC
-0.5
0.5
μA
-5.0
5.0
μA
4.0
0.5
V
VCC = 4.5V,
VIH = 2.25V,
VIL = 0.5V
2, 3
7, 8A, 8B
+125oC,
+25o
-55oC
o
o
C, +125 C, -55 C
NOTES:
1. All voltages reference to device GND.
2. For functional tests, VO ≥ 4.0V is recognized as a logic “1”, and VO ≤ 0.5V is recognized as a logic “0”.
Spec Number
2
518607
Specifications HCTS14MS
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER
(NOTES 1, 2)
CONDITIONS
SYMBOL
Propagation Delay
TPHL
TPLH
Input Switch Point
VT+
VT-
VH
LIMITS
GROUP
A SUBGROUPS
TEMPERATURE
MIN
MAX
UNITS
9
+25oC
2
19
ns
10, 11
+125oC, -55oC
2
21
ns
9
+25oC
2
25
ns
10, 11
+125oC, -55oC
2
26
ns
9
+25oC
0.5
2.25
V
10, 11
+125oC, -55oC
0.5
2.25
V
9
+25oC
0.5
2.25
V
10, 11
+125oC, -55oC
0.5
2.25
V
9
+25oC
0.1
1.40
V
10, 11
+125oC, -55oC
0.1
1.40
V
VCC = 4.5V, VIH = 3.0V,
VIL = 0V
VCC = 4.5V, VIH = 3.0V,
VIL = 0V
VCC = 4.5V
VCC = 4.5V
VCC = 4.5V
NOTES:
1. All voltages referenced to device GND.
2. AC measurements assume RL = 500Ω, CL = 50pF, Input TR = TF = 3ns, VIL = GND, VIH = 3V.
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS
LIMITS
PARAMETER
SYMBOL
Capacitance Power
Dissipation
CPD
Input Capacitance
CIN
Output Transition
Time
TTHL
TTLH
CONDITIONS
NOTES
TEMPERATURE
MIN
MAX
UNITS
VCC = 5.0V, VIH = 5.0V,
VIL = 0V, f = 1MHz
1
+25oC
-
26
pF
1
+125oC, -55oC
-
39
pF
VCC = 5.0V, VIH = 5.0V,
VIL = 0V, f = 1MHz
1
+25oC
-
10
pF
1
+125oC
-
10
pF
1
+25oC
-
15
ns
1
+125oC
-
22
ns
VCC = 4.5V, VIH = 4.5V,
VIL = 0V
NOTE:
1. The parameters listed in Table 3 are controlled via design or process parameters. Min and Max Limits are guaranteed but not directly
tested. These parameters are characterized upon initial design release and upon design changes which affect these characteristics.
TABLE 4. DC POST RADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER
Quiescent Current
SYMBOL
ICC
(NOTES 1, 2)
CONDITIONS
200K RAD LIMITS
TEMPERATURE
VCC = 5.5V, VIN = VCC or GND
+25
oC
MIN
MAX
UNITS
-
0.2
mA
Output Current (Sink)
IOL
VCC = 4.5V, VIN = VCC or GND,
VOUT = 0.4V
+25o
C
4.0
-
mA
Output Current (Source)
IOH
VCC = 4.5V, VIN = VCC or GND,
VOUT = VCC -0.4V
+25oC
-4.0
-
mA
Output Voltage Low
VOL
VCC = 4.5V and 5.5V,
VIH = VCC/2
VIL = 0.4V at 200K RAD,
IOL = 50μA
+25oC
-
0.1
V
Spec Number
3
518607
Specifications HCTS14MS
TABLE 4. DC POST RADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)
PARAMETER
SYMBOL
Output Voltage High
TEMPERATURE
MIN
MAX
UNITS
VCC = 4.5V and 5.5V,
VIH = VCC/2,
VIL = 0.4V at 200K RAD,
IOH = -50μA
+25oC
VCC
-0.1
-
V
VCC = 5.5V, VIN = VCC or GND
+25oC
-
±5
μA
VCC = 4.5V, VIH = 2.25V,
VIL = 0.4V at 200K RAD, (Note 3)
+25
oC
-
-
-
TPHL
VCC = 4.5V
+25oC
2
21
ns
TPLH
VCC = 4.5V
+25oC
2
31
ns
VT+
VCC = 4.5
+25oC
0.40
2.25
V
VT-
VCC = 4.5
+25oC
0.40
2.25
V
VH
VCC = 4.5
+25oC
0.10
1.40
V
VOH
Input Leakage Current
IIN
Noise Immunity Functional Test
FN
Propagation Delay
Input Switch Points
200K RAD LIMITS
(NOTES 1, 2)
CONDITIONS
NOTES:
1. All voltages referenced to device GND.
2. AC measurements assume RL = 500Ω, CL = 50pF, Input TR = TF = 3ns, VIL = GND, VIH = VCC.
3. For functional tests, VO ≥ 4.0V is recognized as a logic “1”, and VO ≤ 0.5V is recognized as a logic “0”.
TABLE 5. BURN-IN AND OPERATING LIFE TEST, DELTA PARAMETERS (+25oC)
GROUP B
SUBGROUP
DELTA LIMIT
ICC
5
3μA
IOL/IOH
5
-15% of 0 Hour
PARAMETER
TABLE 6. APPLICABLE SUBGROUPS
GROUP A SUBGROUPS
CONFORMANCE GROUPS
MIL-STD-883 METHOD
TESTED FOR -Q
RECORDED FOR -Q
Initial Test
100% 5004
1, 7, 9
1 (Note 2)
Interim Test
100% 5004
1, 7, 9, Δ
1, Δ (Note 2)
PDA
100% 5004
1, 7, Δ
Final Test
100% 5004
2, 3, 8A, 8B, 10, 11
Group A (Note 1)
Sample 5005
1, 2, 3, 7, 8A, 8B, 9, 10, 11
Subgroup B5
Sample 5005
1, 2, 3, 7, 8A, 8B, 9, 10, 11, Δ
Subgroup B6
Sample 5005
1, 7, 9
Group D
Sample 5005
1, 7, 9
1, 2, 3, Δ (Note 2)
NOTES:
1. Alternate Group A testing in accordance with MIL-STD-883 Method 5005 may be exercised.
2. Table 5 parameters only.
Spec Number
4
518607
Specifications HCTS14MS
TABLE 7. TOTAL DOSE IRRADIATION
TEST
CONFORMANCE
GROUPS
Group E Subgroup 2
READ AND RECORD
METHOD
PRE RAD
POST RAD
PRE RAD
POST RAD
5005
1, 7, 9
Table 4
1, 9
Table 4 (Note 1)
NOTE:
1. Except FN test which will be performed 100% Go/No-Go.
TABLE 8. STATIC AND DYNAMIC BURN-IN TEST CONNECTIONS
OSCILLATOR
OPEN
GROUND
1/2 VCC = 3V ± 0.5V
VCC = 6V ± 0.5V
50kHz
25kHz
-
14
-
-
-
1, 3, 5, 9, 11, 13, 14
-
-
2, 4, 6, 8, 10, 12
14
1, 3, 5, 9, 11, 13
-
STATIC BURN-IN I TEST CONDITIONS (Note 1)
2, 4, 6, 8, 10, 12
1, 3, 5, 7, 9, 11, 13
STATIC BURN-IN II TEST CONNECTIONS (Note 1)
2, 4, 6, 8, 10, 12
7
DYNAMIC BURN-IN I TEST CONNECTIONS (Note 2)
-
7
NOTES:
1. Each pin except VCC and GND will have a resistor of 10kΩ ± 5% for static burn-in.
2. Each pin except VCC and GND will have a resistor of 1kΩ ± 5% for dynamic burn-in.
TABLE 9. IRRADIATION TEST CONNECTIONS
OPEN
GROUND
VCC = 5V ± 0.5V
2, 4, 6, 8, 10, 12
7
1, 3, 5, 9, 11, 13, 14
NOTE: Each pin except VCC and GND will have a resistor of 47kΩ ± 5% for irradiation testing.
Group E, Subgroup 2, sample size is 4 dice/wafer 0 failures.
Spec Number
5
518607
HCTS14MS
Intersil Space Level Product Flow - ‘MS’
Wafer Lot Acceptance (All Lots) Method 5007
(Includes SEM)
100% Interim Electrical Test 1 (T1)
GAMMA Radiation Verification (Each Wafer) Method 1019,
4 Samples/Wafer, 0 Rejects
100% Static Burn-In 2, Condition A or B, 24 hrs. min.,
+125oC min., Method 1015
100% Nondestructive Bond Pull, Method 2023
100% Interim Electrical Test 2 (T2)
Sample - Wire Bond Pull Monitor, Method 2011
100% Delta Calculation (T0-T2)
Sample - Die Shear Monitor, Method 2019 or 2027
100% PDA 1, Method 5004 (Notes 1 and 2)
100% Internal Visual Inspection, Method 2010, Condition A
100% Dynamic Burn-In, Condition D, 240 hrs., +125oC or
Equivalent, Method 1015
100% Delta Calculation (T0-T1)
100% Temperature Cycle, Method 1010, Condition C,
10 Cycles
100% Interim Electrical Test 3 (T3)
100% Constant Acceleration, Method 2001, Condition per
Method 5004
100% Delta Calculation (T0-T3)
100% PDA 2, Method 5004 (Note 2)
100% PIND, Method 2020, Condition A
100% Final Electrical Test
100% External Visual
100% Fine/Gross Leak, Method 1014
100% Serialization
100% Radiographic, Method 2012 (Note 3)
100% Initial Electrical Test (T0)
100% External Visual, Method 2009
100% Static Burn-In 1, Condition A or B, 24 hrs. min.,
+125oC min., Method 1015
Sample - Group A, Method 5005 (Note 4)
100% Data Package Generation (Note 5)
NOTES:
1. Failures from Interim electrical test 1 and 2 are combined for determining PDA 1.
2. Failures from subgroup 1, 7, 9 and deltas are used for calculating PDA. The maximum allowable PDA = 5% with no more than 3% of the
failures from subgroup 7.
3. Radiographic (X-Ray) inspection may be performed at any point after serialization as allowed by Method 5004.
4. Alternate Group A testing may be performed as allowed by MIL-STD-883, Method 5005.
5. Data Package Contents:
• Cover Sheet (Intersil Name and/or Logo, P.O. Number, Customer Part Number, Lot Date Code, Intersil Part Number, Lot Number,
Quantity).
• Wafer Lot Acceptance Report (Method 5007). Includes reproductions of SEM photos with percent of step coverage.
• GAMMA Radiation Report. Contains Cover page, disposition, Rad Dose, Lot Number, Test Package used, Specification Numbers, Test
equipment, etc. Radiation Read and Record data on file at Intersil.
• X-Ray report and film. Includes penetrometer measurements.
• Screening, Electrical, and Group A attributes (Screening attributes begin after package seal).
• Lot Serial Number Sheet (Good units serial number and lot number).
• Variables Data (All Delta operations). Data is identified by serial number. Data header includes lot number and date of test.
• The Certificate of Conformance is a part of the shipping invoice and is not part of the Data Book. The Certificate of Conformance is signed
by an authorized Quality Representative.
Spec Number
6
518607
HCTS14MS
AC Timing Diagrams
Hysteresis Definition, Characteristic and
Test Setup
VIH
INPUT
VS
VIL
VO
TPLH
VH
VH = VT+ - VT-
TPHL
VOH
VS
VI
OUTPUT
VT-
VOL
VOH
VOL
TTLH
TTHL
80%
20%
VT+
80%
VT-
VCC
20%
OUTPUT
VI
VH
GND
FIGURE 1
VCC
VO
AC VOLTAGE LEVELS
PARAMETER
VT+
GND
HCTS
UNITS
VCC
4.50
V
VIH
3.00
V
VS
1.30
V
VIL
0
V
GND
0
V
FIGURE 2
AC Load Circuit
DUT
TEST
POINT
CL
RL
CL = 50pF
RL = 500Ω
FIGURE 3
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
Spec Number
7
518607
HCTS14MS
Die Characteristics
DIE DIMENSIONS:
87 x 88 mils
2,20 x 2.24mm
METALLIZATION:
Type: AlSi
Metal Thickness: 11kÅ ± 1kÅ
GLASSIVATION:
Type: SiO2
Thickness: 13kÅ ± 2.6kÅ
WORST CASE CURRENT DENSITY:
<2.0 x 105A/cm2
BOND PAD SIZE:
100μm x 100μm
4 x 4 mils
Metallization Mask Layout
HCTS14MS
A1
(1)
VCC
(14)
A6
(13)
Y1 (2)
(12) Y6
(11) A5
A2 (3)
(10) Y5
Y2 (4)
A3 (5)
(9) A4
(6)
Y3
(7)
GND
(8)
Y4
NOTE: The die diagram is a generic plot from a similar HCS device. It is intended to indicate approximate die size and bond pad location.
The mask series for the HCTS14 is TA14443A.
Spec Number
8
518607
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