DATASHEET

ACS32MS
Data Sheet
November 1998
File Number
Radiation Hardened Quad 2-Input OR Gate
Features
The Radiation Hardened ACS32MS is a Quad 2-Input OR
Gate. For each gate, a HIGH level on either A or B input
results in a HIGH level on the Y output. A LOW level on both
the A and B inputs results in a LOW level on the Y output. All
inputs are buffered and the outputs are designed for
balanced propagation delay and transition times.
• QML Qualified Per MIL-PRF-38535 Requirements
The ACS32MS is fabricated on a CMOS Silicon on Sapphire
(SOS) process, which provides an immunity to Single Event
Latch-up and the capability of highly reliable performance in
any radiation environment. These devices offer significant
power reduction and faster performance when compared to
ALSTTL types.
Specifications for Rad Hard QML devices are controlled
by the Defense Supply Center in Columbus (DSCC). The
SMD numbers listed below must be used when ordering.
Detailed Electrical Specifications for the ACS32MS are
contained in SMD 5962-98624. A “hot-link” is provided
on our homepage with instructions for downloading.
www.intersil.com/data/sm/index.asp
4545
• 1.25 Micron Radiation Hardened SOS CMOS
• Radiation Environment
- Latch-Up Free Under any Conditions
- Total Dose. . . . . . . . . . . . . . . . . . . . . . 3 x 105 RAD (Si)
- SEU Immunity . . . . . . . . . . . . . <1 x 10-10 Errors/Bit/Day
- SEU LET Threshold . . . . . . . . . . . . >100MeV/(mg/cm2)
• Input Logic Levels . . . . VIL = (0.3)(VCC), VIH = (0.7)(VCC)
• Output Current . . . . . . . . . . . . . . . . . . . . . . . . ±8mA (Min)
• Quiescent Supply Current . . . . . . . . . . . . . . 100µA (Max)
• Propagation Delay . . . . . . . . . . . . . . . . . . . . . . 12ns (Max)
Applications
• High Speed Control Circuits
• Sensor Monitoring
• Low Power Designs
Ordering Information
ORDERING NUMBER
INTERNAL MKT. NUMBER
5962F9862401VCC
ACS32DMSR-03
ACS32D/SAMPLE-03
ACS32D/SAMPLE-03
5962F9862401VXC
ACS32KMSR-03
ACS32K/SAMPLE-03
5962F9862401V9A
TEMP. RANGE (oC)
PACKAGE
DESIGNATOR
-55 to 125
14 Ld SBDIP
CDIP2-T14
25
14 Ld SBDIP
CDIP2-T14
-55 to 125
14 Ld Flatpack
CDFP4-F14
ACS32K/SAMPLE-03
25
14 Ld Flatpack
CDFP4-F14
ACS32HMSR-03
25
Die
N/A
Pinouts
ACS32MS
(SBDIP)
TOP VIEW
ACS32MS
(FLATPACK)
TOP VIEW
A1 1
14 VCC
A1
1
14
VCC
B1 2
13 B4
B1
2
13
B4
Y1 3
12 A4
11 Y4
A2 4
B2 5
10 B3
Y2 6
9 A3
GND 7
8 Y3
1
Y1
3
12
A4
A2
4
11
Y4
B2
5
10
B3
Y2
6
9
A3
GND
7
8
Y3
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
ACS32MS
Die Characteristics
DIE DIMENSIONS:
PASSIVATION
Size: 2390µm x 2390µm (94 mils x 94 mils)
Thickness: 525µm ± 25µm (20.6 mils ± 1 mil)
Bond Pad: 110µm x 110µm (4.3 x 4.3 mils)
Type: Phosphorous Silicon Glass (PSG)
Thickness: 1.30µm ± 0.15µm
SPECIAL INSTRUCTIONS:
METALLIZATION: AL
Bond VCC First
Metal 1 Thickness: 0.7µm ± 0.1µm
Metal 2 Thickness: 1.0µm ± 0.1µm
ADDITIONAL INFORMATION:
Worst Case Current Density: <2.0 x 105 A/cm2
Transistor Count: 116
SUBSTRATE POTENTIAL:
Unbiased Insulator
Metallization Mask Layout
ACS32MS
B1
(2)
A1
(1)
VCC
(14)
B4
(13)
Y1 (3)
(12) A4
A2 (4)
(11) Y4
NC
NC
B2 (5)
(10) B3
(6)
Y2
(7)
GND
(8)
Y3
(9)
A3
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Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
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