Operational Amplifiers / Comparators Application Note
Op-Amp / Comparator Tutorial
No.11049EBY04
●A TABLE OF CONTENTS
1.What is Op-Amp/Comparator?
1.1 Model of amplifier (Voltage amplifier) and Op-Amp
1.2 What is Op-amp/Comparator?
1.3 Op-amp and Comparator circuit construction
2.Absolute maximum rating
2.1 Rated power supply voltage
2.2 Rated differential input voltage
2.3 Rated common mode input voltage
2.4 Maximum power dissipation and storage temperature range
2.5 Electrostatic discharge tolerance
3.Electrical characteristic of op-amp and comparator
3.1 Circuit current/quiescent current Icc / Iq and power consumption
3.2 Input offset voltage Vio
3.3 Input bias current/Input offset current Ib/Iio
3.4 Common mode input voltage range Vicm/CMR
3.5 Maximum output voltage (output voltage range) Vom / Voh, Vol
3.6 Common Mode Rejection Ratio (CMRR)
3.7 Power Supply Rejection Ratio (PSRR)
3.8 Large signal voltage gain (Large amplitude voltage gain, open loop voltage gain) Av
3.9 Slew Rate (SR)
3.10 Response time tre / tpHL / tpLH
3.11 Open loop voltage gain frequency characteristics and unity gain frequency/gain bandwidth product
3.12 Model of negative feedback system and oscillation condition
3.13 Total Harmonic Distortion plus Noise (THD + N)
3.14 Equivalent input noise source
www.rohm.com
© 2011 ROHM Co., Ltd. All rights reserved.
1/27
2011.11 - Rev.B
Op-Amp / Comparator Tutorial
Application Note
●1.What is Op-Amp/Comparator?
1.1 Model of amplifier ( voltage amplifier ) and Op-Amp
An amplifier has a function to increase an input signal by amplification factor of amplifier for outputting. Electric / Electronic
circuit uses voltage and current in the main for input signal and output signal. Configuration of such amplifying circuit is
classified into the four types shown below:
1. VCVS (Voltage Controlled Voltage Source) Voltage input/Voltage output
2. CCCS (Current Controlled Current Source) Current input/Current output
3. VCCS (Voltage Controlled Current Source) Voltage input/Current output
4. CCVS (Current Controlled Voltage Source) Current input/Voltage output
Function required for all four types shown above is to detect and amplify an input signal without attenuating, and supply
output signal with no attenuation of the load. We will consider the function required for an amplifier by modeling the input
signal source, amplifier, and load. Figure 1.1.1 (a) - (d) show the model of four amplifiers described above including the
input signal source and load. Figure 1.1 1 (a) shows the model of voltage controlled voltage source. Input resistance of this
amplifier is represented by Ri, output resistance by Ro, and amplification factor by Av. Input signal source is modeled by
voltage source Vs, output resistance Rs, and load RL. Output voltage is calculated by the equation below by use of these
models:
Vo=(RL/(Ro+RL))･Av・(Ri/(Rs+Ri))・Vs
(1.1.1)
Signal voltage is divided by Rs and Ri, so that the attenuated signal is input to the amplifier.
Output voltage from the amplifier is divided by Ro and RL, and supplied to the load.
The greater Ri is, the less attenuated is the signal voltage input to the amplifier; the smaller Ro is, the less attenuated
is the output voltage supplied to the load.
Assume that Ri = ∞ [Ω] and Ro = 0 [Ω] in the formula (1.1.1), then
Vo=Av・Vs
(1.1.2)
We understand that amplified voltage can be supplied to the load without attenuating, with no attenuation of voltage at the
signal source. Therefore, it is desirable that infinite input resistance and zero output resistance are provided for voltage
controlled voltage source. Input resistance and output resistance required for the amplifier of the other three types are
summarized in the table 1.1.1. Op-amp is a voltage controlled voltage source when classified into the four types of amplifier
described above. Therefore, high input resistance and low output resistance are preferable for an op-amp, which in general
has a circuit configuration close to such characteristics.
Vi
Ro
Rs
Ii
Ri
Vs
RL
Av・Vi
Is
Rs
Ri
Ai・Ii
Ro
RL
(b) CCCS
(a) VCVS
(op-amp)
table1.1.1 Ideal input and output resistance
input
output
amplifier type
resistance resistance
VCVS
∞
0
(op-amp)
CCCS
0
∞
VCCS
∞
∞
CCVS
0
0
Vi
Ro
Rs
Ii
Vs
Ri
G・Vi
Ro
RL
Is
(c) VCCS
Rs
Ri
R・Ii
RL
(d) CCVS
Fig.1.1.1 The type of amplifier
www.rohm.com
© 2011 ROHM Co., Ltd. All rights reserved.
2/27
2011.11 - Rev.B
Op-Amp / Comparator Tutorial
Application Note
1.2 What is Op-amp/Comparator?
Op-amp (operational amplifier) is a differential amplifier provided with high input resistance and low output resistance. It
consists of + input terminal (non-inverting input terminal), - input terminal (inverting input terminal), output terminal and
power supply terminal (plus and minus side), and the differential voltage between + input terminal and - input terminal is
increased by the amplification factor provided by the amplifier, and output.
Drawing symbol of op-amp is shown in figure 1.2.1.
Op-amp, in general use, composes a negative feedback circuit by connecting resistors and capacitors between the output
terminal and - input terminal, and executes analogue signal processing such as amplifying of signal, addition, subtraction,
and filtering. Figure 1.2.2 shows an example of use for an amplifier. This circuit, which is called an inverting amplifier,
increases an input signal by an amplification factor determined by resistance R1 and R2, and outputs a signal with phase
reversed 180 degrees. When the amplification factor of op-amp is assumed to be "a", input signal "Vin", and output signal
"Vout", "Vout" can be represented by the equation below:
Vout=-(R2/(R1+(R1+R2)/a))・Vin
(1.2.1)
Amplification factor of op-amp (voltage gain) is great in general. Therefore the equation is approximated as follows:
Vout≒-(R2/R1)・Vin
(1.2.2)
High amplification factor is desired for op-amp in order to make output voltage error due to amplification factor as small as
possible.When we review the fact that the amplifying is great, it means that the potential difference between + input terminal
and - input terminal is made as small as possible. In other words, the greater the amplification factor is, the more
established is the relation Vin + = Vin -. This relation where potential of + input terminal is almost equal to potential of - input
terminal is called virtual short-circuit. When negative feedback circuit is configured in use, this relation is established, and
application circuit is designed by use of this relation.
Terminal of comparator consists of + input terminal, - input terminal, output terminal, and plus/minus power supply terminal,
which is the same as op-amp. Drawing symbol is also the same as op-amp (figure 1.2.1). It provides a circuit which
amplifies the potential difference between two input terminals and outputs either high or low. It is used in general for a
voltage comparator circuit for fixing the potential of either + input terminal or - input terminal, and determining the high or
low level of voltage of input signal with reference to such potential.
The output voltage level is as follows:
When "Potential of + input terminal > Potential of - input terminal" is established, high level is output.
When "Potential of - input terminal > Potential of + input terminal" is established, low level is output.
Great difference between the op-amp and comparator is the availability of phase compensation capacitor. Op-amp requires
phase compensation capacitor for preventing oscillation because it configures a negative feedback circuit in use, while
comparator does not require this capacitor because it does not configure negative feedback. Phase compensation capacitor
limits the response time of input/output time. Comparator which has no phase compensation capacitor has a greatly
improved response capability in comparison with op-amp.
Positive(high side) supply voltage
（VCC）
Inveting input（-IN）
Output（Vout）
Non inverting input（+IN）
Negative(low side) supply voltage
（VEE）
Fig.1.2.1. Op-amp and Comparator symbol
www.rohm.com
© 2011 ROHM Co., Ltd. All rights reserved.
3/27
2011.11 - Rev.B
Op-Amp / Comparator Tutorial
Application Note
R2
VCC
voltage
VCC
input voltage
R1
Vout
Vin
Vout
a
reference
voltage
VREF
VREF
time
output voltage
VEE
Virtual short Vin+=Vin(when voltage gain "a"
is large value)
VEE
(a) non inverting voltage comparator
voltage
VCC
voltage
input voltage
Relationship of input and output voltage
Vout＝a・（Vp－Vn）
（Vin－Vn）/R1＝（Vn－Vout）/R2
Equation of Output voltage
Vout＝－{R2/(R1＋(R1＋R2)/a)}・Vin
≒－（R2/R1）・Vin （A→∞）
input voltage
Vout
time Vin
VREF
reference
voltage
VREF
time
output voltage
output voltage
VEE
(b)inverting voltage comparator
Fig 1.2.2 inverting amplifier
www.rohm.com
© 2011 ROHM Co., Ltd. All rights reserved.
Fig.1.2.3 input and output waveform of voltage comparator
4/27
2011.11 - Rev.B
Op-Amp / Comparator Tutorial
1.3
Application Note
Circuit construction of operational amplifier and voltage comparator
Fig 1.3.1 shows internal circuit blocks of op-amp. Basically, it is constructed by three stages, that is input stage, gain stage
and output stage.
The input stage is differential amplifier that amplifies difference of two input voltage and suppress common mode voltage.
Input common mode voltage range is mainly decided by this input stage.
Voltage gain of op-amp is increased by gain stage, because only input stage voltage gain is not enough.
For general op-amp, phase compensation capacitor is inserted between input and output of gain stage.
Output stage suppresses op-amp characteristic fluctuation caused by load. Output current driving ability is decided by
output stage. The kinds of output circuit constructions are class A, class B, class C, and class AB etc. Harmonic distortion is
deteriorated in class A, class AB, class B, class C sequence. Fig.1.3.1(b) specifies BA4558 simplified schematic. It has
class AB output stages that ensure low distortion.
Fig.1.3.2 shows voltage comparator construction. That is almost same as op-amp, but it is not inserted phase
compensation capacitor because applications using negative feedback are not assume.
Phase compensation capacitor limits operating speed, response time is very short by rejected this capacitor.
Output stage constructions of voltage comparator are mainly open collector (or open drain) type and push-pull type.
Fig.1.3.2 (b) shows BA10393 simplified schematic. The output stage is open collector type.
phase compensation capacitor
+input
+input
Cc
input
stage
gain
stage
output
stage
output
input
stage
gain
stage
output
output
stage
-input
-input
（a） basic op-amp building blocks
（a） basic voltage comparator building blocks
VCC
VCC
-IN
-IN
OUT
+IN
OUT
+IN
VEE
VEE
input stage
gain
stage
output
stage
input stage
（b） BA4558 sinplified schematic
output
stage
（b） BA10393 simplified schematic
Fig 1.3.1 op-amp circuit construction
www.rohm.com
© 2011 ROHM Co., Ltd. All rights reserved.
gain
stage
Fig 1.3.2 voltage comparator circuit construction
5/27
2011.11 - Rev.B
Op-Amp / Comparator Tutorial
Application Note
●2. Absolute maximum rating
Typical items of absolute maximum rating op-amp/comparator include the following:
1. Rated power supply voltage
2. Rated differential input voltage
3. Rated common mode input voltage
4. Storage temperature range
5. Maximum power dissipation
Absolute maximum rating refers to a condition which must not be exceeded even momentarily for the items described on
specification including the above. Applying a voltage in excess of absolute maximum rating and using under high and low
temperature environment may cause characteristic deterioration and destruction of IC.
2.1
Rated power supply voltage
It is the maximum power supply voltage that can be applied between plus power supply terminal (Vcc terminal) and minus
power supply terminal (VEE terminal) without characteristic deterioration and destruction of internal circuit.
Figure 2.1.1 shows an example of power supply voltage that can be applied to op-amp/comparator with rated power supply
voltage 36V. Rated power supply voltage indicates the voltage between Vcc terminal and VEE terminal, and if (Vcc - VEE )
does not exceed rated voltage, no problem is found in applying such voltage. Therefore, when 24[V] is applied to Vcc
terminal and -12[V] to VEE terminal, characteristic deterioration and destruction are not found. What should be noted is that
rated power supply voltage and operational power supply voltage are different parameters.
Rated power supply voltage refers to a power voltage that can be applied without characteristic deterioration or destruction
of IC, and does not mean a power supply voltage for normal operation. Voltage must be set within operational power supply
voltage range for operating IC normally. Value of rated power supply voltage and operational power supply voltage depends
on a model. They may be equal in some cases, and they may be different in other cases.
VCC＝ 18[V]
VCC＝ 36[V]
Vout
Vout
VEE＝-18[V]
Split supply ±18[V]
VCC＝ 24[V]
VEE＝ GND
Single supply 36[V]
Vout
VEE＝-12[V]
Split supply 24[V]、-12[V]
Fig. 2.1.1 Applicable supply voltage
(In case of rated supply voltage is 36V)
www.rohm.com
© 2011 ROHM Co., Ltd. All rights reserved.
6/27
2011.11 - Rev.B
Op-Amp / Comparator Tutorial
2.2
Application Note
Rated differential input voltage
It refers to the maximum voltage that can be applied between + input terminal (non-inverting input terminal) and - input
terminal (inverting input terminal) without characteristic deterioration and destruction of IC.
Polarity of this voltage is determined by whether to apply voltage to - input terminal with reference to + input terminal, or
apply voltage to + input terminal with reference to - input terminal.
Polarity is not of much concern, but what matters is how much voltage can be applied between input terminals.
However, it must be assumed that the potential of input terminal is above potential of VEE terminal.
Rated differential input voltage is determined by withstand voltage of transistor connected to input terminal (such as NPN
transistor and PNP transistor), etc.
VCC
VinVout
Vid
Vin+
VEE
Fig. 2.2.1 Rated differential input voltage
2.3
Rated common mode input voltage
It refers to the maximum voltage that can be applied without characteristic deterioration or destruction of IC with + input
terminal (non-inverting input terminal) and - input terminal (inverting input terminal) set at the same potential. Rated
common mode input voltage is different from common mode input voltage range of electric characteristic item.
Rated common mode input voltage does not guarantee normal operation of IC. When expecting normal operation of IC,
voltage within common mode input voltage range must be followed in the electric characteristic items.
Rated common mode input voltage is VEE -0.3 [V] and Vcc +0.3 [V] in general, while the voltage up to power supply rating
can be applied to some models. It is determined by protective circuit configuration of input terminal, withstand voltage of
parasitic element and input transistor, etc.
VCC
VinVout
Vicm
Vin+
VEE
Fig. 2.3.1 Rated common mode input voltage
www.rohm.com
© 2011 ROHM Co., Ltd. All rights reserved.
7/27
2011.11 - Rev.B
Op-Amp / Comparator Tutorial
Application Note
2.4 Maximum power dissipation and storage temperature range
Maximum power dissipation indicates an power which IC is capable of consuming at an ambient temperature Ta = 25℃
(normal temperature). IC generates heat when it consumes power, and the temperature of chip becomes higher than
ambient temperature. The temperature allowed in a chip is fixed, so that consumable power is limited.
Maximum power dissipation is determined by the temperature acceptable by IC chip in a package (junction temperature)
and thermal resistance (heat dissipation) of package. The maximum value of junction temperature is normally equal to the
maximum value of storage temperature range. Storage temperature range refers to a temperature range where IC can be
stored without excessive deterioration of its characteristic. Heat generated by IC, when consuming power is dissipated from
mold resin and lead frame of package. Parameter which shows this heat dissipation factor (hardness of heat to escape) is
called thermal resistance, and is represented by θj =a[℃/W].Temperature of IC inside the package can be estimated form
this thermal resistance. Figure 2.4.1 shows a model of thermal resistance of package.
θj-a is represented by the sum of thermal resistance θj-c between chip cases (packages) and thermal resistance θc-a
between a case (package) and outside. When thermal resistance θj-a, ambient temperature Ta, and power consumption
P are known, chip temperature can be calculated by the equation below:
Tj=Ta+θj-a・P[W]
(2.4.1)
Figure 2.4.2 shows the thermal relaxing curve (degrading curve). This curve is a graph which shows how much power an IC
can consume at some ambient temperature, and indicates power consumed by IC chip without exceeding allowable
temperature. Let us consider chip temperature of BA4560RF (SOP8 plastic mold package) for an example. Storage
temperature range of BA4560RF is between -55[℃] and 150[℃], therefore the maximum allowable temperature of a chip is
150[℃].Thermal resistance of SOP8 isθj-a ≒181.8[℃/W]. When assuming that this IC consumes power 687 [mW] at
Ta = 25[℃], junction temperature is calculated as follows:
Tj=25[℃]+181.8[℃/W]・0.687[W]≒150[℃]
(2.4.2)
Therefore it is seen that the chip reaches its maximum allowable temperature, and no more electric can be consumed.
C h ip junction－amibient thermal resistance
θj- a＝θj-c＋θc-a[℃/W]
where θj-c：junction－case(package) thermal resistance
θc-a：case(package)－ampient thermal resistance
1000
BA4558F（SOP8）
IC c h i p
Power Dissipation Pd [mW]
BA4558FV（SSOP-B8）
θc - a
θj- c
θj- c
θc - a
BA4558FVM（MSOP8）
600
400
200
0
0
Le ad Fr am e
25
50
75
100
125
150
Ambient Temperature Ta [℃]
Fig.2.4.1 Thermal resistance of IC package
www.rohm.com
© 2011 ROHM Co., Ltd. All rights reserved.
800
Fig.2.4.2 Power dissipation vs. Ambient temperature
(Mounted 70mm×70mm×1.6mm FR4 glass epoxy board)
8/27
2011.11 - Rev.B
Op-Amp / Comparator Tutorial
Application Note
2.5 Electrostatic discharge tolerance
It represents a damage withstand capability against static electricity of IC, and is one of reliability test items.
Example of damaging phenomenon when static electricity is applied to IC includes the phenomenon shown below:
Dielectric breakdown of film oxide
: Caused by high electric field applied to gate film oxide when the transistor has MOS structure.
Thermal breakdown of PN junction
: Excessive current flows in PN junction of device inside IC because of static electricity, which results in thermal
breakdown of junction.
Melting of wiring
: When overcurrent flows in excess of allowable current of wiring, thermal breakdown occurs.
Test procedure used often for evaluating electrostatic discharge tolerance includes a human body model (HBM) and
machine model. Human body model is a modeling of phenomenon in which electric charge on human body is discharged
when it is in contact with a device, and machine model is a modeling of phenomenon in which electric charge on metallic
equipment having greater capacity and smaller discharge resistance than human body is in contact with a device. Figure
2.5.1 shows a simple test circuit of human body model and machine model. Capacitance CESD is charged by high voltage,
and discharged through resistance RESD for checking for breakdown. Capacitance / Resistance differ between human body
model and machine model.
For human model
For machine model
:CESD = 100[pF], RESD = 1.5[kΩ]
:CESD = 200[pF], RESD = 0[Ω]
Common terminal in applying static electricity is VEE terminal (GND terminal) and Vcc terminal in general. IC is generally
provided with protective circuit against static electricity, and a measure is taken to prevent excessive current from flowing
inside the circuit. When electrostatic surge occurs, in order to dissipate electric charge to common terminal without
breakdown of internal circuit, current route with low impedance is reserved. Also, a resistor may be connected to a terminal
in series in order to limit the amount of current. Example of protective circuit is shown in figure 2.5.2.
The protection circuit establish
low inpedance current path for ESD.
VCC
R
High Voltage
SUPPLY
RESD
CESD
protection
circuit
DUT
Internal
circuit
ESD applied pin
protection
circuit
HBM : RESD =1.5[kΩ], CESD=100[pF]
MM : RESD = 0[kΩ], CESD=200[pF]
VEE（GND）
If surge current is flow into internal circuit,
it is thermaly destructed.
Fig. 2.5.1 HBM, MM simplified test circuit
www.rohm.com
© 2011 ROHM Co., Ltd. All rights reserved.
Fig. 2.5.2 Example of internal ESD protection
9/27
2011.11 - Rev.B
Op-Amp / Comparator Tutorial
Application Note
●3.Electrical characteristic of op-amp and comparator
Described here are the electric characteristic of op-amp/comparator and effect in actual use by use of an example.
3.1 Circuit current / quiescent current Icc / Iq and power consumption
Standard value in specification indicates an current of op-amp/ comparator alone flowing under no-load, steady state as
shown in figure 3.1.1. Measuring condition depends on a model. Actually, circuit current also changes because output
current depends on load condition.
In calculating power consumption of op-amp/comparator, not only the circuit current but also the output current must be
considered. How the power consumption is determined is indicated by use of figure 3.1.2 (a) and (b). Figure 3.1.2 (a)
represents a state where the op-amp supplies output source current to the load. Here, the op-amp consumes the current of
Icc + Iout. Power consumption is calculated by multiplying the amperage by voltage. The current of Icc and Iout flow along
different routes, and the voltage applied to current route is different. Therefore, in calculating power consumption, it is
necessary to divide into output current portion and circuit current portion excluding output current.
Considering the description above, power consumption can be calculated by the equation below:
P=Icc・(Vcc-VEE)+Iout・(Vcc-Vout)
(3.1.1)
Figure 3.1.2 (b) shows the state where the op-amp supplies the output sink current to the load.
Here, power consumption can be calculated by the following equation in the same concept as that in source current supply
described above:
P=Icc・(Vcc-VEE)+Iout・(Vout-VEE)
(3.1.2)
VCC
VCC
ICC
ICC
Vout
Vout
Vin+
Vin-
Vin
VEE
VEE
(a) Example of supply curretn test circuit for op-amp
(b) Example of supply curretn test circuit for comparator
Fig 3.1.1 Supply current of op-amp and comparator
VCC
VCC
ICC＋Iout
ICC
Iout
Vout
Vout
Iout
Vin
ICC
RL
Vin
VEE
ICC＋Iout
RL
VEE
(a) Current path of output source current
(b) Current path of output sink current
Fig. 3.1.2 Calculation of power dissipation
www.rohm.com
© 2011 ROHM Co., Ltd. All rights reserved.
10/27
2011.11 - Rev.B
Op-Amp / Comparator Tutorial
Application Note
3.2 Input offset voltage Vio
It indicates the difference of potential between + input terminal and - input terminal. In other words, it is a voltage required
for setting the output at 0[V]. Maximum input offset voltage is normally guaranteed under a given condition.
The guaranteed value itself is indicated in absolute value. Input offset voltage is generated by voltage difference between
the base and emitter of transistor connected to + input terminal and - input terminal (voltage difference between gate and
source as for FET). It mainly results from the discrepancy of two transistor characteristics and asymmetry of circuit.
This situation is shown in figure 3.2.1 (a), and modeling of op-amp including offset voltage is shown in (b). Input offset
voltage actually depends on common mode input voltage, power supply voltage, ambient temperature, etc. Change by such
use condition can be estimated by electric characteristic such as CMRR, PSRR, and temperature coefficient.
Effect of input offset voltage in actual use is considered, taking an example of circuit shown in figure 3.2.2.
Figure 3.2.2 is a non-inverting amplifier with amplification factor 1 + R2/R1. When we put the input offset voltage Vio, input
voltage Vin, and output voltage Vout, the output voltage is given by the equation below:
Vout≒(1+(R2/R1))・(Vin+Vio)
(3.2.1)
When we look at above equation, it can be seen that not only the input voltage but also the input offset voltage is amplified.
When we put the input offset at 1[mV], it appears as an error of 100[mV] at the output from non-inversion amplifier with
magnification factor 100[mV].
As an example of characteristics of input offset voltage, characteristic of input offset voltage - power supply voltage and
characteristic of input offset voltage - temperature are shown in figure 3.2.3.
R1
R2
Basically, input offset voltage is occurred by
base-emitter boltage difference of Q1 and Q2
(Vin,n＋Vbe1ーVbe2ーVin,p)ーVio=0
Vio＝Vbe1－Vbe2
VCC
Vout
VCC
Vin
real op-amp
Vbe2
Vbe1
Vin,n
Q1
Q2
Vin,p
the ciucuit equations are following,
Vout＝a・（Vin＋Vio－Vin,n）
（0－Vin,n）/R1＝（Vin,n－Vout）/R2
offset voltage Vio
ideal op-amp
Vio=0
VEE
(a) example of op-amp input stage
∴Vout≒（1＋（R2/R1））・（Vin＋Vio）
Input offset voltage is increased by
voltage gain
(b) input offset voltage model
Fig. 3.2.1 The model of input offset voltage
Fig. 3.2.2 influence of input offset voltage
5
5
3V
-40ºC
4
4
25ºC
3
125ºC
Input Offset Voltage [mV]
Input Offset Voltage [mV]
VEE
Vio
2
1
0
-1
-2
-3
5V
3
32V
2
1
0
-1
-2
-3
-4
-4
-5
-50
-5
0
10
20
Supply Voltage
30
40
(a) BA2904F input offset voltage－supply voltage
0
50
100
Ambient Temperature Ta [℃]
150
(b) BA2904F input offset voltage－ambient temperature
Fig. 3.2.3 example of input offset voltage characteristic
www.rohm.com
© 2011 ROHM Co., Ltd. All rights reserved.
11/27
2011.11 - Rev.B
Op-Amp / Comparator Tutorial
Application Note
3.3 Input bias current/Input offset current
Ib/Iio
Input bias current is a current which flows into input terminal or flows out of input terminal. Direction of current depends on
the type of transistor connected to input terminal. In the case of bipolar structure in general, direction flowing into input
terminal is applied to NPN transistor, and direction flowing out of input terminal is applied to PNP transistor.
Input offset current is the difference of input bias current respectively of + input terminal and - input terminal.
When we put the bias current of + input terminal and - input terminal Ib.p and Ib.n, respectively. The input bias current Ib
and input offset current Iio are defined by the equation below:
Ib =(Ib,p+Ib,n)/2
Iio= Ib,p-Ib,n
(3.3.1)
(3.3.2)
Input terminal of op-amp/comparator is connected to the base of transistor for bipolar structure, and to the gate of transistor
for FET structure in order to provide high input resistance. For this reason, the input bias current is either the base current
or gate current of transistor, and is in general on the order of nA - µA for bipolar structure, and on the order of fA - pA for
FET structure.
Take an example of figure 3.3.2 in considering the effect by input bias current and input offset current in actual use.
Figure 3.3.2 shows a non-inverting amplifier. When we put the input voltage at Vin and output voltage at Vout,
the output voltage is calculated by the equation below:
Vout=-(R2/R1)・Vin-((1+R2/R1)・((R1//R2)・Ib,n-R3・Ib,p))
=-(R2/R1)・Vin-(1+R2/R1)・((R1//R2-R3)・Ib-(R1//R2+R3)・Iio/2)
(3.3.3)
(3.3.4)
When we choose R3 so that R3 = R1/R2, the term of error by input bias current can be eliminated.
Here, the output voltage Vout is given by the equation below:
Vout=-(R2/R1)・Vin+(1+R2/R1)・((R1//R2)・Iio)
(3.3.5)
Figure 3.3.3 shows an example of temperature characteristics of input bias current and input offset current.
R2
R1
Vin
VCC
VCC
Ib,n
Ib,p
Vout
Ib,n
Vin-
Ib,n
R3
VEE
Vin+
The constructed feedback circuit behaves linear circuit.
Therefore superposition criterion is consisting.
Output error voltage occurred by input bias current and input
offset current is following,
Vin,p=Vin,n=R3・Ib,p
Ib,n=Vin,p/R1+(Vin,p-Eout)/R2
∴Eout=(1+R2/R1)・((R1//R2)・Ib,n‐R3・Ib,p)
=(1+R2/R1)・((R1//R2-R3)・Ib-(R1//R2+R3)・Iio/2)
Ib,p
Ib,p
VEE
（a） example of op-amp input stage
（b）input bias current
Fig. 3.3.1 input bias current
Fig 3.3.2 influence of input bias current and input offset current
150
10
±4V
±7.5V
6
Input Offset Current[nA]
±15V
input bias current [nA]
±4V
8
±7.5V
125
100
75
50
25
±15V
4
2
0
-2
-4
-6
-8
0
-50
-25
0
25
50
75
Ambient Temperature Ta [℃]
100
-10
-50
125
(a) BA4560RF input bias current - ambient temperature
-25
0
25
50
75
Ambient Temperature Ta [℃]
100
125
(b) BA4560RF input offset current - ambient temperature
Fig. 3.3.3 input bias current and input offset current - temperature characteristic
www.rohm.com
© 2011 ROHM Co., Ltd. All rights reserved.
12/27
2011.11 - Rev.B
Op-Amp / Comparator Tutorial
3.4
Application Note
Common mode input voltage range Vicm / CMR
It indicates an input voltage range where the op-amp/comparator operates normally. If any voltage out of common mode
input voltage range is applied, desired output voltage cannot be obtained. Common mode input voltage range is determined
mainly by configuration of input step circuit (configuration of differential amplifier circuit). Figure 3.4.1 shows the input step
circuit configuration of op-amp of BA4558R and BA2904. IC op-amp must operate normally within common mode input
voltage range, therefore all transistors on input step must operate in linear area. In the circuit shown in figure 3.4.1, the
upper limit of common mode input voltage is an input voltage where Q0 is not saturated, and the lower limit of common
mode input voltage is an input voltage where Q1 and Q2 are not saturated. When we put the voltage between base and
emitter of each transistor at Vbe, and the voltage between collector and emitter at Vsat where the transistor begins to be
saturated, the common mode input voltage range of op-amp of BA4558R and
BA2904 is as shown below:
Common mode input voltage range of op-amp of BA4558R
-Vbe2+Vbe5+Vbe6+Vsat2+VEE ＜ Vicm ＜ VCC-Vbe2-Vsat0
Common mode input voltage range of op-amp of BA2904
-Vbe1'-Vbe1+Vbe3+Vsat1+VEE ＜ Vicm ＜ VCC-Vbe1'-Vbe1-Vsat0
(3.4.1)
(3.4.2)
When it is assumed that all Vbe equal to Vsat,
Common mode input voltage range of op-amp of BA4558R
＜ Vicm ＜ VCC-(Vbe-Vsat)
VEE+(Vbe+Vsat)
Common mode input voltage range of op-amp of BA2904
VEE+(-Vbe+Vsat) ＜ Vicm ＜ VCC-(2・Vbe-Vsat)
(3.4.3)
(3.4.4)
The lower limit of common mode input voltage range of op-amp of BA4558 is determined by the common mode input
voltage where Q2 is saturated because the collector potential of Q2 is higher than that of Q1, and Q1 has an input voltage
higher than Q2 where they come into saturation region. Op-amp of BA2904 uses a level shift circuit (Q1' and Q2') so that it
can apply GND potential for input voltage. The circuit is configured so that the collector potential of Q1 and Q2 is almost
equal.
Therefore, Q1 and Q2 are saturated at an almost equal input voltage. When we look at the formula above, the lower limit of
common mode input voltage range of op-amp of BA2904 is normally higher for Vbe than for Vsat, and it can be seen that
VEE potential (GND potential) is included. Op-amp which thus allows input of VEE potential (GND potential) is called a
single power supply op-amp. It is impossible to input GND (VEE) potential for input voltage by use of op-amp such as
BA4558R, which is designed for both power sources beforehand, but it can be used sufficiently by single power source
when appropriate input voltage is set.
3
VCC
Q0
Vbe1
Vbe2
Vin-
common
mode
同相入力
input voltage
電圧範囲
range
Q1
Vin+
Cc
Vsat2
Q2
Q5
Q3
-40°C
2
Input Offset Voltage [mV]
Vsat0
Q4
Q6
Vbe5
25°C
105C
1
0
-1
-2
Vbe6
-3
VEE
0
(a) BA4558RF input stage simplified schematic
2
4
Input Voltage [V]
6
8
(b) BA4558RF input offset voltage - input voltage
3
VCC
-40ºC
Q0
Vbe1
Vbe1’
common
mode
同相入力
input電圧範囲
voltage
range
VinQ1’
Vbe2’
Q1 Vsat1
Cc
Q2
Q2’
Q6
Vin+
Q7
Q5
Vbe3 Q3
25ºC
2
Vbe2
Q4
Input Offset Voltage [mV]
Vsat0
125ºC
1
0
-1
-2
-3
-0.5
VEE
(c) BA2904F input stage simplified schematic
0
0.5
1
1.5
2
2.5
Input Voltage [V]
3
3.5
4
4.5
(d) BA2904F input offset voltage - input voltage
Fig.3.4.1 BA4558RF and BA2904F input common mode voltage range
www.rohm.com
© 2011 ROHM Co., Ltd. All rights reserved.
13/27
2011.11 - Rev.B
Op-Amp / Comparator Tutorial
Application Note
3.5 Maximum output voltage (output voltage range) Vom / Voh, Voi
It refers to a voltage range which can be output by op-amp. Voltage is divided into high level output voltage and low level
output voltage. Output voltage range is limited by output circuit configuration, power supply voltage, and load condition
(output current). Take an example of op-amp of BA4558R and BA2904 shown in figure 3.5.1 to see how the maximum
output voltage is limited by output circuit configuration. Figure 3.5.1 (a) shows an output equivalent circuit of BA4558R. High
level output voltage of this circuit is limited by saturation voltage of Q1, voltage between base and emitter of Q2 and output
protection resistor R1. Low level output voltage is limited by saturation voltage of Q4, voltage between base and emitter of
Q3, and output protection resistor R2. The smaller the load resistance is and the greater the output current is, the greater is
the voltage fall because of saturation voltage of each transistor, voltage between the base and emitter, and protection
resistance, which makes the output voltage range smaller. Output voltage of BA4558R is determined by the equation below:
Voh=Vcc-(Vce1+Vbe2+R1・Isource)
Vol =VEE+(Vce4+Vbe3+R2・Isink)
(3.5.1)
(3.5.2)
Isource represents the output source current, and Isink the output sink current. Figure 3.5.1 (b) shows the output voltage load resistance characteristics of BA4558RF.
Figure 3.5.1 (c) shows an output equivalent circuit of op-amp of BA2904. High level output voltage is determined by the
voltage between collector and emitter of Q1, voltage between base and emitter of Q2, and voltage between base and
emitter of Q3, and voltage fall by R1. Low level output voltage depends on the amount of sink current. Fixed current source
of 50µA is connected to the output terminal of op-amp of BA2904, and the voltage close to GND level can be output until
sink current is several ten µA. When sink current exceeds this amperage, Q4 starts to be conductive, so that the low level
output voltage is limited by the voltage between collector and emitter of Q5, and voltage between base and emitter of Q4.
Output voltage of BA2904 is determined by the equation below:
Voh=Vcc-(Vsat1+Vbe2+Vbe3+R1・Isource)
Vol =Vce6
(Isink < several ten µA)
=Vce5+Vbe4
(Isink > several ten µA)
(3.5.3)
(3.5.4)
(3.5.5)
Figure 3.5.1 (d) shows the characteristic of output voltage - output current of BA2904F.
VCC
20
Q1
15
Vsat1
Q2
Isource
Vbe2
R1
R2
Vbe3
RL
Maximum output
voltage range
Vout
Isink
Output Voltage [V]
10
Q4
5
VOH
0
VOL
-5
-10
-15
Q3
-20
Vsat4
0.1
1
10
Load Resistance RL [kΩ]
(b) BA4558RF output voltage vs load resistance
(VCC=15[V], VEE=-15[V], Ta=25[℃])
VEE
(a) BA4558RF output stage simplified schematic
VCC
5
Q1
Vsat1
4
Q2
Vbe2
Vbe3
Isource
R1
Vbe4
Q6
Vsat6
Vout
Isink
RL
Q4
Maximum output
voltage range
Isink
> about 10μA
Isink＞数十μA
O utp ut V o ltag e [V ]
Q3
3
VOH
VOL
2
1
Vsat5
VEE
50μA
current source
0
VEE
0.1
1
10
Load Resistance RL [kΩ]
100
(d) BA2904F output voltage vs load resistance
(VCC=5[V], VEE=0[V], Ta=25[℃])
(c) BA2904F output stage simplified schematic
Fig. 3.5.1 BA4558RF, BA2904F output voltage range
www.rohm.com
© 2011 ROHM Co., Ltd. All rights reserved.
14/27
2011.11 - Rev.B
Op-Amp / Comparator Tutorial
Application Note
3.6 Common Mode Rejection Ratio (CMRR)
It refers to the ratio of fluctuation of input offset voltage when input voltage is changed. Standard of specification refers to
the ratio of fluctuation of input offset current when DC input voltage is changed.
CMRR=ΔVicm/ΔVio
(3.6.1)
Definition of CMRR is the ratio between amplification factor Ad of amplifier with reference to input voltage difference and
amplification factor Ac with reference to common mode input voltage, CMRR = Ad/Ac, which means the same thing as the
equation (3.6.1). It is ideal for an op-amp to increase the potential difference between + input terminal and - input terminal
by the amplification factor provided for the amplifier, while DC operation point inside the circuit is changed by changing
common mode input voltage on actual op-amp, therefore the output voltage fluctuate slightly. When we put the amplification
factor with reference to the input differential voltage of op-amp at Ad, the amplification factor with reference to the common
mode input voltage at Ac, the potential of + input terminal at Vin.p, and the potential of - input terminal at Vin.n, then the
output voltage from op-amp is represented by the equation below:
Vout=Ad・(Vin,p-Vin,n)+Ac・Vic
=Ad・((Vin,p-Vin,n)+(Ac/Ad)・Vic)
(3.6.2)
(3.6.3)
Where, Vic is the common mode input voltage, and equals to (Vin.p + Vin.n)/2. The term (Ac/Ad) Vic in the equation above
represents an error term by common mode input voltage, and can be considered to be an input offset voltage.
Vio,ic=(Ac/Ad)・Vic
(3.6.4)
Fluctuation of input offset voltage with reference to the change of common mode input voltage is calculated as follows by
this relation:
(3.6.5)
ΔVic/ΔVio,ic=Ad/Ac=CMRR
We understand that this is equal to the ratio between the amplification factor Ad of input voltage difference and the
amplification factor of common mode input voltage mentioned above.
Let us consider the effect by the change of common mode input voltage in actual use taking an example of non-inversion
amplifier in figure 3.6.1. When we put the input offset voltage by Vic = 0[V] on op-amp at Vio.0, then the input offset voltage
Vio.10 by Vic = 10[V] is calculated as follows:
Vio,10=Vio,0+10[V]/CMRR
(3.6.6)
When Vio.0 = 1[mV] and CMRR = 80[dB], the input offset voltage Vio.1 by Vic = 10[V] is 2[mV]. Therefore, it appears as an
error of 200[mV] on the output voltage if non-inverting amplifier with magnification factor 100 is used.
Also, CMRR depends on signal frequency, and attenuates as the frequency becomes the higher.
Figure 3.6.2 shows an example of input offset voltage - common mode input voltage characteristics and common mode
rejection ratio frequency characteristics.
R1
VCC
R2
The inverting input voltage is same as Vin.
Therefore, CMR is Vin.
VCC
Vicm
The circuit equetions is following,
Vout＝a・（Vin＋Vio－Vin,n）
（0－Vin,n）/R1＝（Vin,n－Vout）/R2
Vio＝Vio,0＋（Vin－V0）/CMRR
Vin
Vout
VEE
∴Vout≒（1＋（R2/R1））・（Vin＋Vio）
input offset voltage is increased by voltage gain.
VEE
When Vicm changed,
Vio ls also changed.
Fig. 3.6.1 influence of common mode input voltage
120
100
100
80
CMRR [dB]
Common Mode Rejection Ratio [dB]
120
60
40
60
3V
20
80
5V
32V
0
-50
0
50
100
40
0.01
150
Ambient Temperature Ta [℃]
0.1
1
10
100
1000
Frequency [kHz]
（b） BA2904F CMRR frequency response
（VCC=5[V], VEE=0[V], Ta=25[℃]）
Fig. 3.6.2 example of CMRR characteristics
（a） BA2904F CMRR vs ambient temperature
www.rohm.com
© 2011 ROHM Co., Ltd. All rights reserved.
15/27
2011.11 - Rev.B
Op-Amp / Comparator Tutorial
Application Note
3.7 Power Supply Rejection Ratio (PSRR)
It refers to the ratio of fluctuation of input offset voltage when power supply voltage is changed.
Standard of specification indicates the ratio of fluctuation of input offset current when DC power supply voltage is changed.
PSRR=Δ(Vcc-VEE)/ΔVio
(3.7.1)
Definition of PSRR is the ratio between amplification factor Ad of amplifier with reference to input voltage difference and
amplification factor Ap with reference to power supply voltage, PSRR = Ad/Ap, which means the same thing as the equation
(3.7.1). It is ideal for an op-amp to increase the potential difference between + input terminal and - input terminal by the
amplification factor provided for the amplifier, while DC operation point inside the circuit is changed by changing power
supply voltage on actual op-amp, therefore the output voltage fluctuate slightly. When we put the amplification factor with
reference to the input differential voltage of op-amp at Ad, the amplification factor with reference to the power supply
voltage at Ap, the potential of + input terminal at Vin+, and the potential of - input terminal at Vin-, then the output voltage
from op-amp is represented by the equation below:
Vout=Ad・(Vin+-Vin-)+Ap・Vcc
=Ad・((Vin+-Vin-)+(Ap/Ad)・Vcc)
(3.7.2)
(3.7.3)
The term (Ap/Ad) Vcc in the equation above represents an error term by power supply voltage, and can be considered to be
an input offset voltage.
Vio,ps=(Ap/Ad)・Vcc
(3.7.4)
Fluctuation of input offset voltage with reference to the change of power supply voltage is calculated as follows by this relation:
(3.7.5)
ΔVcc/ΔVio,ps=Ap/Ac=PSRR
We understand that PSRR is equal to the ratio between the amplification factor Ad of input voltage difference and the
amplification factor of power supply voltage Ap mentioned above.
Let us consider the effect by the change of power supply voltage in actual use taking an example of non-inversion amplifier
in figure 3.7.2. When we put the input offset voltage by Vcc = 10[V] on op-amp at Vio.10, then the input offset voltage Vio.20
by Vcc = 20[V] is calculated as follows:
Vio,20=Vio,10+10[V]/PSRR
(3.7.6)
When Vio.10 = 1[mV] and PSRR = 80[dB], the input offset voltage Vio.20 by Vcc = 20[V] is 2[mV]. Therefore, it appears as
an error of 200[mV] on the output voltage if non-inverting amplifier with magnification factor 100 is used. In this connection,
PSRR attenuates when the frequency increases. Therefore the existence of ripple with high frequency on power supply line
leads to great fluctuation of output voltage. This effect can be suppressed by connecting a bypass capacitor near the
op-amp. Figure 3.7.2 shows an example of input offset voltage - power supply voltage characteristics and power supply
rejection ratio characteristics.
V
CC
When supply voltage(VCC or VEE)
changed, Vio ls also changed.
VEE
Fig. 3.7.1 Supply voltage dependence of input offset voltage
120
130
120
100
110
PSRR [dB]
Power Supply Rejection Ratio [dB]
140
100
90
80
80
60
70
60
-50
0
50
100
40
0.01
150
Ambient Temperature Ta [℃]
0.1
1
10
100
1000
Frequency [kHz]
（a） BA2904F PSRR vs ambient temperature
（a） BA2904F PSRR frequecy response
Fig. 3.7.2 example of PSRR characteristics
www.rohm.com
© 2011 ROHM Co., Ltd. All rights reserved.
16/27
2011.11 - Rev.B
Op-Amp / Comparator Tutorial
3.8
Application Note
Large signal voltage gain (large amplitude voltage gain, open loop voltage gain)
Av
It refers to an amplification factor with reference to differential voltage between + input terminal and - input terminal of
op-amp/comparator. The standard shows voltage gain with reference to DC voltage. High gain is preferable in general
because it is desired to make gain error as small as possible generated when feedback circuit is configured.
When we put the output voltage at Vout and input potential difference at Vin.d, then the voltage gain Av is given by the
equation below:
Av=Vout/Vin,d
(3.8.1)
Take an example of circuit in figure 3.8.1 to consider the gain error. This figure shows a non-inverting amplifying circuit, and
output voltage Vout is calculated as follows:
Vout=(1+R2/R1)・(1/(1+(1+R2/R1)/Av))・Vin
(3.8.2)
When we put R1 = 1 [kΩ], R2 = 10[kΩ], and Av = 80dB, this value is calculated as follows:
Vout=10.988・Vin
(3.8.3)
It is smaller than the ideal amplification factor 11. Voltage gain depends on frequency, and attenuates as the input signal
frequency becomes the higher. Therefore, the greater the frequency is, the greater is the gain error. Figure 3.8.2 shows an
example of voltage gain temperature characteristics and voltage gain frequency characteristics.
R1
R2
12.00
VCC
Voltage Gain [V/V]
10.00
Av
Vout
Vin
VEE
8.00
6.00
4.00
2.00
circuit equation is following,
Vout＝Av・（Vin,p－Vin,n）
（0－Vin,n）/R1＝（Vin,n－Vout）/R2
0.00
0
40
60
80
100
120
140
Large Signal Voltage Gain [dB]
∴Vout＝（1＋R2/R1）・（ 1/（1＋（1＋R2/R1）/Av））・ Vin
(a) inverting amplifier
20
（b） dependence of open loop voltage gain for 20dB inverting amplifier
Fig. 3.8.1 influence of open loop voltage gain
120
100
80
100
PSRR [dB]
Large Signal Voltage Gain [dB]
150
60
40
50
20
40dB non-inverting amp
open loop voltage gain
5V
0
15V
0
-50
0
50
100
Ambient Temperature Ta [℃]
-20
0.001
150
0.01
0.1
1
10
100
1000
Frequency [kHz]
（a） BA2904F large signal voltage gain vs ambient temperature
（RL=2 [kΩ]）
（b） BA2904F large signal voltage gain frequency response
（VCC＝5[V], RL=2[kΩ]）
Fig. 3.8.2 example of large signal voltage gain characteristics
www.rohm.com
© 2011 ROHM Co., Ltd. All rights reserved.
17/27
2011.11 - Rev.B
Op-Amp / Comparator Tutorial
Application Note
3.9 Slew Rate (SR)
It is a parameter which refers to the operation speed of op-amp. It refers to at what rate of time the output voltage rises or
falls when square wave pulse is applied to the input. Figure 3.9.1 shows the waveform of input/output voltage.
Slew rate makes it possible to estimate what degree of frequency signal can be applied. Figure 3.9.2 shows the waveform
of output voltage when the sine wave is applied to op amp. When we put the output voltage at Vout (t), amplitude at A, and
signal frequency at f, then Vout(t) can be calculated by the equation below:
Vout(t)=A・sin(2π・f・t)
(3.9.1)
When it is differentiated by t,
dVout(t)/dt=2π・f・A・sin(2π・f・t)
(3.9.2)
The time t when this slope becomes the maximum is when the sine wave reaches the intermediate potential, which is
shown by the equation below:
dVout(t)/dt |max=2π・f・A
(3.9.3)
In order that a signal is output without restriction by slew rate, the maximum inclination in the equation above must be
smaller than slew rate.
SR ＞ 2π・f・A
(3.9.4)
For example, when you want to make the op-amp with slew rate 1.0 [V/µs] output a sine wave with amplitude 5[Vp-p],
acceptable signal frequency is limited to the frequency which satisfies the equation below:
f＜SR / ( 2・π・A ) = 1.0[V/µs] / 2・π・5[Vp-p] = 31.83[kHz]
input
voltage
t
VCC
Δtr
output
voltage
Vout
Vin
(3.9.5)
Δtf
ΔV
Rising slew rate SR＋ ＝ ΔV / Δtr
falling slew rate SR－ ＝ ΔV / Δtf
normally measurement voltage range is
10% to 90% of maximum voltage swing
t
VEE
Fig. 3.9.1 slew rate
Ｖｉｎ
A
Vin1
input
voltage
ｔ
Vin2
－A
VCC
Ｖout
Slope of midium voltage:dVout/dt=2πfA
Output voltage is limited by slew rate.
Output voltage waveform is distorted that
dVout/dt value is over slew rate.
A
Vout
Vin
VEE
output
voltage
Vout1
ｔ
Vout2
－A
Fig. 3.9.2 input and output waveform applied sine wave
www.rohm.com
© 2011 ROHM Co., Ltd. All rights reserved.
18/27
2011.11 - Rev.B
Op-Amp / Comparator Tutorial
3.10
Response time
Application Note
tre / tpHL / tpLH
It is a parameter which shows in what time period a pulse is output when square wave pulse is applied to a comparator. It is
normally measured by the time period when a voltage reaches 50% of output voltage amplitude, starting from reference
voltage. Figure 3.10.1 shows the input/output waveform of comparator and op-amp. Rising time and falling time of output
waveform from op-amp containing phase compensation capacitance are limited by slew rate. Slew rate is determined by
the time to charge/discharge the phase compensation capacitance. Comparator has no phase compensation capacitance,
and responses in rising time and falling time is earlier than op-amp. In evaluating the response time of comparator, the
potential difference between reference voltage and signal level, called overdrive, is changed in evaluation. Here, response
time is measured by the time period from reference voltage up to 50% of output amplitude. It is also possible that the
response time is measured by applying an input signal of TTL level (3.5 [Vp-p]).
Comparator of BA10393 and BA10339 etc, is an output circuit of open collector type. In this output type, rising time
becomes shorter because the output NPN transistor drives the load directly. Rising time is limited by external pull-up
resistor, load capacitance (contain parasitic capacitance).
overdrive voltage
VREF
overdrive voltage
VREF
response time tpLH
response time tpHL
VRL
RL
VCC
VOH
VOH
50% of amplitude
Vout
Vin
50% of amplitude
VREF
VEE
VOL
VOL
output voltage
of op-amp
output voltage
of comparator
output voltage
of op-amp
output voltage
of comparator
Fig. 3.10.1 response time of op-amp and comparator
6
6
5
overdrive
5[mV]
20[mV]
100[mV]
4
3
Output Voltage [V]
Input Voltage [10-1V]
Output Voltage [V]
Input Voltage [10-1V]
5
2
1
input voltage
0
overdrive
5[mV]
20[mV]
100[mV]
4
3
2
1
input voltage
0
-1
-1
0
1
2
3
4
5
0
1
2
time [us]
3
4
5
time [us]
(b) rising time
(a) falling time
6
5
5
output voltage
4
3
input voltage
2
1
-1
Output V ol tag e [V ]
6
Input V ol tag e [10 V]
Output Voltage [V]
Input Voltage [10-1V]
Fig. 3.10.2 BA2903F response time (pull-up resistor 5.1[kΩ], Vcc=5V)
4
output voltage
3
input voltage
2
1
0
0
-1
-1
0
10
20
30
40
50
60
70
0
80
10
20
30
40
50
60
70
80
ti m e [us ]
time [us]
(b) rising time
(a) falling time
Fig. 3.10.3 BA2904F response time (load resistance 10[kΩ], Vcc=5V, 100mV overdrive)
www.rohm.com
© 2011 ROHM Co., Ltd. All rights reserved.
19/27
2011.11 - Rev.B
Op-Amp / Comparator Tutorial
3.11
Application Note
Open loop voltage gain frequency characteristics and unity gain frequency/gain bandwidth product
Figure 3.11.1 shows the open loop voltage gain frequency characteristics. Op-amp can be considered to be an integrator,
and has a high voltage gain by DC, while reduces the gain as the signal frequency becomes the higher. Important
parameters of frequency characteristics are phase margin, gain margin and unity gain frequency. Phase margin φm is a
parameter which shows how much margin a phase has with reference to 180 degrees when the gain is unity. Gain margin
GM shows how small the gain is with reference to unity when the phase is delayed 180 degrees. Unity gain frequency ft is a
frequency when the gain is 1. When we put the voltage gain frequency characteristics of op-amp at a(f), phase margin φm
and gain margin GM are represented by the equation below:
(3.11.1)
(3.11.2)
φm=180°-|∠a(ft)|
GM=20 log (1 / | a(f-180°) | )
Terms for estimating unity gain frequency include a parameter called gain bandwidth product (GBW). Gain bandwidth
product is a parameter for estimating ft assuming that the op-amp is a simple first order integrator. With use of this
assumption, the voltage gain frequency characteristics of op-amp are represented by the equation below:
a(f)=a0 / (1+j( f / f-3dB ) )
(3.11.3)
"ao" is a voltage gain with reference to DC voltage. (Same as the large signal voltage gain Av in section 3.9)
The magnitude of a(f) is given by the equation below:
|a(f)|=a0 / ( 1+( f / f-3dB )2 )1/2
(3.11.4)
In the equation above, the frequency which satisfies f >> f-3dB and the magnitude of voltage gain when f = ft are shown
respectively by the equation below:
f >> f-3dB
f=ft
a(f)|≒a0 / ( f / f-3dB )
|a(ft)|≒a0 / ( ft / f-3dB )=1
|a(f)|・f=a0・f-3dB
ft=a0・f-3dB
⇒
⇒
(3.11.5)
(3.11.6)
The relation below is established by the two equations above.
|a(f)|・f=ft
(3.11.7)
This relation means that the product of gain and frequency can always be approximate to ft in a frequency range which
satisfies f >> f -3dB.
20 log |a（f）|
Product of gain and frequency is constant value
(gain bandwidth product)
a0
|a（f）|・f＝ft
f-3dB
ft
（f is satisfied f >> f-3dB）
f
GM
∠a（f）
0°
f
-45°
-90°
φm
-180°
Fig. 3.11.1 open loop voltage gain (large signal voltage gain) frequency response
www.rohm.com
© 2011 ROHM Co., Ltd. All rights reserved.
20/27
2011.11 - Rev.B
Op-Amp / Comparator Tutorial
3.12
Application Note
Model of negative feedback system and oscillation condition
Op-amp is seldom used alone, but is used in configuration of negative feedback circuit. One of things that should be noted
in configuration of feedback circuit is the stability. Here, the stability of feedback circuit is described in the main.
3.12.1 Model of negative feedback system and oscillation condition
Model of negative feedback system is shown in figure 3.12.1. Transfer function between input and output is calculated by
use of this model. "a(f)" is the amplification factor of amplifier, and β(f) is a feedback factor determined by feedback circuit.
Transfer function A(f) between input and output is calculated by the equation below:
A(f)=Vout/Vin=a(f) / (1+β(f)・a(f))
=a(f)・(1+T(f))-1
=(1 / β(ｆ))・(1+1 / T(f))-1
(3.12.1)
(3.12.2)
(3.12.3)
T(f) =β(f) a(f) is a parameter called loop gain, and is determined by the product of amplification factor and feedback factor
of amplifier. As can be seen from the equation (3.12.2), as long as the loop gain is great, the gain of system in general
(transmission function) is 1/β(f).When the phase of T(f) rotates 180 degrees and the magnitude is 1, then Vout/Vin = ∞ in
the equation (3.12.1), and V is output even when input is zero. It means oscillation. In order to make negative feedback
circuit stable, before the phase of loop gain rotates 180 degrees, its magnitude must be attenuated below 1. Stable
condition is shown in the equation below:
Stable condition of negative feedback system
|T(f)| ＜ 1 , ∠T(f)=180
(3.12.4)
Figure 3.12.1 shows an example of frequency characteristics of loop gain. Indicator for determining the stability of negative
feedback system includes phase margin φm and gain margin GM.
(3.12.5)
(3.12.6)
φm=180°-|∠T(fx)|
GM=20 log (1 / |T(f-180°)|)
Vin
a（f）
Vout
20 log |T（f）|
T0
－
β（f）
f-3dB
Negative feedback system is constructed
bellow relationship
a（ｆ） ・（ Vin－β（f） ・ Vout）＝Vout
transfer function A（ｆ） is
A（f）＝Vout/Vin＝a（f）/（1＋a（f） ・ β（f））
＝a（f）/（1＋Ｔ（f））
＝（1/β（ｆ）） ・（ 1＋1/T（f））－1
where、T（ｆ）＝a（f）・β（f） is loop gain
If loop gain is satisfied T(f) >> 1,
transfer function is A（ｆ）≒1/β（ｆ）
fx
f
GM
∠T（f）
0°
f
-45°
-90°
φm
-180°
（a） Model of negative feedback system
（b） Loop gain frequency response
Fig. 3.12.1 Negative feedback system model and loop gain frequency response
www.rohm.com
© 2011 ROHM Co., Ltd. All rights reserved.
21/27
2011.11 - Rev.B
Op-Amp / Comparator Tutorial
Application Note
3.12.2 Stability of non-inverting amplifier and differentialor
Take an example of non-inverting amplifier and differentiator to consider stability. Feedback factor of non-inversion amplifier
is determined by resistance, and does not depend on frequency. Flow of signal in feedback circuit is in the direction from
output to input, therefore the feedback factor, loop gain, and transfer function are represented by the equation below:
β=Vin- / Vout=R1 / (R1+R2)
T(f)=a(f)・β=(a0 / (1+j・(f / f-3dB))・(R1 / (R1+R2))
A(f)=(1 / β)・(1+1 / T(ｆ))-1
(3.12.7)
(3.12.8)
(3.12.9)
Gain a(f) of op-amp alone and 1/β are shown in the bode plot in figure 3.12.2. On this bode plot, T(f) is a difference
between a(f) and 1/β. (20 log |a(f)|-20 log |1/β|=20 log |a(f)・β|=20 log |T(f)|) The smaller β is (feedback amount smaller),
the less is the delay of phase when │T(f)│= 1. The greater β is (feedback amount greater), the poorer is the stability.
Whenβ=1, the smallest is the phase margin. β=1 (R1 = ∞, R2 = 0) when voltage follower is configured, and stability of
op-amp alone is required. Op-amp containing phase compensation capacitor in general is designed not to oscillate when
voltage follower is configured. Figure 3.12.3 shows a differentiator (high pass filter).
In differentiator, feedback circuit contains capacitor, which delays the phase of loop gain. Stability can be improved by
connecting a resistor in series to the capacitor. Feedback factor, loop gain, and transfer function are represented by the
equation below:
(3.12.10)
(3.12.11)
(3.12.12)
β(f)=Vin-/Vout=(1+j・2πf・C1Rs)/(1+j・2πf・C1(R1+Rs))
T(f)=a(f)・β(f)=(a0/(1+j・(f / f-3dB))・(1+j・2πf・C1Rs/(1+j・2πf・C1(R1+Rs)))
-1
A(f)=-(j・2πf・C1R1/(1+j・2πf・C1Rs))・(1+1/T(ｆ))
Here, it should be noted that the transfer function in DC does not follow 1/β(0) when inverting amplifier is configured, but
equals to - (R1/Rs + 1/(j 2πf C1)). In a differentiator, it can be seen that the phase of loop gain advances and stability
improves when Rs is connected to C1 in series.
R1
R2
Rs
R1
C1
Vin
VCC
VCC
Vout
Vout
Vin
VEE
a0
VEE
|a（f）|
a0
|T（f）|=1
|a（f）|
not insertion of Rs
|T（f）|=1
|T（f）|
|1/β|
|T（f）|
insertion of Rs
1＋R2/R1
|1/β|
ft
f-3dB
f
fz＝1/2πC1・(R1+Rs)
fx=ft/（1＋R2/R1）
∠T（f）
fp=1/2πCRs
f x=f t/（1＋R1/Rs）
∠T（f）
0°
0°
f
-45°
f
ft
f
-45°
-90°
insertion of Rs
-90°
φm=90°
-180°
-180°
not insertion of Rs φm≒0°
a0
|a（f）|
a0
|a（f）|
not insertion of Rs
|A（ｆ）|
1＋R2/R1
|A（ｆ）|
ft
f
insertion of Rs
ft
f
fx=ft /（1＋R2/R1）
Fig. 3.12.2 loop gain frequency response of non-inverting amp
www.rohm.com
© 2011 ROHM Co., Ltd. All rights reserved.
22/27
Fig.3.12.3 loop gain frequency response of differntiator
2011.11 - Rev.B
Op-Amp / Comparator Tutorial
3.13
Application Note
Total Harmonic Distortion plus Noise (THD + N)
If shows how much harmonic component and noise component are contained in output signal.
THD + N = (Sum of harmonic component and noise component) / (Output voltage)
Harmonics is generated by nonlinearity of op-amp circuit. It results from the fact that the current - voltage static
characteristic of transistor is exponential function (for bipolar transistor), and amplification factor is a nonlinear function with
reference to input voltage, etc. Noise is generated not only by disturbance but also by peripheral components such as
semiconductor element within IC and resistor. Output from op-amp contains theses components, which distort the
waveform.
When an amplifier is configured with op-amp, not only input signal but also noise component is amplified. Therefore, when
a circuit with great amplification factor is configured, distortion factor becomes greater if output signal level is small.
Figure 3.13.2 (a) shows an example of output amplitude - frequency characteristics using the gain as a parameter.
Output signal is limited by the slew rate of op-amp. Therefore, when a signal has a great frequency or when output signal
has a great amplitude, distortion factor becomes great. Figure 3.13.2(b) shows a distortion factor characteristic using the
signal frequency as a parameter.
R2
R1
VCC
VCC
Vout
Vout
Vin
f=1kHz
Vin
f=1kHz
VEE
VEE
output voltage spectrum
output voltage spectrum
basic signal（desired output signal）
basic signal（desired output signal）
harmonis components
harmonis components
noise voltage is
also amplified by voltage gain.
noise voltage
f
f
（a） Output voltage spectrum
under voltage follower constructed
（b） Output voltage spectrum
under non-inverting anp constructed
Fig. 3.13.1 Image of THD＋N
1
1
Av=0dB
20Hz
Av=10dB
1kHz
Av=20dB
THD＋N [%]
THD＋N [%]
20kHz
0.1
0.1
0.01
0.01
0.001
0.001
0.0001
0.0001
0.1
1
0.1
10
Output Voltage [Vrms]
10
THD is increased due to slew rate.
THD+N is relatively large value due to
small input signal level
（a） THD+N dependence of voltage gain （f＝1kHz）
1
Output Voltage [Vrms]
（b） THD+N dependence of signal frequency (Av=20dB)
Fig. 3.13.2 BA4558R THD + N vs. output voltage
(V+=15V,V-=-15V,RL=10kΩ,DIN AUDIO FILTER)
www.rohm.com
© 2011 ROHM Co., Ltd. All rights reserved.
23/27
2011.11 - Rev.B
Op-Amp / Comparator Tutorial
Application Note
In addition, it is possible that the distortion factor becomes extremely high depending on output circuit configuration and
load condition. Figure 3.13.3 shows the output circuit and distortion factor of op-amp of BA4558R and BA2904. BA4558R
has an output circuit configuration called push-pull circuit of class AB. In this output circuit configuration, idling current is
always allowed to flow in the output transistor to turn it on, which suppresses crossover distortion generated when source
current and sink current are switched. BA2904 type has an output configuration called push-pull circuit of class C, and
performs operation of class A when output sink current is small. When sink current exceeds several ten µA, great current
PNP transistor Q4 turns on and crossover distortion is generated. Especially, when it is used by split power supplies, care
should be taken because intake current may become great. This crossover distortion can be suppressed by always turning
on PNPTr by use of pull-up resistor or by restricting intake current within several tenµ A.
1
VCC
Class AB output stage.
Due to Q2, Q3 is always ON state,
cross over distortion is suppressed.
Q1
0.1
Q2
R1
Vout
ｔ
R2
0.01
0.001
RL
Q4
THD＋N [%]
Vout
Q3
0.0001
0.1
1
10
Output Voltage [Vrms]
VEE
（b） BA4558RF THD+N vs output voltage
( VCC=15[V], VEE=-15[V], RL=10[kΩ],
signal frequency 1[kHz], 20[Hz]～20[kHz]LPF )
（a） BA4558RF output stage
Fig. 3.13.3 BA4558RF output stage and THD＋N
cross over distortion caused by switching of Q3 ans Q4.
Q4 is ON state, when output sink current over about 10μA.
THD is increased by discontinuous waveform (harmonic component).
THD is increased by cross over distortion.
1
VCC
Vout
Q1
0.1
Q3
Rp
THD＋N [%]
Q2
ｔ
Isource
R1
Vout
Vout
Q4
Q5
0.01
0.001
RL
RL=10kΩ
RL=10kΩ pull dow n to VEE
ｔ
50μA
Rp=3kΩpull up resistor
0.0001
VEE
0.1
If Q4 is always ON state with pull-up resistorRp or
insertion pull down resistor RL toVEE
cross over distortion is suppressed.
1
10
Output Voltage [Vrms]
Cross over distiortion is suppressed by
insertion of pull up resister or pull down resistor to VEE.
（b） BA2904F THD+N－output voltage
( VCC=15[V], VEE=-15[V], RL=10[kΩ],
signal frequency1[kHz], 20[Hz]～20[kHz]LPF )
（a） BA2904F output stage
Fig. 3.13.4 BA2904F output stage and THD＋N
www.rohm.com
© 2011 ROHM Co., Ltd. All rights reserved.
24/27
2011.11 - Rev.B
Op-Amp / Comparator Tutorial
3.14
Application Note
Equivalent input noise source (input referred noise source)
Output noise from op-amp is converted into input noise voltage source, which makes an equivalent input noise source.
equivalent input noise source is divided into input equivalent input noise voltage and equivalent input noise current.
Noise contains a wide range of frequency component, and is normally represented by frequency spectrum.
Noise is generated not only by disturbance, but also by chronologically discontinuous movement of electron.
Noise generated by resistor and semiconductor element is mainly thermal noise, shot noise, and flicker noise (1/f noise).
Principal mechanism by which noise is generated includes the following:
Thermal noise
Shot noise
Flicker noise
: Thermal random movement of electron in resistor. Distributed in a wide range of frequency area
(white noise).
Noise generated in resistor of resistance R is Vnr2/Δf = 4kTR, Inr2/Δf = 4kT/R.
: Noise observed in active element, which is caused by electron passing depletion layer discontinuously
(chronologically). It is found in forward current of diode, etc. Distributed in a wide range of frequency
area (white noise).
When we put DC current flowing in active element at I, In2/Δf = 2qI is established.
: Noise observed in active element, which is caused when trap generated by crystal defect captures and
emits electron at random. Noise distributed in low-frequency area. It is also called 1/f noise because
noise power density is inversely proportional to frequency. It is considered to be caused by crystal
defect between base and emitter of bipolar transistor. When we put DC current flowing in element at I
(base current as for bipolar transistor), In2 / Δf = k Ia / f is established.
Where, k: Boltzmann constant, T: absolute temperature, K and a: constant determined by process, and
Δf: frequency range which is interested in.
Op-amp consists of passive element such as resistor and active element such as transistor, and emits noise. The model of
op-amp including equivalent input noise source is shown in figure 3.14.1. Noise has no polarity, and input noise source
must be considered on both + input voltage and - input voltage. Considering that op-amp amplifies the difference between +
input voltage and - input voltage, input conversion noise voltage can be collected either on + input terminal or - input
terminal.
Normally, equivalent input noise voltage is considered on + input terminal side. Consider the processing input terminal for
the reason for considering both noise voltage and noise current. Noise appears on output even when input terminal is
shorted or opened with no input signal applied to op-amp. When input terminal is shorted, input noise current source can be
ignored, so that output noise is generated from input noise voltage source. When high resistance is connected to the input
terminal, the input noise current source generates a great voltage fall and is amplified and output, so that output noise is
dominantly affected by input noise current source.
Equivalent input noise source
VCC
VCC
Vn,n
In,n
Vout
Vout
In,p
VEE
Vn,p
Noiseless opamp
VEE
（a）Output noise voltage of op-amp
（b） Model of equivalent input noise source
Vn, In
VCC
flicker noise
distributed over low frequency region
In,n
thermal noise, shot noise
distributed over wide bandwidth
Vout
In,p
VEE
Vn=Vn,p+Vn,n
（c） Model of equivalent input noise source
( voltage noise contains both non-inverting input
and inverting input one.)
ｆ
（d）Frequency spectrum of noise source
Fig. 3.14.1 Noise sauce model of op-amp
www.rohm.com
© 2011 ROHM Co., Ltd. All rights reserved.
25/27
2011.11 - Rev.B
Op-Amp / Comparator Tutorial
Application Note
Consider the output noise voltage on non-inverting amplifier in figure 3.14.2. Put the thermal noise generated from resistor
R1, R2, and R3 respectively at In1, In2, and In3. It is impossible to superimpose voltage and amperage on noise, but it is
possible to superimpose by power. When we convert all noise sources as equivalent input noise voltage source Vnt, it is as
follows:
2
2
2
2
2
2
2
2
2
Vnt =Vni +R3 ・(In3 +Inp )+(R1 // R2) ・(Inn +In1 +In2 )
2
2
2
2
2
=Vni +R3 ・Inp +(R1 // R2) ・Inn +4kT・｛R3+(R1 // R2)｝
2
2
2
2
=Vni +｛R3 +(R1 // R2) ｝・In +4kT・｛R3+(R1 // R2)｝(assuming Inp=Inn)
(3.13.1)
(3.13.2)
(3.13.3)
2
2
2
2
where, Vni =Vnw ・(fcv/f+1)、In =Inw ・(fci/f+1)、Boltzmann’s constant k、
fcv、fci is the corner frequency of noise voltage and noise current, respectively. (Fig 3.13.2(c))
The voltage gain of non-inverting amplifier is represented A(f), output noise voltage is following,
Vno=｛∫|A(f)|2・Vnt2 df ｝1/2
If non-inverting amplifier is assumed one order integrator, that is A(f)=A0 / ( 1+j・f / fa ), output voltage noise within
frequency bandwidth fL to fH is approximated bellow equation.
2
2
Vno=(1+R2/R1)・｛Vnw ・(fcv・log(fA/fL)+1.57fA-fL)+(R32+(R1//R2)2)・In ・(fcv・log(fA/fL)+1.57fA-fL)
+4kT・(R3+(R1//R2))・(1.57fA-fL) ｝1/2
(3.13.4)
Fig.3.14.3(a), (b) is specified equivalent input noise voltage characteristics examples.
In1
In2
R1
R2
R2
R1
VCC
VCC
Inn
Vno
In3
VEE
Vni
R3 Inp
R3
（a） noise source of non-inverting amplifier
Vni
VEE
（b） equivalent input noise voltage of (a)
Vn 2
4kT・｛R3＋（R1//R2）｝
Vn
2
Output noise voltage is limited op-amp
frequency response. Therefore, high frequecy
compornent of noise voltage is rejected.
ｆ
output noise voltage Vno2
Noise voltage caused by resistor R1,R2,R3
Vni2
flicker noise
2
Vnw ・(fcv/f＋1)
In 2
flicker noise
2
Inw ・(fcv/f＋1)
A0
2
fL
2
Vnw
2
Inw
ｆcv
Equivalent input noise voltage of op-amp
ｆ
ｆci
fH
equivalnet input noise
2
ｆ voltage Vnt
Equivalent input current voltage of op-amp
（c） compornent of equivalent input noise
voltage gain of amplifier |A(f)|2
（d） ouput noise voltage
Fig. 3.14.2 noise effect for non-inverting amplifier
www.rohm.com
© 2011 ROHM Co., Ltd. All rights reserved.
26/27
f
2011.11 - Rev.B
Op-Amp / Comparator Tutorial
Application Note
10
Input Referred Noise Voltage Vn [μVrms]
Input Referred Noise Voltage (nV/√Hz)
60
50
40
30
20
10
0
1
10
100
Frequency [Hz]
1000
1
0.1
10000
10
100
1000
10000
100000
Input Signal Source Resistor [Ω]
（a） BA4558R equivalent input noise voltage vs. frequency （b） BA4558R equivalent input noise voltage vs. signal source resistance
(VCC=15V,VEE=-15V, 20dB non-inverting amp)
(VCC=15V,VEE=-15V,20dBnon-inverting amp, 20Hz～20kHzLPF)
Fig. 3.14.3 Example of equivalent input noise spectrum
www.rohm.com
© 2011 ROHM Co., Ltd. All rights reserved.
27/27
2011.11 - Rev.B
Notice
Notes
No copying or reproduction of this document, in part or in whole, is permitted without the
consent of ROHM Co.,Ltd.
The content specified herein is subject to change for improvement without notice.
The content specified herein is for the purpose of introducing ROHM's products (hereinafter
"Products"). If you wish to use any such Product, please be sure to refer to the specifications,
which can be obtained from ROHM upon request.
Examples of application circuits, circuit constants and any other information contained herein
illustrate the standard usage and operations of the Products. The peripheral conditions must
be taken into account when designing circuits for mass production.
Great care was taken in ensuring the accuracy of the information specified in this document.
However, should you incur any damage arising from any inaccuracy or misprint of such
information, ROHM shall bear no responsibility for such damage.
The technical information specified herein is intended only to show the typical functions of and
examples of application circuits for the Products. ROHM does not grant you, explicitly or
implicitly, any license to use or exercise intellectual property or other rights held by ROHM and
other parties. ROHM shall bear no responsibility whatsoever for any dispute arising from the
use of such technical information.
The Products specified in this document are intended to be used with general-use electronic
equipment or devices (such as audio visual equipment, office-automation equipment, communication devices, electronic appliances and amusement devices).
The Products specified in this document are not designed to be radiation tolerant.
While ROHM always makes efforts to enhance the quality and reliability of its Products, a
Product may fail or malfunction for a variety of reasons.
Please be sure to implement in your equipment using the Products safety measures to guard
against the possibility of physical injury, fire or any other damage caused in the event of the
failure of any Product, such as derating, redundancy, fire control and fail-safe designs. ROHM
shall bear no responsibility whatsoever for your use of any Product outside of the prescribed
scope or not in accordance with the instruction manual.
The Products are not designed or manufactured to be used with any equipment, device or
system which requires an extremely high level of reliability the failure or malfunction of which
may result in a direct threat to human life or create a risk of human injury (such as a medical
instrument, transportation equipment, aerospace machinery, nuclear-reactor controller, fuelcontroller or other safety device). ROHM shall bear no responsibility in any way for use of any
of the Products for the above special purposes. If a Product is intended to be used for any
such special purpose, please contact a ROHM sales representative before purchasing.
If you intend to export or ship overseas any Product or technology specified herein that may
be controlled under the Foreign Exchange and the Foreign Trade Law, you will be required to
obtain a license or permit under the Law.
Thank you for your accessing to ROHM product informations.
More detail product informations and catalogs are available, please contact us.
ROHM Customer Support System
http://www.rohm.com/contact/
www.rohm.com
© 2011 ROHM Co., Ltd. All rights reserved.
R1120A