DATASHEET

REVISIONS
LTR
DESCRIPTION
DATE (YR-MO-DA)
APPROVED
A
Added case outline letter U to the drawing. Removed ESDS
requirements from drawing. Editorial changes throughout.
90-01-26
M. A. Frye
B
Changes in accordance with NOR 5962-R117-92
92-01-27
M. A. Frye
C
Redrawn with changes. Add device type 05. Add software data
protect. Added vendor CAGE 60395 and 61394 as approved sources.
Editorial changes throughout.
92-12-18
M.A. Frye
D
Changes in accordance with NOR 5962-R216-93
93-08-20
M.A. Frye
E
Updated boilerplate. Removed data retention and endurance tests
from drawing. Removed programming specifics from drawing. - glg
00-08-07
Raymond Monnin
F
Boilerplate update and part of five year review. tcr
07-03-29
Robert M. Heber
G
Update drawing to meet current MIL-PRF-38535 requirements. - glg
15-10-20
Charles Saffle
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REV STATUS
OF SHEETS
PMIC N/A
STANDARD
MICROCIRCUIT
DRAWING
THIS DRAWING IS
AVAILABLE
FOR USE BY ALL
DEPARTMENTS
AND AGENCIES OF THE
DEPARTMENT OF DEFENSE
AMSC N/A
REV
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PREPARED BY
Kenneth Rice
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
http://www.landandmaritime.mil
CHECKED BY
Ray Monnin
APPROVED BY
Michael A. Frye
DRAWING APPROVAL DATE
89-02-13
REVISION LEVEL
G
MICROCIRCUIT, MEMORY, DIGITAL,
CMOS,32K x 8 EEPROM, MONOLITHIC
SILICON
SIZE
A
CAGE CODE
5962-88634
67264
SHEET
1 OF
DSCC FORM 2233
APR 97
19
5962-E520-15
1. SCOPE
1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in
accordance with MIL-PRF-38535, appendix A.
1.2 Part or Identifying Number (PIN). The complete PIN shall be as shown in the following example:
5962-88634
01
U
A
Drawing number
Device type
(see 1.2.1)
Case outline
(see 1.2.2)
Lead finish
(see 1.2.3)
1.2.1 Device type(s). The device type(s) identify the circuit function as follows:
Device
type
Generic
number
Circuit
function
Access Write
time
speed
Write mode
End of write indicator
Endurance
01
See 6.6
32K x 8 EEPROM 120 ns 10 ms
byte/page
DATA polling/toggle bit 10,000 cycles
02
See 6.6
32K x 8 EEPROM 120 ns
3 ms
byte/page
DATA polling/toggle bit 10,000 cycles
03
See 6.6
32K x 8 EEPROM 90 ns
10 ms
byte/page
DATA polling/toggle bit 10,000 cycles
04
See 6.6
32K x 8 EEPROM 90 ns
3 ms
byte/page
DATA polling/toggle bit 10,000 cycles
05
See 6.6
32K x 8 EEPROM 70 ns
10 ms
byte/page
DATA polling/toggle bit 10,000 cycles
1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows:
Outline letter
U
X
Y
Z
Descriptive designator
See figure 1
GDIP1-T28 or CDIP2-T28
CQCC1-N32
CDFP4-F28
Terminals
28
28
32
28
Package style
Pin grid array
Dual-in-line
Rectangular leadless chip carrier
Flat pack
1.3 Absolute maximum ratings. 1/
Supply voltage range (VCC) ........................................................ -0.3 V dc to +6.25 V dc
Storage temperature range ........................................................ -65°C to +150°C
Maximum power dissipation (PD) ............................................... 1.0 W
Lead temperature (soldering, 10 seconds)................................. +300°C
Junction temperature (TJ) 2/...................................................... +175°C
Thermal resistance, junction-to-case (θJC) ................................. See MIL-STD-1835
Input voltage range (VIL, VIH) ...................................................... -0.3 V dc to +6.25 V dc
Data retention ............................................................................ 20 years (minimum)
Endurance.................................................................................. 10,000 cycles (minimum)
Chip clear voltage (Vh) ............................................................... 13.0 V dc
1.4 Recommended operating conditions. 1/
Supply voltage range (VCC) ........................................................ +4.5 V dc to +5.5 V dc
Case operating temperature range (TC) ..................................... -55°C to +125°C
Input voltage, low range (VIL) ..................................................... -0.1 V dc to +0.8 V dc
Input voltage, high range (VIH) ................................................... +2.0 V dc to VCC + 0.3 V dc
1/
2/
All voltages are referenced to VSS (ground).
Maximum junction temperature shall not be exceeded except for allowable short duration burn-in screening conditions in
accordance with method 5004 of MIL-STD-883.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-88634
A
REVISION LEVEL
G
SHEET
2
2. APPLICABLE DOCUMENTS
2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part
of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the
solicitation or contract.
DEPARTMENT OF DEFENSE SPECIFICATION
MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for.
DEPARTMENT OF DEFENSE STANDARDS
MIL-STD-883 MIL-STD-1835 -
Test Method Standard Microcircuits.
Interface Standard Electronic Component Case Outlines.
DEPARTMENT OF DEFENSE HANDBOOKS
MIL-HDBK-103 MIL-HDBK-780 -
List of Standard Microcircuit Drawings.
Standard Microcircuit Drawings.
(Copies of these documents are available online at http://quicksearch.dla.mil or from the Standardization Document Order
Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.)
2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text
of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a
specific exemption has been obtained.
3. REQUIREMENTS
3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for nonJAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer
Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity
approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make
modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These
modifications shall not affect the PIN as described herein. A "Q" or "QML" certification mark in accordance with MIL-PRF-38535
is required to identify when the QML flow option is used.
3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified
in MIL-PRF-38535, appendix A and herein.
3.2.1 Terminal connections. The terminal connections shall be as specified on figure 2.
3.2.2 Truth table(s). The truth table(s) for unprogrammed devices shall be as specified on figure 3.
3.2.2.1 Programmed devices. The requirements for supplying programmed devices are not part of this drawing.
3.2.3 Case outlines. The case outlines shall be in accordance with figure 1 and 1.2.2 herein.
3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are
as specified in table I and shall apply over the full case operating temperature range.
3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical
tests for each subgroup are described in table I.
3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed
in 1.2 herein. In addition, the manufacturer's PIN may also be marked. For packages where marking of the entire SMD PIN
number is not feasible due to space limitations, the manufacturer has the option of not marking the "5962-" on the device.
3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance
to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a "Q" or "QML" certification mark in
accordance with MIL-PRF-38535 to identify when the QML flow option is used.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-88634
A
REVISION LEVEL
G
SHEET
3
TABLE I. Electrical performance characteristics.
Test
Symbol
Conditions
-55°C ≤ TC ≤ +125°C
VSS = 0 V, 4.5 V < VCC < 5.5 V,
unless otherwise specified 1/
Group A
subgroups
Device
type
Limits
1, 2, 3
All
1, 2, 3
01, 02
3
03, 04,
05
60
01, 02
350
µA
03, 04,
05
60
mA
Min
Supply current
ICC1
(operating)
Supply current
Max
80
mA
all I/O's = 0.0 mA,
inputs = VCC = 5.5 V,
tAVAV = tAVAV(min)
ICC2
(TTL standby)
Supply current
CE = OE = VIL, WE = VIH,
Unit
CE = VIH, OE = VIL,
all I/O's = 0.0 mA,
inputs = VCC - 0.3 V,
f = 0.0 MHz
ICC3
CE = VCC - 0.3 V,
Input leakage (high)
IIH
all I/O's = 0.0 mA,
inputs = VIL or VCC - 0.3 V,
f = 0.0 MHz
VIN = 5.5 V
1, 2, 3
All
Input leakage (low)
IIL
VIN = 0.1 V
1, 2, 3
All
Output leakage (high)
IOHZ
VOUT = 5.5 V, CE = VIH 2/
1, 2, 3
All
Output leakage (low)
IOLZ
VOUT = 0.1 V, CE = VIH 2/
1, 2, 3
All
-10
Input voltage low
VIL
1, 2, 3
All
-0.1
0.8
V
Input voltage high
VIH
1, 2, 3
All
2.0
V
Output voltage low
VOL
IOL = 6.0 mA, VIH = 2.0 V,
VCC = 4.5 V, VIL = 0.8 V
1, 2, 3
All
VCC
+0.3 V
0.45
Output voltage high
VOH
IOH = -4.0 mA, VIH = 2.0 V,
VCC = 4.5 V, VIL = 0.8 V
1, 2, 3
All
(CMOS standby)
1, 2, 3
mA
µA
10
µA
-10
µA
10
µA
V
2.4
V
See footnotes at end of table.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-88634
A
REVISION LEVEL
G
SHEET
4
TABLE I. Electrical performance characteristics - Continued.
Test
Symbol
Conditions
-55°C ≤ TC ≤ +125°C
VSS = 0 V, 4.5 V < VCC < 5.5 V,
unless otherwise specified 1/
Group A
subgroups
Device
type
Limits
Min
-10
Unit
Max
100
µA
OE high leakage
(chip erase)
IOE
VH = 13 V
1, 2, 3
All
Input capacitance
CI
4
All
10
pF
Output capacitance
CO
4
All
10
pF
Read cycle time
tAVAV
VI = 0 V, VCC = 5.0 V,
TA = +25°C, f = 1 MHz,
see 4.3.1c 3/ 4/
VO = 0 V, VCC = 5.0 V,
TA = +25°C, f = 1 MHz,
see 4.3.1c 3/ 4/
See figure 4 5/
Address access time
Chip enable
9, 10, 11
tAVQV
9, 10, 11
tELQV
9, 10, 11
Chip enable to output
in low Z 4/
tOLQV
tELQX
120
03, 04
90
05
70
ns
01, 02
120
03, 04
90
05
70
01, 02
120
03, 04
90
05
70
9, 10, 11
01, 02
50
40
9, 10, 11
03, 04,
05
All
access time
Output enable access
01, 02
ns
ns
ns
10
ns
See footnotes at end of table.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-88634
A
REVISION LEVEL
G
SHEET
5
TABLE I. Electrical performance characteristics - Continued.
Test
Symbol
Conditions
-55°C ≤ TC ≤ +125°C
VSS = 0 V, 4.5 V < VCC < 5.5 V,
unless otherwise specified 1/
Group A
subgroups
Device
type
9, 10, 11
01, 02
Limits
Min
Chip disable to output
tEHQZ
See figure 4 5/
in high Z 4/
03, 04,
05
Unit
Max
50
40
Output enable to
output in low Z 4/
tOLQX
9, 10, 11
All
Output disable to
tOHQX
9, 10, 11
01, 02
50
03, 04,
05
40
output in high Z 4/
10
ns
Output hold from
address change
tAXQX
9, 10, 11
All
Write cycle time
tWHWL1
9, 10, 11
01, 03,
05
10
02, 04
3
tEHEL1
Address setup time
tAVEL
ns
ns
0
ns
ms
9, 10, 11
All
20
ns
9, 10, 11
All
50
ns
9, 10, 11
All
0
ns
9, 10, 11
All
0
ns
tAVWL
Address hold time
tELAX
tWLAX
Write setup time
tWLEL
tELWL
Write hold time
tEHWH
tWHEH
See footnotes at end of table.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-88634
A
REVISION LEVEL
G
SHEET
6
TABLE I. Electrical performance characteristics - Continued.
Test
OE setup time
Symbol
tOHEL
Conditions
-55°C ≤ TC ≤ +125°C
VSS = 0 V, 4.5 V < VCC < 5.5 V,
unless otherwise specified 1/
See figure 4 5/
Group A
subgroups
Device
type
Limits
Unit
9, 10, 11
All
Min
0
9, 10, 11
All
0
ns
9, 10, 11
All
150
ns
9, 10, 11
All
50
ns
9, 10, 11
All
0
ns
.20
Max
ns
tOHWL
OE hold time
tEHOL
tWHOL
WE pulse width
tELEH
tWLWH
Data setup time
tDVEH
tDVWH
Data hold time
tEHDX
tWHDX
Byte load cycle
tWHWL2
9, 10, 11
All
Last byte loaded to
tWHEL
9, 10, 11
All
data polling 4/
tEHEL
149
µs
0
ns
CE setup time
tELWL1
9, 10, 11
All
5
µs
Output setup time
tOVHWL
9, 10, 11
All
5
µs
CE hold time
tWHEH1
9, 10, 11
All
5
µs
OE hold time
tWHOH
9, 10, 11
All
5
µs
High voltage
VH
9, 10, 11
All
12
Chip erase
tWLWH2
9, 10, 11
All
WE pulse width for
chip erase
tWLWH1
9, 10, 11
All
13
V
210
ms
10
ms
See footnotes at end of table.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-88634
A
REVISION LEVEL
G
SHEET
7
TABLE I. Electrical performance characteristics - Continued.
1/ DC and read mode.
2/ Connect all address inputs and OE to VIH and measure IOLZ and IOHZ with the output under test connected to VOUT.
3/ All pins not being tested are to be open.
4/ Tested initially and after any design or process changes that affect that parameter, and therefore shall be guaranteed to the
limits specified in table I.
5/ Tested by application of specified timing signals and conditions, including:
Equivalent ac test conditions for all device types:
Output load: 1 TTL gate and CL = 100 pF (minimum) or equivalent circuit.
Input rise and fall times < 10 ns.
Input pulse levels: 0.4 V and 2.4 V.
Timing measurements reference levels:
Inputs 1.0 V and 2.0 V.
Outputs 0.8 V and 2.0 V.
3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an
approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DLA Land and
Maritime-VA prior to listing as an approved source of supply shall affirm that the manufacturer's product meets the requirements
of MIL-PRF-38535, appendix A and the requirements herein.
3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with
each lot of microcircuits delivered to this drawing.
3.8 Notification of change. Notification of change to DLA Land and Maritime-VA shall be required for any change that affects
this drawing.
3.9 Verification and review. DLA Land and Maritime, DLA Land and Maritime's agent, and the acquiring activity retain the
option to review the manufacturer's facility and applicable required documentation. Offshore documentation shall be made
available onshore at the option of the reviewer.
3.10 Processing EEPROMS. All testing requirements and quality assurance provisions herein shall be satisfied by the
manufacturer prior to delivery.
3.10.1 Erasure of EEPROMS. When specified, devices shall be erased in accordance with the procedures and characteristics
specified by the manufacturer.
3.10.2 Programmability of EEPROMS. When specified, devices shall be programmed to the specified pattern using the
procedures and characteristics specified by the manufacturer and shall be made available upon request.
3.10.3 Verification of erasure or programmability of EEPROMS. When specified, devices shall be verified as either
programmed to the specified pattern or erased. As a minimum, verification shall consist of performing a read of the entire array
to verify that all bits are in the proper state. Any bit that does not verify to be in the proper state shall constitute a device failure,
and shall be removed from the lot or sample.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-88634
A
REVISION LEVEL
G
SHEET
8
NOTES:
1. Dimensions are in inches.
2. Metric equivalents are for general information only.
Inches
.002
.005
.008
.010
.012
.018
.050
.067
.075
.100
.180
.551
.650
mm
0.05
0.13
0.20
0.25
0.30
0.46
1.27
1.70
1.90
2.54
4.57
14.00
16.51
FIGURE 1. Case outline U.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-88634
A
REVISION LEVEL
G
SHEET
9
Device types
Case outlines
Terminal number
01 through 05
X, Z, U
Y
Terminal symbol
1
A14
NC
2
A12
A14
3
A7
A12
4
A6
A7
5
A5
A6
6
A4
A5
7
A3
A4
8
A2
A3
9
A1
A2
10
A0
A1
11
I/O0
A0
12
I/O1
NC
13
I/O2
I/O0
14
VSS
I/O1
15
I/O3
I/O2
16
I/O4
VSS
17
18
I/O5
I/O6
NC
I/O3
19
I/O7
I/O4
20
CE
I/O5
21
A10
I/O6
22
OE
I/O7
23
A11
CE
24
A9
A10
25
A8
OE
26
A13
NC
27
A11
28
WE
VCC
29
----
A8
30
----
A13
31
----
32
----
WE
VCC
A9
FIGURE 2. Terminal connections.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-88634
A
REVISION LEVEL
G
SHEET
10
Device types 01 through 05
Mode
CE
OE
WE
I/O
Read
VIL
VIL
VIH
DOUT
Standby
VIH
X
X
High Z
Chip clear
VIL
VH
VIL
X
Byte write
VIL
VIH
VIL
DIN
Write inhibit
X
VIL
X
High Z/DOUT
Write inhibit
X
X
VIH
High Z/DOUT
VIH = High logic level
VIL = Low logic level
VH = Chip clear high voltage
X = Don't care
High Z = High impedance state
DIN = Data in
DOUT = Data out
FIGURE 3. Truth table for unprogrammed devices.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-88634
A
REVISION LEVEL
G
SHEET
11
Read cycle waveform
FIGURE 4. AC waveforms.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-88634
A
REVISION LEVEL
G
SHEET
12
WE controlled byte write programming waveforms
FIGURE 4. AC waveforms - continued.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-88634
A
REVISION LEVEL
G
SHEET
13
CE controlled byte write programming waveforms
FIGURE 4. AC waveforms - continued.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-88634
A
REVISION LEVEL
G
SHEET
14
Page write waveform
FIGURE 4. AC waveforms - continued.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-88634
A
REVISION LEVEL
G
SHEET
15
Chip clear waveform
FIGURE 4. AC waveforms - continued.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-88634
A
REVISION LEVEL
G
SHEET
16
3.12 Endurance. A reprogrammability test shall be completed as part of the vendor's reliability monitors. This
reprogrammability test shall be done for initial characterization and after any design or process changes which may affect the
reprogrammability of the device. The methods and procedures may be vendor specific, but shall guarantee the number of
program/erase endurance cycles listed in section 1.3 herein over the full military temperature range. The vendor's procedure
shall be kept under document control and shall be made available upon request of the acquiring or preparing activity, along with
test data.
3.13 Data retention. A data retention stress test shall be completed as part of the vendor's reliability monitors. This test shall
be done for initial characterization and after any design or process change which may affect data retention. The methods and
procedures may be vendor specific, but shall guarantee the number of years listed in section 1.3 herein over the full military
temperature range. The vendor's procedure shall be kept under document control and shall be made available upon request of
the acquiring or preparing activity, along with test data.
4. VERIFICATION
4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance MIL-PRF-38535, appendix A.
4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices
prior to quality conformance inspection. The following additional criteria shall apply:
a.
Burn-in test, method 1015 of MIL-STD-883.
(1)
Test condition D or F. The test circuit shall be maintained by the manufacturer under document revision level
control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall
specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified
in method 1015 of MIL-STD-883.
b.
(2)
TA = +125°C, minimum.
(3)
Devices shall be burned-in containing a checkerboard pattern or equivalent.
Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter
tests prior to burn-in are optional at the discretion of the manufacturer.
4.3 Quality conformance inspection. Quality conformance inspection shall be in accordance with method 5005 of MIL-STD883 including groups A, B, C, and D inspections. The following additional criteria shall apply.
4.3.1 Group A inspection.
a.
Tests shall be as specified in table II herein.
b.
Subgroups 5 and 6 in table I, method 5005 of MIL-STD-883 shall be omitted.
c.
Subgroup 4 (CI and CO measurements) shall be measured for initial qualification and after process or design changes
which may affect capacitance. Sample size is 15 devices, all input and output terminals tested, and no failures.
d.
As a minimum, subgroups 7 and 8 shall include verification of the truth table.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-88634
A
REVISION LEVEL
G
SHEET
17
4.3.2 Groups C and D inspections. Groups C and D inspections shall be in accordance with method 5005 of MIL-STD-883
and as follows:
a.
End-point electrical parameters shall be as specified in table II herein.
b.
All devices requiring end-point electrical testing shall be programmed with a checkerboard or equivalent alternating bit
pattern.
c.
Steady-state life test conditions, method 1005 of MIL-STD-883.
(1)
Test condition D or F. The test circuit shall be maintained by the manufacturer under document revision level
control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify
the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method
1005 of MIL-STD-883.
(2)
TA = +125°C, minimum.
(3)
Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883.
4.4 Methods of inspection. Methods of inspection shall be as specified in the appropriate tables of method 5005 of MIL-STD883 and as follows.
4.4.1 Voltage and current. All voltages given are referenced to the microcircuit VSS terminal. Currents given are conventional
current and positive when flowing into the referenced terminal.
4.4.2 Programming procedure. The programming procedures shall be as specified by the device manufacturer and shall be
made available on request.
4.4.3 Erasing procedure. The erasing procedures shall be as specified by the device manufacturer and shall be made
available on request.
4.4.4 Software data protection. The software data protect procedures shall be as specified by the device manufacturer and
shall be made available on request.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-88634
A
REVISION LEVEL
G
SHEET
18
TABLE II. Electrical test requirements. 1/ 2/ 3/ 4/ 5/
MIL-STD-883 test requirements
Interim electrical parameters
(method 5004)
Final electrical test parameters
(method 5004)
Group A test requirements
(method 5005)
Groups C and D end-point
electrical parameters
(method 5005)
Subgroups (in accordance with
MIL-STD-883, method 5005,table I)
1, 7, 9, or
2, 8A, 10
1*, 2, 3, 7*, 8A, 8B, 9, 10, 11
1, 2, 3, 4**, 7, 8A, 8B, 9, 10, 11
1, 2, 3, 7, 8A, 8B, 9, 10, 11
1/ (*) Indicates PDA applies to subgroups 1 and 7.
2/ Any or all subgroups may be combined when using multifunction testers.
3/ Subgroups 7, 8A, and 8B shall consist of writing and reading the data
pattern specified in accordance with the limits of table I,
subgroups 9, 10, and 11.
4/ For all electrical tests, the device shall be programmed to the data
pattern specified.
5/ (**) Indicates that subgroup 4 will only be performed during initial testing
and after design or process changes (see 4.3.1c).
5. PACKAGING
5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-PRF-38535, appendix A.
6. NOTES
6.1 Intended use. Microcircuits conforming to this drawing are intended for use for government microcircuit applications
(original equipment), design applications, and logistics purposes.
6.1.1 Replacability. Microcircuits covered by this drawing will replace the same generic device covered by a contractorprepared specification or drawing.
6.2 Configuration control of SMD's. All proposed changes to existing SMD's will be coordinated with the users of record for
the individual documents. This coordination will be accomplished in accordance with MIL-STD-973 using DD Form 1692,
Engineering Change Proposal.
6.3 Record of users. Military and industrial users shall inform DLA Land and Maritime when a system application requires
configuration control and the applicable SMD. DLA Land and Maritime will maintain a record of users and this list will be used
for coordination and distribution of changes to the drawings. Users of drawings covering microelectronics devices (FSC 5962)
should contact DLA Land and Maritime-VA, telephone (614) 692-0540.
6.4 Comments. Comments on this drawing should be directed to DLA Land and Maritime-VA, Columbus, Ohio 43218-3990,
or telephone (614) 692-8108.
6.5 Approved sources of supply . Approved sources of supply are listed in QML-38535 and MIL-HDBK-103. The vendors
listed in QML-38535 and MIL-HDBK-103 have agreed to this drawing and a certificate of compliance (see 3.6 herein) has been
submitted to and accepted by DLA Land and Maritime-VA.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-88634
A
REVISION LEVEL
G
SHEET
19
STANDARD MICROCIRCUIT DRAWING SOURCE APPROVAL BULLETIN
DATE: 15-10-20
Approved sources of supply for SMD 5962-88634 are listed below for immediate acquisition information only and shall be added
to MIL-HDBK-103 and QML-38535 during the next revision. MIL-HDBK-103 and QML-38535 will be revised to include the
addition or deletion of sources. The vendors listed below have agreed to this drawing and a certificate of compliance has been
submitted to and accepted by DLA Land and Maritime-VA. This information bulletin is superseded by the next dated revision of
MIL-HDBK-103 and QML-38535. DLA Land and Maritime maintains an online database of all current sources of supply at
http://www.landandmaritime.dla.mil/Programs/Smcr/.
Standard
microcircuit drawing
PIN 1/
Vendor
CAGE
number
5962-8863401UA
0HSW3
Vendor
similar
PIN 2/
AT28HC256-12UM/883
3/
TM28HC256-120
5962-8863401UC
3/
X28HC256KMB-12
5962-8863401XA
0HSW3
5962-8863401YA
5962-8863401ZA
5962-8863401ZC
5962-8863402UA
3/
28HC256
3/
X28HC256DMB-12
3/
DM28HC256-120
0HSW3
X28HC256EMB-12
3/
LM28HC256-120
0HSW3
FM28HC256-120
3/
28HC256
3/
X28HC256FMB-12
0HSW3
0HSW3
0HSW3
3/
5962-8863402ZA
0HSW3
3/
5962-8863403UA
AT28HC256-12FM/883
3/
3/
5962-8863402YA
AT28HC256-12LM/883
3/
3/
5962-8863402XA
AT28HC256-12DM/883
0HSW3
AT28HC256FL-12UM/883
TM28HC256-120
AT28HC256FL-12DM/883
DM28HC256-120
AT28HC256FL-12LM/883
LM28HC256-120
AT28HC256FL-12FM/883
FM28HC256-120
AT28HC256-90UM/883
3/
TM28HC256-90
5962-8863403UC
3/
X28HC256KMB-90
5962-8863403XA
0HSW3
5962-8863403YA
AT28HC256-90DM/883
3/
28HC256
3/
X28HC256DMB-90
3/
DM28HC256-90
0HSW3
AT28HC256-90LM/883
3/
X28HC256EMB-90
3/
LM28HC256-90
1of 2
STANDARD MICROCIRCUIT DRAWING SOURCE APPROVAL BULLETIN - continued.
DATE: 15-10-20
Standard
microcircuit drawing
PIN 1/
Vendor
CAGE
number
5962-8863403ZA
0HSW3
5962-8863403ZC
5962-8863404UA
FM28HC256-90
3/
28HC256
3/
X28HC256FMB-90
0HSW3
0HSW3
3/
5962-8863404YA
0HSW3
3/
5962-8863404ZA
5962-8863405UA
5962-8863405XA
5962-8863405YA
5962-8863405ZA
AT28HC256-90FM/883
3/
3/
5962-8863404XA
Vendor
similar
PIN 2/
0HSW3
AT28HC256F-90UM/883
TM28HC256-90
AT28HC256F-90DM/883
DM28HC256-90
AT28HC256F-90LM/883
LM28HC256-90
AT28HC256F-90FM/883
3/
FM28HC256-90
3/
AT28HC256-70UM/883
3/
TM28HC256-70
3/
AT28HC256-70DM/883
3/
DM28HC256-70
3/
AT28HC256-70LM/883
3/
LM28HC256-70
3/
AT28HC256-70FM/883
3/
FM28HC256-70
1/ The lead finish shown for each PIN representing a hermetic package
is the most readily available from the manufacturer listed for that part.
If the desired lead finish is not listed contact the vendor to determine
its availability.
2/ Caution. Do not use this number for item acquisition. Items acquired to
this number may not satisfy the performance requirements of this drawing.
3/ No longer available from an approved source.
Vendor CAGE
number
Vendor name
and address
0HSW3
ATMEL Corporation
1150 East Cheyenne Mountain Blvd.
Colorado Springs, CO 80906
The information contained herein is disseminated for convenience only and
the Government assumes no liability whatsoever for any inaccuracies in this
information bulletin.
2 of 2