PESDxUSB3S series ESD protection for differential data lines Rev. 3 — 26 April 2016 Product data sheet 1. Product profile 1.1 General description The devices are ElectroStatic Discharge (ESD) protection for one, two and three differential channels. It is footprint compatible to PCMFxUSB3S common mode filters with ESD protection. The diodes provide protection to downstream components from ESD voltages up to 15 kV on each signal line. Table 1. Product overview Type number Number of channels Package Name PESD1USB3S 1 WLCSP5 PESD2USB3S 2 WLCSP10 PESD3USB3S 3 WLCSP15 1.2 Features and benefits Allows switching between ESD protection for one, two and three PCMFxUSB3S common mode filters differential channels up to 15 kV with ESD protection and PESDxUSB3S contact discharge according to ESD protection in the same footprint IEC 61000-4-2 TREOS protection process for very high Industry-standard WLCSP5, 10 and 15 system-level ESD robustness: superior packages for smallest footprint protection of sensitive Systems on Chips (SoCs) 1.3 Applications Smartphone, cellular and cordless phone USB3.1, USB2.0, HDMI2.0, HDMI1.4 General-purpose downstream ESD protection for differential data lines Tablet PC and Mobile Internet Device (MID) MIPI D-PHY as used in Camera Serial Interface (CSI) and Display Serial Interface (DSI) PESDxUSB3S series NXP Semiconductors ESD protection for differential data lines 2. Pinning information Table 2. Pin Pinning Symbol Description Simplified outline Graphic symbol PESD1USB3S (WLCSP5_2-1-2) A1 CH1_IN+ channel 1+, external A2 CH1_IN channel 1, external B1 GND_CH1 ground channel 1 C1 CH1_OUT+ channel 1+, internal C2 CH1_OUT channel 1, internal 2 A1 C1 A2 C2 B1 1 A B C Transparent top view WLCSP5_2-1-2 B1 aaa-021381 PESD2USB3S (WLCSP10_4-2-4) A1 CH1_IN+ channel 1+, external A2 CH1_IN channel 1, external A3 CH2_IN+ channel 2+, external A4 CH2_IN channel 2, external B1 GND_CH1 ground channel 1 B2 GND_CH2 ground channel 2 C1 CH1_OUT+ channel 1+, internal C2 CH1_OUT channel 1, internal C3 CH2_OUT+ channel 2+, internal C4 CH2_OUT channel 2, internal 4 A1, 3 C1, 3 A2, 4 C2, 4 B2 3 2 B1 1 B1, B2 - no internal connection A B C aaa-021384 Transparent top view WLCSP10_4-2-4 PESD3USB3S (WLCSP15_6-3-6) A1 CH1_IN+ channel 1+, external A2 CH1_IN channel 1, external A3 CH2_IN+ channel 2+, external A4 CH2_IN channel 2, external A5 CH3_IN+ channel 3+, external A6 CH3_IN channel 3, external B1 GND_CH1 ground channel 1 B2 GND_CH2 ground channel 2 B3 GND_CH3 ground channel 3 C1 CH1_OUT+ channel 1+, internal C2 CH1_OUT channel 1, internal C3 CH2_OUT+ channel 2+, internal C4 CH2_OUT channel 2, internal C5 CH3_OUT+ channel 3+, internal C6 CH3_OUT channel 3, internal PESDXUSB3S_SER Product data sheet 6 A1, 3, 5 C1, 3, 5 A2, 4, 6 C2, 4, 6 B3 5 4 B2 3 B1, B2, B3 - no internal connection aaa-021385 2 B1 1 A B C Transparent top view WLCSP15_6-3-6 All information provided in this document is subject to legal disclaimers. Rev. 3 — 26 April 2016 © NXP Semiconductors N.V. 2016. All rights reserved. 2 of 19 PESDxUSB3S series NXP Semiconductors ESD protection for differential data lines 3. Ordering information Table 3. Ordering information Type number Package Name Description PESD1USB3S WLCSP5 wafer level chip-size package; 5 bumps (2-1-2) PESD2USB3S WLCSP10 wafer level chip-size package; 10 bumps (4-2-4) PESD3USB3S WLCSP15 wafer level chip-size package; 15 bumps (6-3-6) 4. Marking Table 4. Marking codes Type number Marking code PESD1USB3S PD1S PESD2USB3S PD2S PESD3USB3S PD3S 5. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions VI input voltage VESD electrostatic discharge voltage Min Max Unit -0.5 5 V contact discharge -15 15 kV air discharge -15 15 kV -2 2 kV IEC 61000-4-2, level 4; all input pins to ground IEC 61000-4-2, level 4; all output pins to ground contact discharge air discharge PESDXUSB3S_SER Product data sheet -2 2 kV -8 8 A storage temperature -40 +125 °C ambient temperature -40 +85 °C IPPM rated peak-pulse current Tstg Tamb tp = 8/20 s All information provided in this document is subject to legal disclaimers. Rev. 3 — 26 April 2016 © NXP Semiconductors N.V. 2016. All rights reserved. 3 of 19 PESDxUSB3S series NXP Semiconductors ESD protection for differential data lines 6. Characteristics 6.1 Channel characteristics Table 6. Channel characteristics Tamb = 25 C unless otherwise specified. Symbol Parameter Conditions Min [1] Typ Max Unit Cd diode capacitance f = 1 MHz; VI = 2.5 V - 0.45 - pF IRM reverse leakage current per line; VI = 5 V - 1 100 nA VBR breakdown voltage IR = 1 mA 6 9 - V VF forward voltage IF = 10 mA - 0.8 - V - 0.16 - - 0.16 - positive transient - 0.25 - negative transient - 0.25 - Min Typ Max Unit - 17 - GHz Rdyn dynamic resistance TLP [2] positive transient negative transient surge [1] This parameter is guaranteed by design. [2] 100 ns Transmission Line Pulse (TLP); 50 ; pulser at 70 to 90 ns. [3] According to IEC 61000-4-5 (8/20 s). [3] 6.2 Frequency characteristics Table 7. Frequency characteristics Symbol Parameter Conditions Differential mode: S21dd f3dB [1] PESDXUSB3S_SER Product data sheet cut-off frequency [1] Normalized to attenuation at 1 MHz. All information provided in this document is subject to legal disclaimers. Rev. 3 — 26 April 2016 © NXP Semiconductors N.V. 2016. All rights reserved. 4 of 19 PESDxUSB3S series NXP Semiconductors ESD protection for differential data lines aaa-021319 1 aaa-021320 0 Sdd21 (dB) Sdd21 (dB) -1 -20 S21dd A3-A4 > C1-C2 -3 -40 -5 -60 S21dd pin 1 - 2 S21dd A5-A6 > C1-C2 S21dd pin 5 - 6 -7 107 108 109 1010 -80 108 1011 109 Fig 1. 1010 1011 f (Hz) f (Hz) Differential mode insertion loss; typical values Fig 2. Differential cross-talk; typical values aaa-021321 115 Zdif (Ω) 105 Z reference 95 Z DUT 85 40.70 40.90 40.11 4.13 t (ns) tr = 200 ps Fig 3. Differential Time Domain Reflectometer (TDR) plot; typical values PESDXUSB3S_SER Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 26 April 2016 © NXP Semiconductors N.V. 2016. All rights reserved. 5 of 19 PESDxUSB3S series NXP Semiconductors ESD protection for differential data lines aaa-012322 Fig 4. USB3.1 eye diagram 10 Gbps, test board with PESD3USB3S; typical values aaa-021323 Fig 5. PESDXUSB3S_SER Product data sheet USB3.1 eye diagram 10 Gbps, test board without device; typical values All information provided in this document is subject to legal disclaimers. Rev. 3 — 26 April 2016 © NXP Semiconductors N.V. 2016. All rights reserved. 6 of 19 PESDxUSB3S series NXP Semiconductors ESD protection for differential data lines aaa-021324 Fig 6. HDMI 2.0 eye diagram TP1, test board with PESD3USB3S; typical values aaa-021325 Fig 7. PESDXUSB3S_SER Product data sheet HDMI 2.0 eye diagram TP1, test board without device; typical values All information provided in this document is subject to legal disclaimers. Rev. 3 — 26 April 2016 © NXP Semiconductors N.V. 2016. All rights reserved. 7 of 19 PESDxUSB3S series NXP Semiconductors ESD protection for differential data lines aaa-021326 25 aaa-021327 0 I (A) I (A) 20 -5 15 -10 10 -15 5 -20 0 0 5 10 15 20 -25 -25 25 -20 -15 -10 -5 VCL (V) Transmission Line Pulse (TLP) = 100 ns Fig 8. Transmission Line Pulse (TLP) = 100 ns Dynamic resistance with positive clamping; typical values Fig 9. Dynamic resistance with negative clamping; typical values aaa-021328 25 0 VCL (V) aaa-021329 0 I (A) I (A) 20 -5 15 -10 10 -15 5 -20 0 0 5 10 15 20 25 -25 -25 -20 -15 -10 -5 VCL (V) 0 VCL (V) Transmission Line Pulse (TLP) = 5 ns Transmission Line Pulse (TLP) = 5 ns Fig 10. Dynamic resistance with positive clamping; typical values Fig 11. Dynamic resistance with negative clamping; typical values The device uses an advanced clamping structure showing a negative dynamic resistance. This snap-back behavior strongly reduces the clamping voltage to the system behind the ESD protection during an ESD event. Do not connect unlimited DC current sources to the data lines to avoid keeping the ESD protection device in snap-back state after exceeding breakdown voltage (due to an ESD pulse for instance). PESDXUSB3S_SER Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 26 April 2016 © NXP Semiconductors N.V. 2016. All rights reserved. 8 of 19 PESDxUSB3S series NXP Semiconductors ESD protection for differential data lines aaa-021330 10 aaa-021331 0 I (A) I (A) 8 -2 6 -4 4 -6 2 -8 0 0 2 4 6 8 10 -10 -10 -8 VCL (V) -6 -4 -2 0 VCL (V) IEC61000-4-5; tp = 8/20 s; positive pulse IEC61000-4-5; tp = 8/20 s; negative pulse Fig 12. Dynamic resistance with positive clamping; typical values Fig 13. Dynamic resistance with negative clamping; typical values PESDXUSB3S_SER Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 26 April 2016 © NXP Semiconductors N.V. 2016. All rights reserved. 9 of 19 PESDxUSB3S series NXP Semiconductors ESD protection for differential data lines 7. Application information The device is designed to provide high-level ESD protection for differential high-speed data line pairs such as: • • • • • • USB 3.1 HDMI 2.0 Transition-Minimized Differential Signaling (TMDS) DisplayPort external Serial Advanced Technology Attachment (eSATA) Low Voltage Differential Signaling (LVDS) When designing the PCB, give careful consideration to impedance matching and signal coupling. Do not connect the protected signal lines to unlimited current sources like, for example, a battery. Fig 14. Application diagram: protecting the differential data lines of a USB Type-C connector evaluation dongle with PESD1USB3S Since the SuperSpeed TX/RX lines are separated by GND or VBUS from the Hi-Speed lines, PESD1USB3S makes it easy to achieve same signal lengths, straight routing, and optimal positioning for ESD protection directly at the connector. PESDXUSB3S_SER Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 26 April 2016 © NXP Semiconductors N.V. 2016. All rights reserved. 10 of 19 PESDxUSB3S series NXP Semiconductors ESD protection for differential data lines 8. Package outline WLCSP5: wafer level chip-size package; 5 bumps (2-1-2) PESD1USB3S D bump A1 index area A1 E A detail X e 1/2 e b C e1 B1 B e2 A bump A1 index area 1 2 X 0 1 mm scale Dimensions (mm are the original dimensions) Unit mm A A1 b D E e e1 e2 max 0.60 0.38 0.31 0.82 1.22 nom 0.57 0.37 0.26 0.77 1.17 0.40 0.40 0.80 min 0.54 0.36 0.21 0.72 1.12 pesd1usb3s_po Outline version References IEC JEDEC JEITA European projection Issue date 15-12-11 PESD1USB3S Fig 15. Package outline WLCSP5 PESDXUSB3S_SER Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 26 April 2016 © NXP Semiconductors N.V. 2016. All rights reserved. 11 of 19 PESDxUSB3S series NXP Semiconductors ESD protection for differential data lines WLCSP10: wafer level chip-size package; 10 bumps (4-2-4) PESD2USB3S D bump A1 index area A1 E A detail X e b C e1 B1 B B2 e2 A bump A1 index area 1 2 3 4 e3 X 1/2 e 0 1 mm scale Dimensions (mm are the original dimensions) Unit mm A A1 b D E e e1 e2 max 0.60 0.38 0.31 1.62 1.22 nom 0.57 0.37 0.26 1.57 1.17 0.40 0.40 0.80 min 0.54 0.36 0.21 1.52 1.12 e3 0.80 pesd2usb3s_po Outline version References IEC JEDEC JEITA European projection Issue date 15-12-11 PESD2USB3S Fig 16. Package outline WLCSP10 PESDXUSB3S_SER Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 26 April 2016 © NXP Semiconductors N.V. 2016. All rights reserved. 12 of 19 PESDxUSB3S series NXP Semiconductors ESD protection for differential data lines WLCSP15: wafer level chip-size package; 15 bumps (6-3-6) PESD3USB3S D bump A1 index area A1 E A detail X e 1/2 e b C e1 B2 B1 B B3 e2 A 1 bump A1 index area 2 3 4 5 6 e3 X 0 1 mm scale Dimensions (mm are the original dimensions) Unit mm A A1 b D E e e1 e2 e3 max 0.60 0.38 0.31 2.42 1.22 nom 0.57 0.37 0.26 2.37 1.17 0.40 0.40 0.80 0.80 min 0.54 0.36 0.21 2.32 1.12 pesd3usb3s_po Outline version References IEC JEDEC JEITA European projection Issue date 15-12-11 PESD3USB3S Fig 17. Package outline WLCSP15 PESDXUSB3S_SER Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 26 April 2016 © NXP Semiconductors N.V. 2016. All rights reserved. 13 of 19 PESDxUSB3S series NXP Semiconductors ESD protection for differential data lines 9. Soldering WLCSP5: Solder footprint and stencil aperture PESD1USB3S Hx P see detail X P solder land (SL) Hy solder paste deposit (SP) solder land plus solder paste SL = SP solder resist opening (SR) SR occupied area detail X Dimensions in mm recommend stencil thickness: 0.1 mm P SL SP SR Hx Hy 15-12-11 0.40 0.25 0.25 0.325 1.00 1.40 pesd1usb3s_fr Fig 18. Soldering footprint WLCSP5 (PESD1USB3S) PESDXUSB3S_SER Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 26 April 2016 © NXP Semiconductors N.V. 2016. All rights reserved. 14 of 19 PESDxUSB3S series NXP Semiconductors ESD protection for differential data lines WLCSP10: Solder footprint and stencil aperture PESD2USB3S Hx P see detail X P solder land (SL) Hy solder paste deposit (SP) solder land plus solder paste SL = SP solder resist opening (SR) SR occupied area P1 Dimensions in mm detail X recommend stencil thickness: 0.1 mm P P1 SL SP SR Hx Hy 15-12-14 15-12-16 0.40 0.80 0.25 0.25 0.325 1.80 1.40 pesd2usb3s_fr Fig 19. Soldering footprint WLCSP10 (PESD2USB3S) WLCSP15: Solder footprint and stencil aperture PESD3USB3S Hx P see detail X P solder land (SL) Hy solder paste deposit (SP) solder land plus solder paste SL = SP solder resist opening (SR) SR occupied area P1 detail X Dimensions in mm recommend stencil thickness: 0.1 mm P P1 SL SP SR Hx Hy 15-12-14 15-12-16 0.40 0.80 0.25 0.25 0.325 2.60 1.40 pesd3usb3s_fr Fig 20. Soldering footprint WLCSP15 (PESD3USB3S) PESDXUSB3S_SER Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 26 April 2016 © NXP Semiconductors N.V. 2016. All rights reserved. 15 of 19 PESDxUSB3S series NXP Semiconductors ESD protection for differential data lines 10. Revision history Table 8. Revision history Document ID Release date Data sheet status Change notice Supersedes PESDXUSB3S_SER v.3 20160426 Product data sheet - PESDXUSB3S_SER v.2 Modification: • Product status changed PESDXUSB3S_SER v.2 20160127 Preliminary data sheet - PESDXUSB3S_SER v.1 PESDXUSB3S_SER v.1 20151216 Objective data sheet - - PESDXUSB3S_SER Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 26 April 2016 © NXP Semiconductors N.V. 2016. All rights reserved. 16 of 19 PESDxUSB3S series NXP Semiconductors ESD protection for differential data lines 11. Legal information 11.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 11.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet. 11.3 Disclaimers Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. NXP Semiconductors takes no responsibility for the content in this document if provided by an information source outside of NXP Semiconductors. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. PESDXUSB3S_SER Product data sheet Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors and its suppliers accept no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. All information provided in this document is subject to legal disclaimers. Rev. 3 — 26 April 2016 © NXP Semiconductors N.V. 2016. All rights reserved. 17 of 19 PESDxUSB3S series NXP Semiconductors ESD protection for differential data lines Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Non-automotive qualified products — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors’ warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ standard warranty and NXP Semiconductors’ product specifications. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. 11.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 12. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] PESDXUSB3S_SER Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 26 April 2016 © NXP Semiconductors N.V. 2016. All rights reserved. 18 of 19 NXP Semiconductors PESDxUSB3S series ESD protection for differential data lines 13. Contents 1 1.1 1.2 1.3 2 3 4 5 6 6.1 6.2 7 8 9 10 10.1 10.2 10.3 10.4 11 12 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1 General description . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 Ordering information . . . . . . . . . . . . . . . . . . . . . 3 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Channel characteristics . . . . . . . . . . . . . . . . . . 4 Frequency characteristics. . . . . . . . . . . . . . . . . 4 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 10 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 15 Legal information. . . . . . . . . . . . . . . . . . . . . . . 16 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 16 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Contact information. . . . . . . . . . . . . . . . . . . . . 17 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP Semiconductors N.V. 2016. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 26 April 2016 Document identifier: PESDXUSB3S_SER