Data Sheet

IP3053CX5; IP3053CX10;
IP3053CX15; IP3053CX20
Integrated 2, 4, 6 and 8-channel passive EMI-filter network
with high-level ESD protection to IEC 61000-4-2 level 4
Rev. 01 — 3 May 2010
Product data sheet
1. Product profile
1.1 General description
IP3053CX5, IP3053CX10, IP3053CX15 and IP3053CX20 is a 2, 4, 6 and 8-channel LC
low-pass filter array family which is designed to provide filtering of undesired RF signals
on the I/O ports of portable communication or computing devices. In addition, IP3053CX5,
IP3053CX10, IP3053CX15 and IP3053CX20 incorporates diodes to provide protection to
downstream components from ElectroStatic Discharge (ESD) voltages as high as ±8 kV
according IEC 61000-4-2 level 4.
The devices are fabricated using monolithic silicon technology and integrate and
incorporate up to 8 inductors and up to 16 diodes in a 0.5 mm pitch Wafer-Level
Chip-Scale Package (WLCSP).
1.2 Features and benefits
„
„
„
„
„
Pb-free, RoHS compliant and free of halogen and antimony (Dark Green compliant)
Integrated 2, 4, 6 and 8-channel π-type LC-filter network
18 Ω channel series resistance; ≤ 45 pF (at 2.5 V DC) channel capacitance
Integrated ESD protection withstanding ±8 kV contact discharge
WLCSP with 0.5 mm pitch
1.3 Applications
General purpose ElectroMagnetic Interference (EMI) and Radio Frequency Interference
(RFI) filtering and downstream ESD protection for:
„ Cellular and Personal Communication System (PCS) mobile handsets
„ Cordless telephones
„ Wireless data (WAN/LAN) systems
IP3053CX5/CX10/CX15/CX20
NXP Semiconductors
2, 4, 6 and 8-channel passive EMI-filter network with ESD protection
2. Pinning information
2.1 Pinning
bump A1
index area
bump A1
index area
1
2
1
A
B
2
3
A
B1
B1
B
C
B2
C
001aak061
001aak062
transparent top view,
solder balls facing down
Fig 1.
4
transparent top view,
solder balls facing down
Pin configuration IP3053CX5
Fig 2.
bump A1
index area
Pin configuration IP3053CX10
bump A1
index area
1
2
3
4
5
1
6
A
2
3
4
5
6
7
A
B1
B
B2
B3
B
C
B1
B2
B3
B4
C
001aak063
001aak064
transparent top view,
solder balls facing down
Fig 3.
8
transparent top view,
solder balls facing down
Pin configuration IP3053CX15
Fig 4.
Pin configuration IP3053CX20
2.2 Pin description
Table 1.
Pinning
Pin
Description
IP3053CX5
IP3053CX10
IP3053CX15
IP3053CX20
A1 and C1
A1 and C1
A1 and C1
A1 and C1
filter channel 1
A2 and C2
A2 and C2
A2 and C2
A2 and C2
filter channel 2
-
A3 and C3
A3 and C3
A3 and C3
filter channel 3
-
A4 and C4
A4 and C4
A4 and C4
filter channel 4
-
-
A5 and C5
A5 and C5
filter channel 5
-
-
A6 and C6
A6 and C6
filter channel 6
-
-
-
A7 and C7
filter channel 7
-
-
-
A8 and C8
filter channel 8
B1
B1 and B2
B1, B2 and B3
B1, B2, B3 and B4
ground
IP3053CX5_CX10_CX15_CX20_1
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 01 — 3 May 2010
© NXP B.V. 2010. All rights reserved.
2 of 15
IP3053CX5/CX10/CX15/CX20
NXP Semiconductors
2, 4, 6 and 8-channel passive EMI-filter network with ESD protection
3. Ordering information
Table 2.
Ordering information
Type number
Package
Name
Description
Version
IP3053CX5
WLCSP5
wafer level chip-size package; 5 bumps (2-1-2)
IP3053CX5
IP3053CX10
WLCSP10
wafer level chip-size package; 10 bumps (4-2-4)
IP3053CX10
IP3053CX15
WLCSP15
wafer level chip-size package; 15 bumps (6-3-6)
IP3053CX15
IP3053CX20
WLCSP20
wafer level chip-size package; 20 bumps (8-4-8)
IP3053CX20
4. Functional diagram
A1 to A8
C1 to C8
B1 to B4
Fig 5.
008aaa225
Schematic diagram IP3053CX5; IP3053CX10; IP3053CX15; IP3053CX20
5. Limiting values
Table 3.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
VCC
supply voltage
VESD
electrostatic discharge voltage
Min
Max
Unit
−0.5
+5.6
V
contact discharge
−8
+8
kV
air discharge
IEC 61000-4-2 level 4; all pins
to ground
−15
+15
kV
Ich
channel current (DC)
per channel; Tamb = 85 °C
-
5
mA
Ich(AC)
channel current (AC)
per channel; Tamb = 85 °C
-
50
mA
Tstg
storage temperature
−65
+150
°C
Tamb
ambient temperature
−40
+85
°C
IP3053CX5_CX10_CX15_CX20_1
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 01 — 3 May 2010
© NXP B.V. 2010. All rights reserved.
3 of 15
IP3053CX5/CX10/CX15/CX20
NXP Semiconductors
2, 4, 6 and 8-channel passive EMI-filter network with ESD protection
6. Characteristics
Table 4.
Channel characteristics
Tamb = 25 °C; unless otherwise specified.
Symbol Parameter
Conditions
Rs(ch)
channel series resistance
Ls(ch)
channel series inductance
Cch
channel capacitance
Min
Typ
Max
Unit
-
100
-
Ω
-
35
-
nH
Vbias(DC) = 0 V;
f = 100 kHz
[1]
-
47
-
pF
Vbias(DC) = 2.5 V;
f = 100 kHz
[1]
-
30
-
pF
VBR
breakdown voltage
positive clamp;
Itest = 1 mA
5.8
-
10
V
VF
forward voltage
negative clamp;
IF = −1 mA
−1.5
-
−0.4
V
ILR
reverse leakage current
per channel; VI = 3.5 V
-
-
0.1
μA
[1]
Guaranteed by design.
Table 5.
Frequency characteristics
Tamb = 25 °C; unless otherwise specified.
Symbol Parameter
Conditions
Min
Typ
Max
Unit
αil
insertion loss
Rgen = 50 Ω; RL = 50 Ω;
800 MHz < f < 3 GHz
30
-
-
dB
f−3dB
cut-off frequency
Rgen = 50 Ω; RL = 50 Ω;
Vbias(DC) = 0 V;
αil at 1 MHz − 3 dB
-
150
-
MHz
7. Application information
7.1 Insertion loss
IP3053CX5, IP3053CX10, IP3053CX15 and IP3053CX20 is mainly designed as an EMI
and RFI filter for multichannel interfaces.
The setup for measuring insertion loss in a 50 Ω system is shown in Figure 6.
IN
DUT
OUT
50 Ω
50 Ω
TEST BOARD
Vgen
001aai755
Fig 6.
IP3053CX5_CX10_CX15_CX20_1
Product data sheet
Frequency response measurement configuration
All information provided in this document is subject to legal disclaimers.
Rev. 01 — 3 May 2010
© NXP B.V. 2010. All rights reserved.
4 of 15
IP3053CX5/CX10/CX15/CX20
NXP Semiconductors
2, 4, 6 and 8-channel passive EMI-filter network with ESD protection
As an example, the measured insertion loss magnitude for all channels of the
IP3053CX10 are shown in Figure 7.
008aaa227
0
s21
(dB)
s21
(dB)
−20
−20
−40
−40
−60
10−1
1
10
102
103
104
f (MHz)
a. Channel 1 (pin A1 to C1)
−60
10−1
1
10
102
103
104
f (MHz)
b. Channel 2 (pin A2 to C2)
008aaa231
0
008aaa229
0
s21
(dB)
s21
(dB)
−20
−20
−40
−40
−60
10−1
1
10
102
103
104
f (MHz)
c. Channel 3 (pin A3 to C3)
Fig 7.
008aaa230
0
−60
10−1
1
10
102
103
104
f (MHz)
d. Channel 4 (pin A4 to C4)
Measured insertion loss magnitude
IP3053CX5_CX10_CX15_CX20_1
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 01 — 3 May 2010
© NXP B.V. 2010. All rights reserved.
5 of 15
IP3053CX5/CX10/CX15/CX20
NXP Semiconductors
2, 4, 6 and 8-channel passive EMI-filter network with ESD protection
7.2 Crosstalk
The crosstalk measurement configuration of a typical 50 Ω NetWork Analyzer (NWA)
system for evaluation of the IP3053CX5, IP3053CX10, IP3053CX15 and IP3053CX20 is
shown in Figure 8.
Four typical examples of crosstalk measurement results of IP3053CX20 are depicted.
Unused channels are left open.
IN_1
50 Ω
OUT_2
DUT
IN_2
50 Ω
OUT_1
TEST BOARD
50 Ω
50 Ω
Vgen
001aai756
Fig 8.
Crosstalk measurement configuration
008aaa232
0
αct
(dB)
−10
−20
−30
−40
(4)
−50
(3)
(1)
−60
−70
10−1
1
10
102
(2)
103
104
f (MHz)
(1) Channel 1 to 2 (pin A1 to C2).
(2) Channel 1 to 4 (pin A1 to C4).
(3) Channel 1 to 6 (pin A1 to C6).
(4) Channel 1 to 8 (pin A1 to C8).
Fig 9.
IP3053CX5_CX10_CX15_CX20_1
Product data sheet
Measured crosstalk between different channels using the example of IP3053CX20
All information provided in this document is subject to legal disclaimers.
Rev. 01 — 3 May 2010
© NXP B.V. 2010. All rights reserved.
6 of 15
IP3053CX5/CX10/CX15/CX20
NXP Semiconductors
2, 4, 6 and 8-channel passive EMI-filter network with ESD protection
8. Package outline
WLCSP5: wafer level chip-size package; 5 bumps (2-1-2)
D
bump A1
index area
A2
E
A
A1
detail X
e
1/2 e
b
C
e1
B1
B
e2
A
1
2
X
European
projection
wlcsp5_2-1-2_po
Fig 10. Package outline IP3053CX5 (WLCSP5)
Table 6.
Dimensions for Figure 10
Symbol
Min
Typ
Max
Unit
A
0.60
0.65
0.70
mm
A1
0.22
0.24
0.26
mm
A2
0.38
0.41
0.44
mm
b
0.27
0.32
0.37
mm
D
0.91
0.96
1.01
mm
E
1.23
1.28
1.33
mm
e
-
0.5
-
mm
e1
-
0.435
-
mm
e2
-
0.87
-
mm
IP3053CX5_CX10_CX15_CX20_1
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 01 — 3 May 2010
© NXP B.V. 2010. All rights reserved.
7 of 15
IP3053CX5/CX10/CX15/CX20
NXP Semiconductors
2, 4, 6 and 8-channel passive EMI-filter network with ESD protection
WLCSP10: wafer level chip-size package; 10 bumps (4-2-4)
D
bump A1
index area
A2
E
A
A1
detail X
e
b
C
e1
B1
B
B2
e2
A
1
2
3
4
e3
X
1/2 e
European
projection
wlcsp10_4-2-4_po
Fig 11. Package outline IP3053CX10 (WLCSP10)
Table 7.
Dimensions for Figure 11
Symbol
Min
Typ
Max
Unit
A
0.60
0.65
0.70
mm
A1
0.22
0.24
0.26
mm
A2
0.38
0.41
0.44
mm
b
0.27
0.32
0.37
mm
D
1.91
1.96
2.01
mm
E
1.23
1.28
1.33
mm
e
-
0.5
-
mm
e1
-
0.433
-
mm
e2
-
0.866
-
mm
e3
-
1.0
-
mm
IP3053CX5_CX10_CX15_CX20_1
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 01 — 3 May 2010
© NXP B.V. 2010. All rights reserved.
8 of 15
IP3053CX5/CX10/CX15/CX20
NXP Semiconductors
2, 4, 6 and 8-channel passive EMI-filter network with ESD protection
WLCSP15: wafer level chip-size package; 15 bumps (6-3-6)
D
bump A1
index area
A2
E
A
A1
detail X
e
1/2 e
b
C
e1
B1
B
B2
B3
e2
A
1
2
3
4
5
6
e3
X
European
projection
wlcsp15_6-3-6_po
Fig 12. Package outline IP3053CX15 (WLCSP15)
Table 8.
Dimensions for Figure 12
Symbol
Min
Typ
Max
Unit
A
0.60
0.65
0.70
mm
A1
0.22
0.24
0.26
mm
A2
0.38
0.41
0.44
mm
b
0.27
0.32
0.37
mm
D
2.91
2.96
3.01
mm
E
1.23
1.28
1.33
mm
e
-
0.5
-
mm
e1
-
0.433
-
mm
e2
-
0.866
-
mm
e3
-
1.0
-
mm
IP3053CX5_CX10_CX15_CX20_1
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 01 — 3 May 2010
© NXP B.V. 2010. All rights reserved.
9 of 15
IP3053CX5/CX10/CX15/CX20
NXP Semiconductors
2, 4, 6 and 8-channel passive EMI-filter network with ESD protection
WLCSP20: wafer level chip-size package; 20 bumps (8-4-8)
D
bump A1
index area
A2
E
A
A1
detail X
e
1/2 e
b
C
e1
B1
B
B2
B3
B4
e2
A
1
2
3
4
5
6
7
8
e3
X
European
projection
wlcsp20_8-4-8_po
Fig 13. Package outline IP3053CX20 (WLCSP20)
Table 9.
Dimensions for Figure 13
Symbol
Min
Typ
Max
Unit
A
0.60
0.65
0.70
mm
A1
0.22
0.24
0.26
mm
A2
0.38
0.41
0.44
mm
b
0.27
0.32
0.37
mm
D
3.91
3.96
4.01
mm
E
1.23
1.28
1.33
mm
e
-
0.5
-
mm
e1
-
0.433
-
mm
e2
-
0.866
-
mm
e3
-
1.0
-
mm
IP3053CX5_CX10_CX15_CX20_1
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 01 — 3 May 2010
© NXP B.V. 2010. All rights reserved.
10 of 15
IP3053CX5/CX10/CX15/CX20
NXP Semiconductors
2, 4, 6 and 8-channel passive EMI-filter network with ESD protection
9. Design and assembly recommendations
9.1 PCB design guidelines
For optimum performance it is recommended to use a Non-Solder Mask PCB Design
(NSMD), also known as a copper-defined design, incorporating laser-drilled micro-vias
connecting the ground pads to a buried ground-plane layer. This results in the lowest
possible ground inductance and provides the best high frequency and ESD performance.
For this case, refer to Table 10 for the recommended PCB design parameters.
Table 10.
Recommended PCB design parameters
Parameter
Value or specification
PCB pad diameter
200 μm
Micro-via diameter
100 μm (0.004 inch)
Solder mask aperture diameter
370 μm
Copper thickness
20 μm to 40 μm
Copper finish
AuNi
PCB material
FR4
9.2 PCB assembly guidelines for Pb-free soldering
Table 11.
Assembly recommendations
Parameter
Value or specification
Solder screen aperture diameter
330 μm
Solder screen thickness
100 μm (0.004 inch)
Solder paste: Pb-free
SnAg (3 % to 4 %) Cu (0.5 % to 0.9 %)
Solder to flux ratio
50 : 50
Solder reflow profile
see Figure 14
T
(°C)
Treflow(peak)
250
230
cooling rate
217
pre-heat
t1
t2
t3
t4
t (s)
t5
001aai943
The device is capable of withstanding at least three reflows of this profile.
Fig 14. Pb-free solder reflow profile
IP3053CX5_CX10_CX15_CX20_1
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 01 — 3 May 2010
© NXP B.V. 2010. All rights reserved.
11 of 15
IP3053CX5/CX10/CX15/CX20
NXP Semiconductors
2, 4, 6 and 8-channel passive EMI-filter network with ESD protection
Table 12.
Characteristics
Symbol
Parameter
Treflow(peak)
peak reflow temperature
t1
time 1
t2
time 2
t3
Conditions
Min
Typ
Max
Unit
230
-
260
°C
soak time
60
-
180
s
time during T ≥ 250 °C
-
-
30
s
time 3
time during T ≥ 230 °C
10
-
50
s
t4
time 4
time during T > 217 °C
30
-
150
s
t5
time 5
dT/dt
rate of change of temperature
-
-
540
s
cooling rate
-
-
−6
°C/s
pre-heat
2.5
-
4.0
°C/s
10. Abbreviations
Table 13.
Abbreviations
Acronym
Description
DUT
Device Under Test
EMI
ElectroMagnetic Interference
ESD
ElectroStatic Discharge
HBM
Human Body Model
LAN
Local Area Network
NWA
NetWork Analyzer
PCB
Printed-Circuit Board
PCS
Personal Communication System
PDA
Personal Digital Assistant
RFI
Radio Frequency Interference
RoHS
Restriction of Hazardous Substances
SIM
Subscriber Identity Module
WAN
Wide Area Network
WLCSP
Wafer-Level Chip-Scale Package
11. Revision history
Table 14.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
IP3053CX5_CX10_CX15_CX20_1
20100503
Product data sheet
-
-
IP3053CX5_CX10_CX15_CX20_1
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 01 — 3 May 2010
© NXP B.V. 2010. All rights reserved.
12 of 15
IP3053CX5/CX10/CX15/CX20
NXP Semiconductors
2, 4, 6 and 8-channel passive EMI-filter network with ESD protection
12. Legal information
12.1 Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term ‘short data sheet’ is explained in section “Definitions”.
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
12.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
12.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from national authorities.
IP3053CX5_CX10_CX15_CX20_1
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 01 — 3 May 2010
© NXP B.V. 2010. All rights reserved.
13 of 15
NXP Semiconductors
IP3053CX5/CX10/CX15/CX20
2, 4, 6 and 8-channel passive EMI-filter network with ESD protection
Non-automotive qualified products — Unless this data sheet expressly
states that this specific NXP Semiconductors product is automotive qualified,
the product is not suitable for automotive use. It is neither qualified nor tested
in accordance with automotive testing or application requirements. NXP
Semiconductors accepts no liability for inclusion and/or use of
non-automotive qualified products in automotive equipment or applications.
NXP Semiconductors’ specifications such use shall be solely at customer’s
own risk, and (c) customer fully indemnifies NXP Semiconductors for any
liability, damages or failed product claims resulting from customer design and
use of the product for automotive applications beyond NXP Semiconductors’
standard warranty and NXP Semiconductors’ product specifications.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards, customer
(a) shall use the product without NXP Semiconductors’ warranty of the
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
12.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
13. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
IP3053CX5_CX10_CX15_CX20_1
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 01 — 3 May 2010
© NXP B.V. 2010. All rights reserved.
14 of 15
NXP Semiconductors
IP3053CX5/CX10/CX15/CX20
2, 4, 6 and 8-channel passive EMI-filter network with ESD protection
14. Contents
1
1.1
1.2
1.3
2
2.1
2.2
3
4
5
6
7
7.1
7.2
8
9
9.1
9.2
10
11
12
12.1
12.2
12.3
12.4
13
14
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1
General description . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Pinning information . . . . . . . . . . . . . . . . . . . . . . 2
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 2
Ordering information . . . . . . . . . . . . . . . . . . . . . 3
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 3
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3
Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Application information. . . . . . . . . . . . . . . . . . . 4
Insertion loss . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Crosstalk. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 7
Design and assembly recommendations . . . 11
PCB design guidelines . . . . . . . . . . . . . . . . . . 11
PCB assembly guidelines for Pb-free
soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Revision history . . . . . . . . . . . . . . . . . . . . . . . . 12
Legal information. . . . . . . . . . . . . . . . . . . . . . . 13
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 13
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Contact information. . . . . . . . . . . . . . . . . . . . . 14
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2010.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 3 May 2010
Document identifier: IP3053CX5_CX10_CX15_CX20_1
Similar pages