AN1494 Using MCP6491 Op Amps for Photodetection Applications Author: Yang Zhen Microchip Technology Inc. INTRODUCTION Low input bias operational amplifiers (op amps) are often required for a wide range of photodetection applications, in order to reduce current error and improve the accuracy of the output signal. The typical photodetection applications are listed below: • • • • • • • • • • • • • • • Smoke Detectors Flame Monitors Airport Security X-Ray Scanners Light Meters Brightness Controls Bar Code Scanners Pulse Oximeters Blood Particle Analyzers CT Scanners Automotive Headlight Dimmers Twilight Detectors Photographic Flash Controls Automatic Shutter Controls Optical Remote Controls Optical Communications, etc. This application note discusses the features of Microchip’s MCP6491 low input bias current op amps , the characteristics of photodiodes, and the strengths of the active photodiode current-to-voltage converter (i.e. photodiode amplifier), compared to the passive version. Next, the focus shifts to the design techniques of photodiode amplifier circuitry. Several key design points are discussed in order to improve the circuit’s performance. Then, a practical application example with PSpice simulation results is provided, to help illustrate the design techniques in depth. In addition, the noise analysis of the photodiode amplifier and the design of a companion low pass filter are discussed. Finally, the PCB techniques that help reduce the current leakage are briefly introduced. 2013 Microchip Technology Inc. MCP6491 LOW INPUT BIAS CURRENT OP AMPS Microchip’s MCP6491 family of op amps has low input bias current (150 pA, typical at 125°C) and rail-to-rail input and output operation. The MCP6491 family is unity gain stable and has a gain bandwidth product of 7.5 MHz (typical). These devices operate with a singlesupply voltage as low as 2.4V, while only drawing 530 μA/amplifier (typical) of quiescent current. These features make the MCP6491 family of op amps well suited for photodiode amplifier, pH electrode amplifier, low leakage amplifier, and battery-powered signal conditioning applications, etc. Features: • Low Input Bias Current - 1 pA (typical at 25°C) - 8 pA (typical at 85°C) - 150 pA (typical at 125°C) • Low Quiescent Current: - 530 µA/amplifier (typical) • Low Input Offset Voltage: - 1.5 mV (maximum) • Rail-to-Rail Input and Output • Supply Voltage Range: 2.4V to 5.5V • Gain Bandwidth Product: 7.5 MHz (typical) • Slew Rate: 6 V/µs (typical) • Unity Gain Stable • No Phase Reversal • Small Packages - Singles in SC70-5, SOT-23-5 • Extended Temperature Range - -40°C to +125°C Related Parts • MCP6481: 4 MHz, Low Input Bias Current Op Amps  • MCP6471: 2 MHz, Low Input Bias Current Op Amps  DS01494A-page 1 AN1494 PHOTODETECTION APPLICATIONS There are many detectors which can be used for photodetection applications, such as photodiodes, phototransistors, photoresistors, phototubes, photomultiplier tubes, charge-coupled devices, etc. In this application note, we will focus on the photodiode, as it is the most common photodetector and widely used for the detection of intensity, position, color and presence of light. Photodiode The photodiode is a type of photodetector capable of converting light to a small current which is proportional to the level of illumination. FEATURES The photodiode’s features can be summarized as below: • • • • • • • Wide spectral response Excellent linearity Low noise Excellent ruggedness and stability Small physical size Long lifetime Low cost • Series Resistance (RS) RS is the resistance of the wire bonds and contacts of the photodiode. An ideal photodiode should have no series resistance, but the typical value is on the order of tens of Ω, which is much smaller than RJ. The RS is used to determine the linearity of the photodiode under zero bias conditions. For most of applications, it can be ignored. • Junction capacitance (CJ) CJ is directly proportional to the junction area and inversely proportional to the diode reverse bias voltage. For a small area diode at zero bias, the typical value is on the order of tens of pF. ID is the small leakage current that flows through photodiode under reverse bias conditions. It exists even when there is no illumination and approximately doubles for every 10°C rise in temperature. There is no dark current under zero bias conditions. The equivalent circuit for a photodiode is shown below, in Figure 1. RS << RJ ID Ideal Diode RJ represents the resistance of the zero-biased photodiode junction. An ideal photodiode will have an infinite RJ, but the actual value of RJ is typically on the order of thousands of MΩ, which depends on the photodiode material, and decreases by a factor of 2 for every 10°C rise in temperature. The high value of RJ yields the low noise current of the photodiode. • Dark Current (ID) EQUIVALENT CIRCUIT Light • Junction Shunt Resistance (RJ) OPERATION MODES There are two operation modes for the photodiode, the photovoltaic mode and the photoconductive mode, as shown in Figure 2 and Figure 3. The two modes have their own strengths and drawbacks, and mode selection is dependent on the target application. • Photovoltaic Mode I RJ CJ This mode has zero voltage potential across the photodiode. No dark current flows through the photodiode, the linearity and sensitivity are maximized, and the noise level is relatively low (RJ’s thermal noise only), which make it well suited for precision applications. I = current source (photocurrent generated by the incident light) RJ = junction shunt resistance CJ = junction capacitance RS = series resistance ID = dark current FIGURE 1: Circuit. A Photodiode Equivalent A photodiode can be represented by a current source (I), a junction shunt resistance (RJ), and a junction capacitance (CJ) in parallel with an ideal diode. The series resistance (RS) is connected with all other components in series. Dark current (ID) only exists under reverse bias conditions. DS01494A-page 2 Light FIGURE 2: Photovoltaic Mode. 2013 Microchip Technology Inc. AN1494 • Photoconductive Mode This mode has a reverse bias voltage placed across the photodiode. The reverse bias voltage reduces the diode junction capacitance and shortens the response time. Therefore, the photoconductive mode is suitable for high speed applications (e.g., high speed digital communications). The main drawbacks of this mode include dark current appearance, non-linearity, and high noise level (RJ’s thermal noise and ID’s shot noise). Light VBIAS 0V FIGURE 3: Photoconductive Mode. Photodiode Current-to-Voltage Converter ACTIVE PHOTODIODE CURRENT-TOVOLTAGE CONVERTER The active photodiode current-to-voltage converter is also called a photodiode amplifier. Based on the photodiode operating modes, two circuit implementations of photodiode amplifiers are shown in Figure 5 and Figure 6. For the strengths and drawbacks of each implementation, please refer to the section “Operation Modes”. Both implementations have a large resistor (RF) in the feedback loop. The output resistance of the photodiode amplifier is roughly equal to RF/AOL, where AOL is the open loop gain of the op amp. Therefore, the output resistance becomes very small and the loading effects can be ignored. For the photoconductive mode amplifier, the biasing voltage is equal to VBIAS. For the photovoltaic mode amplifier, the biasing voltage is just zero. Both biasing voltages do not change when the photocurrent varies, so the photodiode's frequency response will not be affected. These strengths of the photodiode amplifier make it widely used in photodetection applications. This circuit is used to convert the photodiode’s small output current to a measurable voltage. Typically, there are two types of circuit implementations, which are passive and active versions. RF PASSIVE PHOTODIODE CURRENT-TOVOLTAGE CONVERTER The Passive Photodiode Current-to-Voltage Converter is implemented by only passive components, as shown in Figure 4. Its output resistance is roughly equal to the value of large resistor (RF) and the output voltage is equal to I*RF. The large RF can cause loading effects for subsequent load resistance and capacitance, such as an inaccurate VOUT and a relatively long response time. Moreover, the variation of photocurrent can cause the photodiode’s biasing voltage to be unstable, which will change the junction capacitance (CJ) and affect the frequency response of photodiode. – I VDD VOUT MCP6491 Light + V OUT = I R F FIGURE 5: diode Amplifier. “Photovoltaic Mode” Photo- RF – I + VDD VOUT MCP6491 RF Light I V OUT = I R F – Light + VBIAS V BIAS 0V V OUT = I R F FIGURE 4: Passive Photodiode Current-to-Voltage Converter. 2013 Microchip Technology Inc. FIGURE 6: “Photoconductive Mode” Photodiode Amplifier. DS01494A-page 3 AN1494 Photodiode Amplifier Key Design Points Rail-to-Rail Output Several key design points for the photodiode amplifier will be analyzed next, in order to improve the circuit’s performance. The rail-to-rail output is helpful to maximize the dynamic output voltage range and improve the signalto-noise ratio (SNR). OP AMP SELECTION Wide Gain Bandwidth Product (GBWP) and High Slew Rate (SR) Selecting a suitable op amp for the photodiode amplifier is critical. There are many DC and AC specs in an op amp data sheet, and the key op amp specs for the photodiode amplifier are shown and discussed below. Low Input Bias Current (IB) The DC output voltage error due to IB is equal to IB*RF. IB increases with temperature rise, so the error will be larger at higher temperature. Usually, the voltage error can be reduced to IOS*RF by adding a compensation resistor RC with a value of RFǁRJ in series with the op amp non-inverting input. However, at high temperatures, the value of RC is difficult to determine because the value of RJ significantly drops with temperature rise. In this condition, the value of RJ could be less than the value of RF. Moreover, RC will develop a noise voltage as the op amp input noise current flows through it. The RC also generates a thermal noise voltage. Both noise voltages will be amplified by the circuit's noise gain. Thus, the output noise level will increase. IB also generates a voltage across RC at the op amp's non-inverting input. This causes the same voltage at the inverting input. Now, the biasing voltage is no longer stable, which causes the photodiode's response to become nonlinear. Therefore, adding the compensation resistor RC to reduce the voltage error IB*RF is not an effective method in general. The op amp should have IB low enough to keep the voltage error within an acceptable range of target applications. Low Input Offset Voltage (VOS) The DC output voltage error due to VOS is equal to VOS*(1 + RF/RJ) at room temperature (25°C), which is about VOS because RF is much less than RJ and the gain is approximately 1 V/V. At high temperatures, the error could be much larger because the value of RJ significantly decreases and the gain can be higher than 1 V/V. Moreover, the VOS drift could make the error even worse. Therefore, low VOS and low VOS drift will be very helpful to reduce the output error at high temperatures. Common Mode Input Voltage Range The GBWP and SR should be large enough to meet the requirement of output step response time, which will be discussed in more detail later. Low Input Noise Current Density and Low Input Noise Voltage Density When noise current flows through the photodiode amplifier, resistor noise voltages will result. The op amp input current noise density (2qI, where q is electron charge, I is current) is determined by IB, so that lower IB gives lower op amp input noise current density. The low input noise voltage density also plays a very important role for the output noise of the photodiode amplifier. It will be amplified by the noise gain so that the output noise level will be significantly affected. This will be explained later in this section. In conclusion, the Microchip’s MCP6491 op amp’s key features include low IB, low VOS, low VOS drift with temperature, rail-to-rail input/output, wide GBWP, high SR, low input noise current density and low input noise voltage density, etc. These features make it well suited for the photodiode amplifier. FEEDBACK RESISTOR The value of the feedback resistor (RF) should be set as large as possible to give a high transimpedance gain to the photocurrent. Usually, this gain should be high enough to use most of the op amp’s output voltage swing when the photocurrent is at its maximum value. For precision applications, a large resistor with tight tolerance and a low temperature coefficient should be selected. It is possible to add more gain with subsequent stages, however, the noise performance will not be as good as using a large RF in one stage, which can easily improve the SNR. For a given bandwidth f, the thermal noise voltage of RF is given by 4kTRFf, where k is Boltzmann’s constant (1.38 x 10-13J/K), T is absolute temperature (K), RF is feedback resistance (Ω). The output signal is given by VSIGNAL = I*RF and the SNR = 20*log(VSIGNAL/VNOISE). When RF is doubled, the resistor thermal noise voltage is increased by 2 and the output signal voltage is increased by 2. Thus, the SNR is increased by 3 dB. The common mode input voltage range needs to at least include ground because the non-inverting input of the op amp is grounded. DS01494A-page 4 2013 Microchip Technology Inc. AN1494 FEEDBACK CAPACITOR Moreover, the noise gain peaking results in very high output noise levels (Figure 9), which may severely degrade the integrity of the output signal. 100 80 Noise Gain (dB) N The photodiode amplifier does not always behave as desired. The gain peaking and step output ringing are typical phenomena, which could happen in frequency and time domains (refer to Figure 7 and Figure 8). 60 40 20 Transimp pedance Gain (V/A) 100M 0 10M -20 1 10 100 1M FIGURE 9: 100k 10M Noise Gain Peaking. 1k 10.00 10 100.00 1,000.00 10,000.00 100,000.00 1,000,000.00 10,000,000.0 100 1k 10k 100k 1M 10M Frequency (Hz) CF FIGURE 7: Signal Gain (i.e. Transimpedance Gain) Peaking. RF 6 Step Ou utput Voltage (V) 1M These phenomena make the photodiode amplifier unstable. A small capacitor (CF) can be added in the feedback loop to eliminate the gain peaking, step output ringing and noise gain peaking issues (refer to Figure 10). 10k 100 1.00 1 1k 10k 100k Frequency (Hz) I – 5 Ideal Diode 4 VDD MCP6491 RJ CJ + VOUT 3 2 V OUT = I R F 1 0 0 FIGURE 8: 0.5 1.0 1.5 2.0 Time (ms) Output Ringing. 2013 Microchip Technology Inc. 2.5 3.0 FIGURE 10: Photodiode Amplifier Using Feedback Capacitor. In the next section, we will discuss the stability of the photodiode amplifier, explain why the amplifier will be stable after adding a feedback capacitor, and learn how to determine the value of the feedback capacitor to get the optimum output response. DS01494A-page 5 AN1494 AMPLIFIER STABILITY ANALYSIS Figure 11 shows the noise gain bode plot of the photodiode amplifier in log-log scale. It is important to clarify the difference between the noise gain and the signal gain because the system stability is dependent on the characteristics of noise gain, not signal gain. The noise gain is the gain seen by a testing voltage source in series with the op amp non-inverting input, which is equal to the signal gain when the signal is applied to the op amp non-inverting input. (dB) AOL -20 dB/dec with adding CF (Stable) GN f1 f2 f3 • For an unstable photodiode amplifier, the net slope between GN and AOL is equal to +40 dB/decade as shown in Figure 11, where the dotted line of GN intercepts the curve of AOL. The dashed line shows the extended GN curve without adding CF. • For a stable photodiode amplifier, the net slope between GN and AOL is equal to +20 dB/decade as shown in Figure 11, where the solid line of GN intercepts the curve of AOL. The solid line shows the GN curve with adding CF. The explanation on the noise gain Bode plot is shown below: without adding CF (Unstable) +20 dB/dec The stability of the system is determined by the net slope between the noise gain (GN) and the open loop gain (AOL) at the frequency where they cross over. f (Hz) 1 f 1 = -------------------------------------------------------------------------------2 R J R F C J + C OP + C F 1 f 2 = ----------------------------2 R F C F GBWP GBWP f 3 = ----------------- = --------------------------------C J + COP GN 1 + ----------------------CF Where RJ = junction shunt resistance RF = resistance of feedback resistor CJ = junction capacitance CF = feedback capacitance COP = op amp input capacitance = CCM + CDM CCM = op amp common mode input capacitance CDM = op amp differential mode input capacitance GBWP = op amp gain bandwidth product GN = noise gain AOL = op amp open loop gain f1 = the location of GN’s first zero f2 = signal gain bandwidth (i.e. transimpedance gain bandwidth) • When f is less than f1: - GN is equal to 1 + RF/RJ, which is roughly equal to 1 V/V or 0 dB when RF << RJ. - The zero of GN is located in f1. • When f is between f1 and f2: - GN increases by +20 dB/dec. - The pole of GN is located in f2, which is equal to 1/(2*RF*CF). This is also the signal gain bandwidth. • When f is between f2 and f3: - GN is equal to 1 + (CJ + COP)/CF. - The crossover frequency of AOL and GN is located in f3, which is equal to GBWP/GN. • When f is larger than f3: - GN is determined and limited by AOL, which decreases by -20 dB/dec. The value of CF affects the location of f2, which determines the signal gain bandwidth and the phase margin of the photodiode amplifier. When CF becomes larger, the phase margin will be increased, which makes the system more stable with less gain peaking, step overshoot and noise gain peaking. However, this also will result in smaller signal gain bandwidth and longer output response time. Table 1 below shows the percent overshoot as a result of different phase margins. TABLE 1: Phase Margin (°) Overshoot (%) 45 25 55 13.3 65 4.7 75 0.008 f3 = noise gain bandwidth FIGURE 11: DS01494A-page 6 Noise Gain Bode Plot. 2013 Microchip Technology Inc. AN1494 For most photodetection applications, the optimum value of CF is typically considered when the phase margin is 65°, which gives a negligible gain peaking and 4.7% overshoot at output, while keeping reasonable signal gain bandwidth and response time. The value of CF at 65° phase margin is approximately shown in Equation 1 where RF << RJ is assumed. EQUATION 1: MCP6491 op amp’s typical GBWP is 7.5 MHz and its input capacitance is COP = CCM + CDM = 12 pF. To make the photodiode amplifier stable, a feedback capacitor CF is needed. Based on Equation 1, the value of CF is 1 pF when the amplifier’s phase margin is 65°. At room temperature (25°C), the DC voltage error at output due to IB and VOS of MCP6491 is given by IB*RF + VOS = 1 pA*10 MΩ + 1.5 mV = 1.51 mV. The graphs in Figure 13 — Figure 17 show the related output response plots with and without adding CF. C J + C OP CF 2 ---------------------------------------2 R F GBWP These plots are PSpice simulation results by using MCP6491 op amp Spice macro model, which is free on the Microchip web site at www.microchip.com. The model is intended to be an initial design tool. Bench testing is a very important part of any design and cannot be replaced with simulations. Note: In Figure 11, the maximum signal gain bandwidth is achieved at 45° phase margin when f2 is equal to f3, and the corresponding value of CF will be half of the one shown in Equation 1. If we consider the effect of RF’s parasitic capacitance, CF will be the value of the one shown in Equation 1 minus RF’s parasitic capacitance. APPLICATION EXAMPLE Here we provide an example to illustrate the circuit’s performance improvement in frequency and time domains after the feedback capacitor is added. In Figure 12, the photodiode’s RJ = 2000 MΩ at 25°C, CJ = 100 pF, MCP6491 op amp’s VDD = 5.5V, RF = 10 MΩ, and assume VOUT switches between 2V and 4V for the two alternating illumination levels. Transimp pedance Gain (V/A) Normally, the parasitic capacitance is less than 0.1 pF for a surface mount resistor due to its small size. Thus, the effect of the parasitic capacitance can be ignored. 1G 1.00E+09 without CF 1.00E+08 100M 1.00E+07 10M with CF 1.00E+06 1M 1.00E+05 100k 1.00E+04 10k 1.00E+03 1k 1.00E+02 100 1 10 FIGURE 13: CF 100 1k 10k 100k Frequency (Hz) 1M 10M Signal Gain vs. Frequency. 6 10 MΩ – 2000 MΩ 100 pF VDD MCP6491 + VOUT V OUT = I RF Step O Output Voltage (V) I without CF 5 with CF 4 3 2 1 0 0 0.5 1.0 1.5 2.0 2.5 3.0 Time (ms) FIGURE 12: Example. Photodiode Amplifier Circuit 2013 Microchip Technology Inc. FIGURE 14: Step Output Response. DS01494A-page 7 AN1494 Photodiode Amplifier Noise Analysis 100 Figure 18 shows the noise model of the photodiode amplifier. without CF 60 CF 40 VN_RF with CF 20 RF – + Noise Gain (dB) N 80 0 – -20 10 100 Total Outp put RMS Noise Voltage De ensity (nV/Hz) 1M RJ VN_RJ 100k + IN+ VOUT VN without CF 10k Where VN_RJ = RJ’s noise voltage density VN_RF = RF’s noise voltage density 1k with CF VN = op amp input noise voltage density IN-, IN+ = op amp input noise current density 100 FIGURE 18: 1 10 100 1k 10k 100k 1M 10M Frequency (Hz) FIGURE 16: Total Output RMS Noise Voltage Density vs. Frequency. 7 5 3 2 with CF 1 0 100 1k 10k 100k 1M Frequency (Hz) 10M FIGURE 17: Total Output RMS Noise Voltage vs. Frequency. Although the added CF eliminates a lot of output noise, we still need to further reduce the noise in order to improve the SNR and achieve better signal integrity. Now we will focus on the noise analysis of the photodiode amplifier. DS01494A-page 8 • Hand Calculation • PSpice Simulation The typical input noise voltage density and input noise current density of MCP6491 are 19 nV/Hz and 0.6 fA/Hz, respectively. The input noise voltage density vs. frequency plot can be found in the MCP6491 data sheet. The 1/f noise is dominant in the lower frequencies while the thermal noise is dominant in the higher frequencies. 4 10 Two ways to quickly estimate total output root-meansquare (RMS) noise are provided: The resistor voltage noise density is given by VN = 4kTR and is spectrally flat. For a 1 kΩ resistor, the VN is 4 nV/Hz. 6 1 Noise Model. NOISE ESTIMATED BY HAND CALCULATION without CF 0.1 MCP6491 CJ Noise Gain vs. Frequency. 10 0.1 Total Outpu ut RMS Noise Voltage (mV) IN- 10M – + FIGURE 15: 1k 10k 100k Frequency (Hz) – + 1 VDD The total output RMS noise is calculated by the square root of the sum of the squared values of the individual output noise contributors. Each output noise contributor is calculated by integrating its squared output noise density over the equivalent noise bandwidth in a square root. The output noise density is calculated by multiplying its input noise density by an appropriate gain. Note that the worst output noise contributor will dominate the total output RMS noise. 2013 Microchip Technology Inc. AN1494 For a single pole system, the equivalent noise bandwidth is equal to the -3 dB bandwidth multiplied by 1.57. Because there is no resistor in series with the op amp's non-inverting input, IN+ does not contribute to output noise. TABLE 2: Input Noise Density Output Noise Density Equivalent Noise Bandwidth VN VN*GN 1.57*Noise Gain Bandwidth IN- IN-*RF 1.57*Signal Gain Bandwidth VN_RJ VN_RJ*(RF/RJ) 1.57*Signal Gain Bandwidth VN_RF VN_RF 1.57*Signal Gain Bandwidth Note 1: The noise gain bandwidth is given by GBWP/GN. Notice that the op amp’s input noise voltage density (VN) needs to be multiplied by noise gain GN to get the corresponding output noise density, and the noise gain bandwidth is much larger than the signal gain bandwidth. This makes VN dominate the total output RMS noise voltage. NOISE ESTIMATED BY PSPICE SIMULATION Figure 19 shows the MCP6491 op amp input noise voltage density spectrum simulation plot by using the MCP6491 op amp Spice macro model in PSpice, which matches the noise density spectrum plot of MCP6491 data sheet well. 1k Input No oise Voltage Density (nV/Hz) Table 2 shows the input noise density of each noise source, the corresponding output noise density and the equivalent noise bandwidth. 2: The signal gain bandwidth is given by 1/(2*RF*CF). The GN is dependent on frequency; it is 1 V/V at lower frequencies and gradually becomes higher with a maximum of 113 V/V at higher frequencies. Instead of integrating GN over frequency, we simply use 113 V/V as the noise gain over the equivalent noise bandwidth for quick noise estimation. Thus, the output noise from each contributor can be estimated, according to Table 2, and the results are shown in Table 3. TABLE 3: Input Noise Density Output Noise Voltage Density (nV/Hz) Individual Output Noise Voltage (RMS in µV) VN VN*GN = 19*113 IN- IN-*RF = 6 692 VN_RJ VN_RJ*(RF/RJ) = 28 4.4 VN_RF VN_RF = 400 63 1 10 0.1 1 10 100 1k 10k 100k 1M 10M Frequency (Hz) FIGURE 19: MCP6491 Op Amp Input Noise Voltage Density vs. Frequency. Figure 20 shows the total output RMS noise voltage density spectrum. Total Output RMS Noise Voltage Density (nV/Hz) D For the circuit shown in Figure 12, the noise gain bandwidth is (7.5 MHz)/(113 V/V) = 66 kHz and its equivalent noise bandwidth is 66 kHz*1.57 = 104 kHz. The signal gain bandwidth is 16 kHz and its equivalent noise bandwidth is 16 kHz*1.57 = 25 kHz. 100 10k 1k 100 10 0.1 1 10 100 1k 10k 100k 1M 10M Frequency (Hz) FIGURE 20: Total Output RMS Noise Voltage Density vs. Frequency. The total output RMS noise is equal to 695 µV, which is the square root of the sum of the individual squared output noise values. 2013 Microchip Technology Inc. DS01494A-page 9 AN1494 Figure 21 shows the total output RMS noise voltage spectrum. Within 10 MHz, the total output RMS noise voltage is 650 µV. The noise estimated by hand calculation (695 µV) is similar to the one simulated by PSpice. For a 4V output voltage signal, the SNR is equal to 20*log(VSIGNAL/VNOISE) = 20*log(4V/650µV) = 76 dB. In PSpice probe, the trace expression “SQRT(S(V(ONOISE)*V(ONOISE)))” can be used to integrate output noise voltage density over bandwidth. Tota al Outp put RMS Nois se Volta age (μV V) Note: In Equation 2, the low pass filter’s cut-off frequency (fc) is set to be equal to the maximum allowed signal gain, which gives the minimum rising time (tR) of the output step. For a fixed RF, tR can be further reduced by choosing an op amp with higher GBWP. The higher GBWP makes the value of CF smaller based on Equation 1, and thus makes fc larger. EQUATION 2: 1 f C = ----------------------------2 R F C F 700 600 0.35 t R ---------fC 500 400 Where 300 200 fC = cut-off frequency of low pass filter 100 tR = 10% to 90% rising time (s) 0 1 10 100 1k 10k 100k 1M 10M Frequency (Hz) FIGURE 21: Total Output RMS Noise Voltage vs. Frequency. NOISE FILTERING In Figure 22, a single pole RC low pass filter can follow the photodiode amplifier to eliminate the noise beyond the signal gain bandwidth. CF RF I – VDD FIGURE 22: DS01494A-page 10 In Figure 23, the step output responses are shown for the low pass filters with different fC. Notice that the filter with lower fC yields longer tR. 4 3 fC = 16kHz fC = 1.6kHz 2 fC = 318Hz 1 0 VOUT R MCP6491 + As shown in Figure 12, RF = 10 MΩ, CF = 1 pF, thus fC is 16 kHz and tR is 22 µs based on Equation 2. Step O Output Voltage (V) 0.1 0 2 4 6 8 10 12 Time (ms) C Noise Filtering. FIGURE 23: Step Output Response vs. Low Pass Filter’s fC. The low pass filter also serves as an anti-aliasing filter for the subsequent analog-to-digital converter (ADC). The ADC’s sampling rate should be at least two times of the low pass filter’s fc. 2013 Microchip Technology Inc. AN1494 We chose R = 100 kΩ and C = 0.1 nF to make the low pass filter with fc = 16 kHz. The noise generated by the filter itself is negligible. Total Outputt Noise Voltage Density (nV/Hz) In Figure 24 and Figure 25, the related output RMS noise spectrum plots with and without filtering are shown, which are PSpice simulation results. 10k No low pass filter In photodetection applications, PCB surface leakage effects need to be considered. Surface leakage is caused by humidity, dust or other contamination on the board. Under low-humidity conditions, a typical resistance between nearby traces is 1012. A 5V difference would cause 5 pA of current to flow, which is greater than the MCP6491 family’s bias current at +25°C (1 pA, typical). There are several ways to reduce surface leakage such as cleaning, coating and guard rings. 1k Cleaning with isopropyl alcohol helps remove residues, and coating isolates the surface from moisture, dust, etc. 100 Adding low pass filter with fC = 16 kHz 10 0.1 1 10 100 1k 10k 100k 1M 10M Frequency (Hz) FIGURE 24: Total Output RMS Noise Voltage Density vs. Frequency. Total Output RMS Noise Voltage (μV) PCB Surface Leakage 700 No low pass filter 600 500 400 Adding low pass filter with fC = 16 kHz 300 200 The more reliable and permanent solution to reduce surface leakage is using guard rings. As shown in Figure 26, the guard ring drawn in the dotted line is a low impedance conductive trace and it surrounds the sensitive inverting input pin area. The guard ring is biased at the same voltage as the sensitive inverting input pin so that there is no leakage current between itself and the guarded sensitive pin. In a photodiode amplifier circuit, the guard ring is directly connected to the op amp’s grounded non-inverting input pin. Thus, the guard ring blocks the leakage current which would flow into the sensitive pin, and sinks it to ground. Moreover, to minimize coupling effects, the circuit connections within the guard ring should be kept as short as possible. For more information on PCB layout techniques, please refer to Microchip’s AN1258 (“Op Amp Precision Design: PCB Layout Techniques”). 100 CF 0 0.1 1 10 100 1k 10k 100k 1M 10M Frequency (Hz) FIGURE 25: Total Output RMS Noise Voltage vs. Frequency. In Figure 25, the total output RMS noise voltage is 205 µV within 10 MHz. RF I VDD MCP6491 VOUT + For a 4V output voltage signal, the SNR is equal to 20*log(VSIGNAL/VNOISE) = 20*log(4V/205µV) = 86 dB, which is 10 dB higher than the SNR without filtering. FIGURE 26: 2013 Microchip Technology Inc. – Guard Ring Technique. DS01494A-page 11 AN1494 SUMMARY REFERENCES This application note reviews the features of Microchip’s MCP6491 low input bias current op amps , the characteristics and operation modes of photodiodes, then it focuses on designing photodiode amplifier circuitry, and several key design points are discussed in order to improve the circuit’s performance. The noise analysis of a photodiode amplifier and the design technique of a low pass filter are also discussed. Finally, the PCB techniques that help reduce the current leakage are briefly introduced as well.  MCP6491 Data Sheet, “7.5 MHz Low Input Bias Current Op Amps”, Microchip Technology Inc., DS22321, 2012 DS01494A-page 12  MCP6481 Data Sheet, “4 MHz Low Input Bias Current Op Amps”, Microchip Technology Inc., DS22322, 2012  MCP6471 Data Sheet, “2 MHz Low Input Bias Current Op Amps”, Microchip Technology Inc., DS22324, 2012 2013 Microchip Technology Inc. Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. • Microchip is willing to work with the customer who is concerned about the integrity of their code. • Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.” Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer’s risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights. Trademarks The Microchip name and logo, the Microchip logo, dsPIC, FlashFlex, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro, PICSTART, PIC32 logo, rfPIC, SST, SST Logo, SuperFlash and UNI/O are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor, MTP, SEEVAL and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. Silicon Storage Technology is a registered trademark of Microchip Technology Inc. in other countries. Analog-for-the-Digital Age, Application Maestro, BodyCom, chipKIT, chipKIT logo, CodeGuard, dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN, ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial Programming, ICSP, Mindi, MiWi, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, mTouch, Omniscient Code Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit, PICtail, REAL ICE, rfLAB, Select Mode, SQI, Serial Quad I/O, Total Endurance, TSHARC, UniWinDriver, WiperLock, ZENA and Z-Scale are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. GestIC and ULPP are registered trademarks of Microchip Technology Germany II GmbH & Co. & KG, a subsidiary of Microchip Technology Inc., in other countries. All other trademarks mentioned herein are property of their respective companies. © 2013, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. ISBN: 978-1-62076-987-4 QUALITY MANAGEMENT SYSTEM CERTIFIED BY DNV == ISO/TS 16949 == 2013 Microchip Technology Inc. Microchip received ISO/TS-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company’s quality system processes and procedures are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified. 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