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AN495
Application note
Effective filtering of TDE1707
Introduction
The TDE1707 is an industrial IPS (intelligent power switch) dedicated for use in proximity
detectors. It can deliver up to 0.5 A of current to a “configurable” load (battery or ground
configuration), as indicated in the block diagram below.
Figure 1. Block diagram
VREG
+5V
6
7
3mA LED
DRIVER
5V
IN
5
1
Ri
1Mohm
8
+Vs
LED
DRIVER
L.S. OUT
2.6V
4V
70V
2
4uA
DELAY
3
5V
H.S. OUT
THERMAL
SHUTDOWN
ISC
CMP
4
December 2013
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Effective filtering
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AN495
Effective filtering
In the application circuit (Figure 2) taken from the TDE1707 device datasheet, the use of
filter capacitors is recommended on both:
•
the power supply (+Vs pin 7).
•
the +5 V regulated voltage (Vreg pin 6).
–
To understand the function of the Vreg capacitor, it is necessary to consider that
the Vreg pin makes available a regulated voltage that can be used to supply
external circuits (typically proximity detectors); but the TDE1707 itself always uses
the Vreg to supply most of its internal circuits (see Figure 1: Block diagram).
Internally to the TDE1707, Vreg supplies all the functional blocks, except the
output power transistor (and the Driver-Led, when the Led is connected as in “load
to GND configuration”).
–
In a real application, the TDE1707 and associated circuitry can be significantly
farther away from the power supply and the long connection wires will act as a
serial inductor.
At power-on, or at turn-on of the power transistor, or in coincidence with load variations, this
inductance will react to the current variations with wide voltage variations. In proximity
sensor applications, for space reasons, the size of the filtering capacitors must be reduced
as much as possible.
The voltage oscillation can induce two kind of problems in the circuit:
1.
Overvoltage on the +Vs pin, connected to the +24 V bus, which can exceed the
TDE1707 rated limit.
2.
Disturbances inside the circuit (TDE1707), because the noise immunity level is
exceeded with disruption of the input/output function.
Filtering the overvoltage on the +Vs is possible only by an external capacitance between
+Vs (pin7) and Ground (pin4) to limit voltage spikes at the device’s rated values.
Figure 2. Application circuit
VCC
LOAD
1
INPUT
7
10nf to 1uF
10nF
8
5
TDE1707
6
3
10nF
High side load
2
4
1mSec/nF
GROUND
VCC
7
INPUT
10nF to 1uF
8
1
5
TDE1707
2
6
3
Low side load
4
10nF
10nF
2/7
1mSec/nF
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GROUND
AN495
Effective filtering
Immunity problems in the circuit are essentially related to the +5 V Vreg filtering, because
the noise on this voltage can induce errors in the low-voltage circuits.
The best solution to avoid immunity problems is to put the filter capacitor between Vreg and
Ground even if the Vreg does not supply any external circuits. Compared to the +Vs
capacitor filtering effect, which also improves the immunity, the Vreg capacitor offers two
advantages:
1.
The capacitive value can be significantly lower, for the same filtering effect, because
the Vreg filter does not have to sustain the load current variations.
2.
The nominal voltage of the capacitor is lower (6 V instead of 25-50 V), so that the
physical size of the capacitor is also smaller.
The higher effectiveness of filtering Vreg instead of +Vs is always evident. On average, in a
typical application, a capacitor put on Vreg can, with the same filtering effectiveness of a
capacitor on +Vs, be 20 times smaller in value.
Nonetheless, a capacitor on +Vs, although not of high value, is recommended. Its value
should be adapted in accordance with the equivalent inductance of the supply connections
and of the value of the load.
For instance, the values used in the test circuit (Figure 3):
•
325 μH are too high to be found in practice.
•
4.7 nF on +Vs is barely sufficient with 325 μH (with 325 μH, 10 nF would be preferable).
•
4.7 nF on Vreg is sufficient in most practical cases.
•
Using the test circuit shown in Figure 3, with the input trigger of the TDE1707 in pulsed
mode, the effect of the capacitor on Vreg (pin 6) can be noted in Figure 4 and Figure 5:
–
Figure 4 shows the voltage on +Vs (Ch1) and Vreg (Ch2) at turn-on and turn-off
edges, without the filter capacitor on pin 6.
–
Figure 5 shows the same signals but with 4.7 nF capacitor connected between
Vreg (pin 6) and Ground.
The improvement of the immunity level and the low values of the capacitors makes the
suggested filtering solution the best for proximity detector applications.
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4.7nF
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DELAY CAP
3 DELAY
5 IN
4
GROUND
TDE1707
1
LED
OUT
6
V.REG
OUT
7
HIGH SIDE OUT
LOW SIDE OUT
Vs
2
8
4.7nF
LOAD 75ohm
325uH
24V
Effective filtering
AN495
Figure 3. Test circuit
AN495
Effective filtering
Figure 4. Voltage on Vs and Vreg without filter capacitor
CH1 20V/div
CH2 2V/div
t = 20µSec/div
CH2
5V
CH1
24V
ON
OFF
Figure 5. Voltage on Vs and Vreg with filter capacitor
CH1 20V/div
CH2 2V/div
t = 20µSec/div
CH2
5V
CH1
24V
ON
OFF
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Revision history
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Revision history
Table 1. Revision history
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Date
Revision
Changes
Nov-2003
1
First issue
14-Sep-2005
2
New template, no content change
14-Dec-2006
3
The document has been reformatted
17-Dec-2013
4
Minor formatting and text changes
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