dm00075656

AN4242
Application note
New generation of 650 V SiC diodes
Introduction
For many years ST has been a worldwide leader in high voltage rectifiers dedicated to
energy conversion. During the last decade, electronic systems have followed a continuous
trend towards higher power density and more energy savings driven by governments’
environmental awareness. Power-supply designers are permanently confronted with
stringent efficiency regulations (Energy Star, 80Plus, European Efficiency…). They are
forced to consider the use of new power converter topologies and more efficient electronic
components such as high-voltage silicon-carbide (SiC) Schottky rectifiers. To help them face
this challenge, ST developed in 2008 a first family of 600 V SiC diodes. After having sold
millions of pieces, ST’s reliability and know-how is confirmed on these new components
using wide band gap materials.
In hard-switching applications such as high end server and telecom power supplies, SiC
Schottky diodes show significant power losses reduction and are commonly used. A
growing use of those rectifiers is also recorded in solar inverters, motor drives, USP and
HEV applications.
However, the high cost of this technology tends to drive designers to use it at high
current-density levels (3 to 5 times higher than standard Si diodes), inducing more
constraints on the diode. Indeed, the Silicon-carbide material features a positive thermal
coefficient potentially leading to some instability and lower current-surge robustness than
silicon diodes. ST decided to review the design and develop a second generation of SiC
diodes offering an enhanced current capability while still featuring an attractive switching-off
behavior. The peak reverse voltage was also increased to 650 V in order to ensure a safer
operation in certain designs.
Typical applications (non-exhaustive list)
 Charging station
 ATX power supply
 AC/DC power management unit, high voltage, and other topologies
 Desktop and PC power supply
 Server power supply
 Uninterruptible power supply
 Photovoltaic string and central inverter architecture
 Photovoltaic power optimizer architecture
 Photovoltaic microinverter grid-connected architecture
 Photovoltaic off-grid architecture
 Telecom power
May 2013
DocID024196 Rev 1
1/26
www.st.com
Contents
AN4242
Contents
1
Features of the SiC diodes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.1
2
3
1.1.1
Comparison with Si bipolar diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.1.2
Capacitive charge (QC) measurement . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.2
Forward characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
1.3
Other characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1.3.1
Low leakage current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1.3.2
“C” thermal coefficient . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Forward thermal runaway . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.1
Thermal runaway risk in regular working mode . . . . . . . . . . . . . . . . . . . . . 8
2.2
Thermal runaway risk in transient phase . . . . . . . . . . . . . . . . . . . . . . . . . .11
New 650 V JBS SiC diodes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.1
Device structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.2
Comparison between first and second generation of SiC diodes . . . . . . . 13
3.3
4
Turn off behavior . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
3.2.1
Forward voltage comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.2.2
IFSM PSpice simulation: comparison between 1st and 2nd generation 15
3.2.3
IFSM datasheet comparison between SiC G2 and SiC G1 . . . . . . . . . . 16
JBS structure trade-off: current surge capability versus Qrr . . . . . . . . . . 17
3.3.1
Forward characteristics comparison between ST’S SiC 2nd generation
and other JBS designs 17
3.3.2
No recovery charge area . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.3.3
PSpice electro-thermal simulation result . . . . . . . . . . . . . . . . . . . . . . . . 19
Efficiency measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
4.1
dI/dt optimization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
4.2
Example of efficiency measurements . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
5
Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
6
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
2/26
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AN4242
Features of the SiC diodes
1
Features of the SiC diodes
1.1
Turn off behavior
1.1.1
Comparison with Si bipolar diode
The benefits brought by silicon-carbide diodes on the switching losses in the applications
working in continuous-conduction mode (such as PFC applications) are already well known.
The capacitive nature of the recovery current allows constant turn-off characteristics when
the temperature increases. In contrast the turn-off behavior of bipolar diodes is
characterized by a strong dependency on junction temperature, dI/dt slope and forward
current level (see Figure 1).
Thanks to their properties, SiC diodes allow significant reduction of power losses in the
associated MOSFETs when switched-on. They also permit new optimization options for the
power converter (for example, increasing the switching frequency and speed, lowering the
size of passive components, snubber-circuits and EMI filters).
Figure 1. Switching behavior comparison between Si and SiC diodes
for Tj=75 °C and Tj=125 °C
VR=380 V, IF=8 A, dI/dt=200 A/μs, Tj=125 °C
20 ns/div
2 A/div
VR=380 V, IF=8 A, dI/dt=200 A/μs, Tj=75 °C
20 ns/div
2 A/div
8 A SiC
diode
8 A SiC
diode
8 A tandem (2 x
300 V diodes in
series)
8 A bipolar
diode
8 A tandem (2 x
300 V diodes in
series)
8 A bipolar
diode
The capacitive recovery current is generated by the charge of the junction capacitance Cj
under a certain reverse voltage and corresponds to a quantity of stored charges Qc.
1.1.2
Capacitive charge (QC) measurement
Some confusion exists about the measurement conditions of Qc. A comparison between the
switch-off behavior and the integral of the current used to estimate Qc is shown in Figure 2.
Figure 2A and Figure 2B show measurements at low forward current (IF=1 A) and low dI/dt
slope (50 A/µs), with and without reverse voltage across the diode. A certain inaccuracy of
the measurement of Qc can be observed. It is linked to the probe, which features its own
equivalent capacitance. Figure 2C shows a measurement at IF=2 A and a high dI/dt slope
(200 A/µs) without any probe voltage. With such a high value of current-slope some
oscillations appear. Taking into account the total capacitive current until t0 when the reverse
voltage reaches VR, Qc measured by the integral of the current is similar to the one in
Figure 2B.
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Features of the SiC diodes
AN4242
Figure 2. Qc measurement of a 6 A SiC diode at IF = 1 A, Tj = 25 °C, VR = 400 V,
dI/dt = 50 A/µs
Voltage probe
t0
0
Qc = 24.2 nC
Qc = 19.6 nc
A. With voltage probe
B. Without voltage probe
Qc=20.4nc
C. IF = 2 A, dI/dt = 200 A/µs
To avoid false readings due to some measurement inaccuracy, a theoretical approach is
preferred. The quantity of charge Q during a certain period of time [0-t0] is delimited by the
reverse voltage variation V across the junction capacitance Cj between 0 and VR and is
given by the following formulas:
Equation 1
Qc
ò
dQ =
0
ò
t0
i(t) dt
0
with
Equation 2
i(t) = Cj
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dV(t)
dt
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AN4242
Features of the SiC diodes
After simplification and introduction of the junction capacitance variation versus the reverse
voltage Cj(V), Qc is defined by the following formula:
Equation 3
VR
Qc(VR) =
ò
Cj(V) dV
0
This relation demonstrates that Qc is defined by the integral of the junction capacitance Cj
between 0 and VR, the voltage reapplied on the diode. This theoretical approach allows the
direct and accurate evaluation of Qc, avoiding the inaccuracy introduced by potential
measurement problems.
The strict expression of the energy stocked in the junction capacitor for a given reverse
voltage can be determined by:
Equation 4
VR
Qc(VR) =
ò
Cj(V) · V dV
0
Due to the non-linearity of the junction capacitance versus the reverse voltage, this relation
is different from the traditional energy formula ½ · C · V² (or ½ · Q · V), which is valid only
when considering a constant capacitance.
1.2
Forward characteristics
Another main feature of SiC diodes is the variation of the forward voltage drop (VF) with the
junction temperature.
Figure 3 shows the forward current versus forward voltage drop characteristics for 3
different junction temperature levels. A crossing-point can be observed at a certain level of
current IC. When the current is lower than this level, the temperature coefficient of the
forward voltage drop (VF) is negative. When the current is higher, it becomes positive. The
same crossing point exists for traditional silicon diodes, but it appears at a much higher
current level (>10 times the nominal current). This is linked to the higher forward current
density of SiC diodes.
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Features of the SiC diodes
AN4242
Figure 3. ST’s STPSC806 first generation: typical forward voltage drop versus
forward current
16
IFM (A)
14
12
Tj==25
25 °C
°C
Tj =150 °C
10
8
Tj =175 °C
6
4
2
0
0.0
VFM (V)
0.5
1.0
1.5
2.0
2.5
3.0
As a consequence, the working area of SiC rectifiers usually corresponds to VF > 0, which
leads to an increase of the forward voltage drop with the junction temperature, meaning an
increase of the conduction power losses, hence an increase of the temperature and so on.
This electro-thermal mechanism results in a thermal runaway loop. The effect is explained in
Section 2.
1.3
Other characteristics
1.3.1
Low leakage current
The new generation of 650 V SiC diode offers some low leakage current values similar to
the 600 V Si counterparts. Therefore the reverse power losses defined in PFC by the
Equation 5 stays negligible as showed in Table 1.
Equation 5
PREV (Tj) = dav · VR · IR (VR, Tj)
with
Equation 6
dav = 1 -
2 · Ö2 · Vin
p · Vout
Table 1. Leakage current and reverse losses comparison in PFC @90Vac between Si
and SiC diode
IR @ VR = VRRM
Product
@ Vin = 90 V, Vout = 400 V
Typical / Maximum
Typical
STTH8R06D
35 / 400 µA @ 125 °C
0.011
STPSC806D
150 / 1000 µA @ 125 °C
0.047
65 / 335 µA @ 150 °C
0.02
STPSC8H06D
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Prev in PFC
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AN4242
1.3.2
Features of the SiC diodes
“C” thermal coefficient
The “C” thermal coefficient represents the leakage current dependence on the junction
temperature. The leakage current increases by an exponential law with the junction
temperature. Knowing a reference point IR(VR,TjRef) and the value of the thermal coefficient
“C”, one can easily calculate the leakage current at a given temperature Tj using the
following formula:
Equation 7
IR(VR,Tj) = IR(VR,TjRef) · ec(Tj - TjRef)
where VR is the reverse voltage applied across the diode.
Each diode has its own coefficient that can be calculated using two points as follows:
Equation 8
c=
æ IR(VR,TjRef2) ö
1
· ln ç
÷
TjRef2 - TjRef1
è IR(VR,TjRef1) ø
If the SiC Schottky diodes have low leakage currents and they have also a smaller
temperature dependence compared to the Si counterparts. As illustrated in Table 2, typically
the “C” thermal coefficient should be around 2 times lower than the Si diodes.
Table 2. “C” thermal coefficient comparison between Si and SiC diode
Product
IR1 @ VR = 400 V, Tj1
IR2 @ VR = 400 V, Tj2
C coefficient
STTH8R06
8 µA @ 125 °C
50 µA @ 150 °C
0.070
STPSC8H065D
4 µA @ 150 °C
8.5 µA @ 175 °C
0.030
The feature of low dependence with the Tj is interesting to push back the limit of thermal
runaway due to the power reverse losses. Regarding the stability criterion formula linked to
PPREV given by Equation 9, the interest for the use at high Tj of small packages with high
thermal resistance becomes certain.
Equation 9
dPPREV(Tj)
1
£
dTj
Rth(j-a)
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Forward thermal runaway
2
AN4242
Forward thermal runaway
In some particular application conditions a thermal runaway loop can be triggered (see
Figure 4) and the thermal system of the diode may become unstable.
Figure 4. Thermal runaway loop
Tj
VF(Tj )
Losses P(Tj)
Positive loop
Two kinds of application conditions can be linked to the thermal runaway risk:
2.1

the stationary regime during the regular working mode

the critical transient phases.
Thermal runaway risk in regular working mode
During the regular operating mode, the average current in the diode can modeled with a
constant current generator as shown in Figure 5.
Figure 5. Simple electrical model
Io
Rd(Tj)
Vt0 (T j)
0
The electrical model given by Equation 10, simulates the variation of the forward voltage
drop versus the junction temperature for a given current I0.
Equation 10
VF(I0,Tj) = Vt0150° + aVt0(Tj - 150) + [Rd + aRd · (Tj - 150)] · I0
Equation 11
Vt0(Tj) = Vt0150° + aVt0(Tj - 150)
Equation 12
Rd(Tj) = Rd150° + aRd · (Tj - 150)
Vt0(Tj) is the VF value for a fixed Tj when IF is null. The inverse function of Rd(Tj) represents
the straight slope between 2 forward current levels and the threshold voltage Vt0 for a fixed
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Forward thermal runaway
Tj. Vt0 and Rd are thermal coefficients. They represent the junction temperature impact
on Vt0 and Rd.
Using the electrical model previously defined, the conduction power losses P(Tj) can be
estimated. Using the analogy between thermal and electrical units, a simple electro-thermal
model is described in Figure 6. The thermal model is defined by the thermal resistance
Rth(j-a) and the thermal capacitance Cth(j-a) junction to ambient.
Figure 6. Simple electro-thermal model
Tj
C th(j-a)
R th(j-a)
P(Tj)=I0·VF(Tj,I 0)
T amb
The resolution of the above electro-thermal system gives the Tj(t) expression used to find
the thermal runaway limit and to highlight the stability condition of the diode. The equation
giving the conduction power losses versus Tj is the following:
Equation 13
P(Tj) = [Vt0150° + aVt0(Tj - 150)] · I0 + [Rd150° + aRd · (Tj - 150)] · I02
with
Equation 14
A = I0 · (Vt0150° - 150 · aVt0) + I02 · (Rd150° - 150 · aRd)
and
Equation 15
I0 · aVt0 · Tj + I02 · aRd · Tj = (I0 · aVt0 + I02 · aRd) · Tj
= B · Tj
A simplified version is:
Equation 16
P(Tj) = A + B · Tj
The global system equation is defined by:
Equation 17
æ
dTj ö
Tj = Tamb + Rth · çP(Tj) - Cth ·
dt ÷
è
ø
Or again
Equation 18
Tj · (1 - B · Rth) + Rth · Cth ·
dTj
= Tamb + A · Rth
dt
Solving the differential equation gives the stability condition on the junction temperature:
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Forward thermal runaway
AN4242
Equation 19
æB
· Rth - 1 ö
Rth · (A + Tamb · B) çè Cth · Rth
·e
Tj (t) =
B · Rth - 1
÷·
ø
t
-
Tamb + A · Rth
B · Rth - 1
Due to the exponential function in the expression of Tj(t), if B · Rth - 1 > 0 then the limit
lim Tj(t) ® ¥
t®¥
leads to the diode destruction if the current I0 is not interrupted.
Thus, the stability condition is given by:
Equation 20
B · Rth - 1 < 0
so
Equation 21
Rth <
1
B
The detailed expression gives:
Equation 22
Rth <
1
aVt0 · I0 + aRd · I02
Note that the limit of thermal runaway can be directly found by:
Equation 23
dPT(Tj)
1
£
Rth(j-a)
dTj
Numerical application:
An application with an average current I0 = 6 A using the STPSC6H065 is considered here.
The typical forward voltage curve versus forward current of the STPS6H065 datasheet is
calculated between 3 A and 9 A and between 25 °C and 150 °C:
Vt0150°C = 0.85 V, Rd150°C = 0.175 , Vt0 = -800 µV/°C, Rd = 600 µ/°C.
So, the “B coefficient” is equal at 0.017 W/°C, and the critical Rth, beyond which the thermal
runaway is reached, is Rth > 59.5 °C/W.
Considering the Rth(j-a) of the TO-220 package in air to be around 60 °C/W, the stability
condition will not be respected since B · Rth(j-a) - 1 > 0 and thus the diode cannot be used
without a heatsink for this value of current.
The diode must be mounted on its own heatsink, in choosing the Rth value checking
B · Rth(j-a) - 1 < 0 and respecting Tj < Tjmax. In this case of a stable condition,
lim Tj(t) ® t®¥
Tamb + A · Rth
B · Rth - 1
if Tj targeted is 125 °C with Tamb = 40 °C, the heatsink should be chosen for an Rth(j-a) value
equal to 7.45 °C/W.
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AN4242
2.2
Forward thermal runaway
Thermal runaway risk in transient phase
The thermal runaway phenomenon can easily be observed with the short IFSM test
waveform by sensing the forward voltage drop. IFSM is defined by a sine-wave of 10 ms
shown in Figure 7 and is described in the datasheet as the non-repetitive maximum surge
forward current.
Figure 7. Thermal runaway phenomenon during an IFSM-test waveform
VF = 11 V
STPSC606D
2 ms/div
2 V/div
10 A/div
IFSM = 38 A
In standard applications, the current waveforms are either shorter or longer and more
complex due to the switching frequency. However the IFSM parameter stays a reference that
reflects the capability of the diode to sustain a surge current.
In an SMPS, during the transient phases such as the start-up phase, a power line drop-out,
a lightning surge or a short circuit, experience shows that some high surge current stresses
are applied to the diode. Examples are shown in Figure 8.
Figure 8. Inrush current proportional to dVout/dt during a start-up phase and a
power line drop-out
200 ms / Div
5 A / Div
100V / Div
5 ms / Div
5 A / Div
100 V / Div
Inrush
current
VOUT
Idbypass
IdSiC
VOUT
Inrush
current
IdSiC
ILine
20 ms / Div
IdSiC
VOUT
INTC=Idbypass
Unlike the regular operating mode, the current stress duration is generally lower than 1 s. In
this case a thermal runaway phenomenon can be triggered and the advised limit to avoid
the destruction of the diode is the Tjmax given in the datasheet.
The estimation of Tj during these transient conditions involves the transient thermal
impedance:
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Forward thermal runaway
AN4242
Equation 24
t
DT(t) = P(t) · Zth¢(t) =
ò
P(t)Zth¢(t - t)dt
0
In most cases, the complexity of the current waveform implies that the above equation is
solved with help of an electro-thermal model as shown in Figure 12.
To push back the thermal runaway limit and improve the capability of SiC diodes to
withstand high current surges, a second generation of SiC diode has been developed by
STMicroelectronics using a combination of a Schottky diode and a PN diode. This new
technology is usually called Junction Barrier Schottky (JBS).
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New 650 V JBS SiC diodes
3
New 650 V JBS SiC diodes
3.1
Device structure
Figure 9. Comparison between a pure SiC Schottky structure with the
JBS SiC structure
Schottky barrier
4H - SiC epitaxy
Guard ring
4H - SiC substrate
Schematic cross section of conventional SiC Schottky diode (1st generation device)
Schottky
on N-type
Ohmic contact
on P+
P+
PN junction
P+
N-type 4H - SiC epitaxy
Schottky
on P-type
Passivation
Top metal
Schottky barrier
Metal
P area
Schottky
area
N - epitaxy
N+ 4H - SiC substrate
Ohmic backside contact
N+ substrate
Schematic cross section of a JBS SiC diode (2nd generation device)
The 2nd generation SiC device is based on JBS (junction barrier Schottky) concept. At high
forward voltage drops, this structure benefits from the injection of minority carriers by the PN
junctions inserted within the main Schottky contact. Thus in case of surges current,
modulation of resistivity induces a lower VF and a smaller increase of Tj. Moreover, the PN
grid supports the decrease the leakage current IR and to increase the breakdown voltage
Vbr of the device. So, thanks to this new design, the robustness of device is drastically
increased compared to standard Schottky diode.
3.2
Comparison between first and second generation of SiC
diodes
3.2.1
Forward voltage comparison
The forward voltage characteristics of the first and the second generation are compared in
Figure 10. The dotted line network corresponds to the linear characteristics of the pure SiC
Schottky diode. The positive thermal coefficient is evident. Those curves highlight the
difficulties in characterizing the pure SiC Schottky diode at high current with constant
junction temperature due to the overheating linked to the measurement. To limit this thermal
effect, the tests are made with a short duration pulse tp = 50 µs. The second generation of
SiC diodes also presents a linear characteristic up to a certain level of current. A clamping
effect linked to the JBS structure then appears at higher current. This effect happens when
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New 650 V JBS SiC diodes
AN4242
there is a bias of the merged PN junctions, roughly beyond 3 V, 10 A @ 175 °C; 3.5 V, 15 A
@ 125 °C; 4 V, 25 A @ 75 °C….
Figure 10. Forward voltage comparison between pure Schottky SiC diode and
JBS SiC diode
8
VF (V)
175 °C
VF =f(I F) versus Tj (tp=50 µs)
7
Thermal effect
6
125 °C
75 °C
5
4
25 °C
3
2
STPSC606D 1G ( SiC Schottky)
STPSC6H065D 2G ( SiC JBS)
1
IF (A)
0
0
5
10
15
20
25
30
35
40
Figure 11 shows the characterization of the 2nd generation SiC diode up to 100 A with a
pulse duration tp = 1 µs. This network of curves highlights two crossing points. First, VF is
negative below 1.5 A, then positive up to around 42 A, then once again negative. When the
merged PN junction is biased, at high Tj (>125 °C) all the curves converge to one straight
line giving a forward characteristics almost independent of the temperature.
Figure 11. Forward voltage characteristic of JBS SiC diode up to 100 A with tp = 1 µS
9
VF (V)
VF =f(I F) versus Tj (tp = 1 µs)
8
7
6
aVF>0
5
aVF<0
225 °C
4
STPSC6H065D 2G
25 °C
3
2
1
aVF<0
IF (A)
a VF>0
0
0
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20
30
40
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60
70
80
90
100
AN4242
New 650 V JBS SiC diodes
The JBS structure clamps the forward voltage at high current and high Tj. This new
technology thus avoids the thermal runaway phenomenon and the IFSM value can go up to 9
or 10 times the nominal current rating.
3.2.2
IFSM PSpice simulation: comparison between 1st and 2nd generation
The electro-thermal model simulates the variation of the forward voltage drop during a
current spike and gives an estimate of the junction temperature. The electro-thermal model
of a 2nd generation 6 A SiC diode is given in Figure 12. The model is composed of an
electrical model based on the typical forward characteristics shown in Figure 11 and a
thermal model based on the typical transient thermal impedance junction-to-case curve
given in the datasheet.
Figure 12. Electro-thermal model of the 6 A /650 V SiC G2 (STPSC6H065D) from
STMicroelectronics
VF1
IN
PARAMETERS:
OUT+
Vt1 = 9.7788E-01
Rd1 = 9.1267E-02
aVt1 = -6.4005E-04
aRd1 = 2.1542E-04
bVt1 = -1.1968E-06
bRd1 = 2.5860E-06
OUT-
IN1
IN1
IN2
OUTVF2
IN2
OUT
VF11
PARAMETERS:
PARAMETERS:
a = 8.8736E-02
a1 = 1.3166E+00
b = -4.7201E-04
b1 = 2.6601E-02
c = 3.0955E-06
d1 = 9.0534E-07
c1 = -2.2788E-04
d = -8.5670E-09
e1 = -1.3932E-09
e = 8.4095E-12
IN1
VF3
IN2
OUT
Tj
VF_tj_IF
(V(%IN1) *V(%IN2))
TJ
2
U1
TOPEN = 0.01
PARAMETERS:
1
IF
I3
R77
1
R81
1
R80
1
R82
1
R83
1
Vt3 = 2.5132E+00
aVt3 = 1.4256E-02
bVt3 = -7.8925E-05
cVt3 = 1.3556E-07
Rd3 = 7.2948E-02
aRd3 = -4.3599E-04
bRd3 = 2.3970E-06
cRd3 = -4.1511E-09
Electrical model
R79
R76
0.01547
0.52881
C74
0.00118
C75
0.00053
R74
0.32484
C76
0.00311
0
R84
R85
R86
0.27507
0.19657
0.10262
R87
0.02207
25
C77
C78
C79
C80
0.00962
0.03716
0.20431
0.74923
V25
Tc
Thermal model
Figure 13 shows the result of a PSpice simulation for an IFSM value of 42 A. With such a
surge current, thermal instability is reached with the 1st generation device. The forward
voltage drop and the junction temperature increase exponentially until the diode is
destroyed. With the 2nd generation device, the JBS effect clamps the forward voltage drop
and limits the increase of junction temperature.
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New 650 V JBS SiC diodes
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Figure 13. Result of IFSM PSpice simulation: comparison between 6 A / 650 V SiC 2nd
generation (STPSC6H065D) and 6 A /600 V SiC 1st generation (STPSC606D)
VF (V) IFSM (A)
15
Tj (°C)
50
400
Tj 1G > 400 °C
thermal runaway
phenomenon
IFSM = 42 A @ Tc = 25 °C
40
300
10
VF typ 1G
30
200 °C
Tj 2G
20
200
VF typ 2G
5
100
10
Time (ms)
0
3.2.3
0
0
1
2
3
4
5
6
7
8
9
10
0
IFSM datasheet comparison between SiC G2 and SiC G1
The non-repetitive IFSM curves versus pulse duration presented in Figure 14 come from the
datasheet of the STPSC606 and the STPSC6H065. The graph, based on measurements,
shows the improvement of the surge current capability with the second generation. Thanks
to the JBS structure, the IFSM values are more than doubled.
Figure 14. Non repetitive IFSM versus tp comparison between 6 A SiC 1st generation
and 6 A SiC 2nd generation
1·E+03
IFSM (A)
STPSC6H065
2nd generation
1·E+02
STPSC606
1st generation
tp (s)
1·E+01
1·E-05
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1·E-02
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New 650 V JBS SiC diodes
Current stresses in the range of tens of microseconds are usually linked to the switching
period. Such a surge current can also happen during lightning surge tests. Stresses in the
range of tens of milliseconds are usually related to line-dropout tests.
Table 3. IFSM with tp = 10 ms and Tj = 25°C: comparison between first and second
generation
IFSM, sinusoidal, 10 ms, @ 25 °C
3.3
IF (A)
4
6
8
10
SiC 1st generation
14
27
30
40
SiC 2nd generation
38
60
75
90
JBS structure trade-off: current surge capability versus Qrr
The efficiency of the JBS structure to sustain a current spike is linked to the bias current
level of the merged PN junction. This level characterizes “the JBS positioning”. Designing
the diode with a higher bias current level leads to a higher forward voltage drop, and hence
a higher Tj for the same surge. Likewise, the lower the bias current level, the lower the
forward voltage drop at high current. However, the conduction of a PN junction implies some
recovery charges (Qrr) when the diode switches and turns off. This is linked to the minority
carriers’ recombination, which does not happen in a conventional SiC Schottky structure. As
a consequence, a trade off between IFSM and Qrr should be considered.
3.3.1
Forward characteristics comparison between ST’S SiC 2nd generation
and other JBS designs
Figure 15 illustrates in dotted lines another dimensioning of the merged PN junction
compared with ST’s design. The dotted lines present forward voltage drops around 2 volts
higher than ST’s diode between 30 A and 70 A at 225 °C. On the other hand, this
characteristic indicates that the carrier injection phenomenon (Qrr) should appear at higher
forward current levels.
Figure 15. Forward voltage drop between STPSC6H065D and another JBS structure
11
VF (V)
VF=f(IF) versus Tj with (tp=50 µs)
10
9
8
7
6
5
STPSC6H065D 2G
Other JBS technology
25 °C
4
75 °C
125 °C
3
225 °C
175 °C
2
IF (A)
1
0
0
10
20
30
40
50
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The characterization of the recovery charges for a given junction temperature versus the
forward current allows the determination of the no recovery charges area.
3.3.2
No recovery charge area
Figure 16 illustrates the no-recovery-charges area for a 6 A SiC 2nd generation diode in the
reference plan of forward current versus junction temperature. ST’s STPSC6H065D SiC G2
was designed to be used without any recovery charges up to 2 · IF(AV) at 150 °C or again
3 · IF(AV) at 100°C. The 2 oscilloscope traces illustrate the switch-off behavior of the diodes
at IF = 12 A and IF = 18 A for Tj = 150 °C. At IF = 12 A, the behavior at 25°C and 150°C is
stable confirming the absence of recovery charges. At IF = 18 A, recovery charges start to
appear between 100 °C and 125 °C and become more significant at 150 °C. The same
characterization was made on a sample of diodes featuring another JBS technology
(corresponding to the dotted lines in Figure 15). This other JBS trade-off presents a larger
no-recovery-charge area but compromises on the forward voltage drop, that is higher at
high current levels.
Figure 16. Comparison of no recovery charge area between ST’s 6 A SiC 2nd
generation diode and another JBS technology
35
IF (A)
STPSC6H065D
30
Other JBS
technology
25
No recovery
charge area
20
15
10
6 A SiC 2nd generation
diode working area
5
Tj (°C)
0
0
25
50
75
100
125
150
175
200
In a PFC, the peak current flowing through the diode can be estimated by:
Equation 25
Ipeakdiode =
Ö2 · Pout
Vin(min)rms · h
For example, in an 800 W server application with a PFC working at Vin(min) = 90 V AC and
an efficiency of 90%, the peak current reaches 14 A (it’s the same for a 1600 W PFC
application working at 180 V AC). In this application the choice of a 6 A SiC G2 working with
a Tj around 125 °C is adapted.
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3.3.3
New 650 V JBS SiC diodes
PSpice electro-thermal simulation result
The interest of the dimensioning of the ST’s JBS structure compared to another JBS
positioning can clearly be highlighted with the electro-thermal simulation. Figure 17 and
Figure 18 present the result of the PSpice simulation respectively for an IFSM waveform and
a startup phase in a PFC application. The electrical model of the STPSC6H065D is
compared to one of the other 6 A JBS technologies coupled with a thermal model similar to
the one of the STPSC6H065D.
Figure 17 shows that the higher values of the forward characteristic of the other JBS
technology in Figure 15 lead to a much higher Tj (+ 100°C) compared to ST’s product during
a 42 A IFSM spike.
Figure 17. IFSM electro-thermal simulation with Tj comparison between ST’s 6 A SiC
G2 and another 6 A JBS technology
VF (V) IF (A)
8.0
Tj (°C)
350
50
VF typ6A other JBS techno
Tj other JBS techno =300 °C
300
IFSM [email protected]=25 °C
40
6.0
250
VF typSTPSC6H065
30
200
4.0
150
TjSTPSC6H065 =200 °C
20
100
2.0
10
50
Time (ms)
0
0
0
0
1
2
3
4
5
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A second electro-thermal simulation was done during an SMPS start-up phase (Figure 18).
It demonstrates once again the interest of correctly dimensioning the JBS structure.
Figure 18. Electro-thermal simulation of a PFC start-up phase with Tj comparison
between ST’s 6 A SiC 2nd generation and another 6 A JBS technology
Tj (°C)
240
60 A
1000 W PFC start-up PSpice simulation 90 V, 70 kHz,
Cout = 600 µF, L = 270 µH, Tc = 125 °C
IdSiC
Tjother 650 V SiC JBS technology
215 °C
200
40 A
Tj STPSC6H065
175°C
160
20 A
120
0A
5
10
15
20
25
30
Time (ms)
The lower Tj observed through the electro-thermal simulation on ST’s JBS structure
contributes to the robustness of the ST’s product in the application.
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4
Efficiency measurement
Efficiency measurement
Table 4 summarizes the key parameters for the 1st and 2nd generation of SiC diodes. If the
JBS structure improves the surge current capability, it degrades somewhat the values of
forward voltage drop at low current level.
Table 4. Comparison of key parameters between first generation and second
generation of SiC diodes
Product
6 A SiC, 1st gen
STPSC606D
6 A SiC, 2nd gen
STPSC6H065D
IFSM, (A)
VRRM (V)
VF (V) @ 6 A, 25 °C VF (V) @ 6 A, 150 °C
sinusoidal, 10 ms
typical / maximum
typical / maximum
600
27
1.4 / 1.7
1.6 / 2.1
650
60
1.5 / TBD
1.9 / TBD
In a typical PFC application, the efficiency will be affected by less than 0.1% between the
1st and 2nd generation.
A first approximation demonstrated by the following equations shows that the efficiency
difference in a PFC could be estimated by VF/VOUT.
Equation 26
Pcond Vt0 · Iav + Rd · Irms2
=
Pout
Vout · Iout
with
Equation 27
Iav =
Pout
Vout
and
Equation 28
Pout
·
Irms2 = V
inpk · h
Ö3 · p · V
16 · Vinpk
out
then
Equation 29
Pcond Vt0 + k · Iav · Rd VF(k·Iav)
=
=
Pout
Vout · Iout
Vout
with
Equation 30
k=
Vout · 16
3 · Vinpk · h2
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Efficiency measurement
4.1
AN4242
dI/dt optimization
The contribution of the SiC diode in the switching cell is essential. Its switching performance
leads to new optimizations that can help to go a step forward in increasing the efficiency. It is
well known that the MOSFET switching speed (dI/dt) is an important parameter to optimize
the efficiency. The dI/dt slope (when the transistor turns on and when the diode turns off)
can be easily changed by tuning the value of the gate resistor Rg of the transistor.
Figure 19 shows, the efficiency drop between SiC diodes and silicon diodes for different
dI/dt slopes. This efficiency drop is defined by the total power losses due to the diode
divided by POUT. The conduction power losses, the switch-off power losses in the diode and
the switch-on power losses in the transistor due to the Qrr of the silicon diodes are taken into
account.
Figure 19. Comparison of efficiency drop in a 500 W PFC with VIN = 90 V F = 100 kHz,
Tj = 125 °C
Efficiency (%)
6
5
4
8A Ultrafast diode
3
8A Tandem G1
2
8A Tandem G2
6A SiC G2
1
dI/dt (A/µs)
0
0
100
200
300
400
500
600
6A SiC G1
700
800
900
1000
1100
With silicon bipolar rectifiers, there is an optimized dI/dt slope to reduce the power losses.
When the slope increases, the switching time decreases but the reverse recovery current
increases. For low dI/dt values, the impact of the switching time dominates, and for higher
dI/dt the impact of Qrr may become more important. Hence, the switching power losses due
to the recovery charges (Qrr) decrease with the increase of dI/dt until a certain point from
which they start to increase again due to Qrr. For those silicon diodes, the slope choice must
also be made taking into account electromagnetic considerations (EMC) which sometimes
impose a limitation of that slope.
With SiC diodes, the power losses continue to decrease whenever dI/dt increases. Being
naturally soft (due to capacitive nature of the recovery current), they offer the possibility to
switch the transistor more quickly and thus increase the efficiency of the converter.
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4.2
Efficiency measurement
Example of efficiency measurements
Compared to the conventional ultrafast diode, using SiC diodes we can expect, an efficiency
gain of between 1% and 2%.
An example of efficiency measurements in a 480 W PFC at VIN = 115 V AC is presented in
Figure 20. The efficiency gain with the SiC diode compared to the conventional 600 V silicon
diodes reaches 1.2%.
Figure 20. Typical efficiency measurement in a 480 W PFC at VIN = 115 V,
Fsw = 100 kHz, dI/dt = 600 A/µs
95
Efficiency (%)
6 A, 600 V SiC G1
New 6A 650V SiC G2
New 8A 600V Tandem G2
94
8 A, 600 V Tandem G1
8 A, 600 V Turbo 2 diode
93
Tjdiode»120 °C
DCM mode
92
CCM mode
Tjdiode»50 °C
Load (%)
91
0
10
20
30
40
50
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Conclusion
5
AN4242
Conclusion
To keep its leadership in power rectifiers, ST developed a complete portfolio of silicon
carbide diodes that are more and more popular in power converters thanks to their very high
switching performance.
To help designers in their quest for more current density and helping them to reduce cost,
STMicroelectronics developed a second generation of SiC Schottky rectifiers. The design of
these new diodes provides increased robustness while not impacting their performance and
blocks the effect of the positive thermal coefficient of the silicon carbide material. These new
diodes have already proven to be very efficient in high-power SMPS.
To help designers reduce their time to market, STMicroelectronics developed a complete
electro-thermal model of the diode. Combined with a model of the electrical circuit in which
the SiC rectifier is used, the model can simulate all the worst case conditions of the transient
phases of the power-supply. This way, power-supply designers can verify that the diode is
completely safe in all conditions.
Supporting a wide range of applications, ST’s SiC rectifiers are available in a variety of
supported currents and packages, giving more flexibility on the power density/power
dissipation trade-off.
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Revision history
Revision history
Table 5. Document revision history
Date
Revision
30-May-2013
1
Changes
Initial release.
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