dm00264905

AN4823
Application note
L99DZ80EP/L99DZ81EP H-bridge driver switching consideration
and Rgate calculation
Introduction
This document gives information about H-bridge driver embedded in the L99DZ80EP and L99DZ81EP:
those devices include an SPI-programmable slew-rate circuit that drives 4 external MOSFETs in a
H-bridge configuration supporting electric-window applications.
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Block diagram
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Block diagram
Figure 1: L99DZ80EP and L99DFZ81EP block diagram
L99DZ80EP and L99DZ81EP devices provide, through pins GH1/2, GL1/2 and SL1/2,
dedicated driving signals to the external 4 MOSFETs.
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L99DZ80EP/L99DZ81EP smart switching details
L99DZ80EP/L99DZ81EP smart switching details
Figure 2: Simplified schematic of driver for external high-side
Chargepump Voltage
VS
VCP ~(VS + 10V)
Icharge
SWIC
RSW = 6Ω
SWRCSW
Measure VDS
C1
VDSSW
TH
VGSSW
VGate
RGate V
GS
VDS
SWCVSW
Measure VGS
CVSW
SWID
C2
SWRDSW
Idischarge
RSW = 6Ω
Motor Inductor
VSource
TL
R SW = 6Ω, typical design value
GAPG2601160917CFT
Typical curves are described in the following figure.
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Figure 3: H-bridge GSHx slope
Some transitions are now analyzed:
Transition A
Threshold voltage ext FET sampled and stored in CVSW during Miller Plateau ↔ VTH.
During this phase, threshold stored in CVSW during Miller Plateau is increased by ICharge *
RGate in reference to VTH of the external MOSFET
Transition B
Switch-off started with RSW , "hard switching".
Transition C
•
•
•
Reaching VTH, RSW is turned-off by opening SW RDSW
Opening of SW RDSW is done with a certain delay
Afterwards gate discharge is done by the programmed current source (Idischarge)
During this phase, VGate is decreased by resistive divider RSW ↔ Rgate and "Virtually" the
threshold to switch from switch mode to current mode is lower than real gate source
voltage on external FET.
Figure 4: "Transition C measurement on a real device" shows measurements performed on
a real device.
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Figure 4: Transition C measurement on a real device
2.1
How to choose a proper Rgate resistance
Charge in the beginning of turn-off phase is discharged by the hard switch in series with the
external gate resistance. Average current during this phase is approximately (5V + VTH/2) /
(RSW + RGate).
Due to virtual decreased sample voltage (by resitive divider RSW & RGate) the transistion
from switch mode to current control mode is started almost immediately after start of turnoff of ext FET (depending on size of RGate).
Delay of opening SW RDSW is approximately 100 ns (typical value).
During this time Qgate must NOT be discharged to ensure to enter QGD plateau. As rule of
thumb the according Rgate can be calculated by the following formula:
RGate ≥ (5V + VTH/2) * 100ns / QGate - RSW
That value of RGate is needed to enter current source mode.
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Table 1: Rgate values as per different MOSFET choice
QTotal
(nC)
QGD
(nC)
QGS
(nC)
QTotal – QGD – QGS
(nC)
VTH @ 40A
(V)
Calculated
RGate ≈ (Ω)
ST
STD64N4F6AG
44
15
12
18
5.5
38
ST
STD80N4F6AG
36
9
11
16
4.8
41
ST VNH7013
36
5
8,5
22.5
Not specified
(2 ... 4)
28
(@VTH =
5V)
Supplier A
45
12.6
10
22.4
4V
26
Supplier B
17.2
2.4
8
6.8
5.5V
109
MOSFET
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Revision history
Revision history
Table 2: Document revision history
Date
Revision
17-Feb-2016
1
Initial release.
2
Updated Figure 2: "Simplified schematic of driver for external high-side"
Section 2.1: "How to choose a proper Rgate resistance":
29-Feb-2016
Changes
•
Updated equation
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